src/mainboard/intel/leafhill/brd_gpio_early.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <soc/gpio.h>
   4
   5 static const struct pad_config early_gpio_table[] = {
   6         /* LPC */
   7         PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
   8         PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1),
   9         PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1),
  10         PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1),
  11         PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1),
  12         PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1),
  13         PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1),
  14         PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1),
  15         PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1),
  16
  17         /* UART */
  18         PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX */
  19         PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX */
  20 };