Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax
[coreboot2.git] / src / mainboard / lenovo / haswell / variants / t440p / devicetree.cb
blob10e23b3407f45b3e12b6316a3548ffa0b936dd39
1 chip northbridge/intel/haswell
2 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
3 register "gpu_ddi_e_connected" = "1"
4 register "gpu_dp_b_hotplug" = "4"
5 register "gpu_dp_c_hotplug" = "4"
6 register "gpu_dp_d_hotplug" = "4"
7 register "panel_cfg" = "{
8 .up_delay_ms = 200,
9 .down_delay_ms = 50,
10 .cycle_delay_ms = 500,
11 .backlight_on_delay_ms = 1,
12 .backlight_off_delay_ms = 1,
13 .backlight_pwm_hz = 220,
15 register "ec_present" = "true"
16 register "spd_addresses" = "{0x50, 0, 0x51, 0}"
17 chip cpu/intel/haswell
18 device cpu_cluster 0 on ops haswell_cpu_bus_ops end
19 end
20 device domain 0 on
21 ops haswell_pci_domain_ops
22 subsystemid 0x17aa 0x220e inherit
24 device pci 00.0 on end # Host bridge
25 device pci 01.0 on end # PCIe Bridge for discrete graphics (optional)
26 device pci 01.1 on end # PCIe Bridge for discrete graphics (optional)
27 device pci 02.0 on end # Internal graphics VGA controller
28 device pci 03.0 on end # Mini-HD audio
30 chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
31 register "gen1_dec" = "0x007c1601"
32 register "gen2_dec" = "0x000c15e1"
33 register "gen4_dec" = "0x000c06a1"
34 register "gpi13_routing" = "2"
35 register "gpi1_routing" = "2"
36 # 0(HDD), 1(M.2), 5(ODD)
37 register "sata_port_map" = "0x23"
38 device pci 14.0 on end # xHCI Controller
39 device pci 16.0 on end # Management Engine Interface 1
40 device pci 16.1 off end # Management Engine Interface 2
41 device pci 16.2 off end # Management Engine IDE-R
42 device pci 16.3 off end # Management Engine KT
43 device pci 19.0 on end # Intel Gigabit Ethernet
44 device pci 1a.0 on end # USB2 EHCI #2
45 device pci 1b.0 on end # High Definition Audio controller
46 device pci 1c.0 on end # PCIe Port #1, Realtek Card Reader
47 device pci 1c.1 on # PCIe Port #2, WLAN
48 smbios_slot_desc "0x14" "1" "M.2 2230" "8"
49 end
50 device pci 1c.2 off end # PCIe Port #3
51 device pci 1c.3 off end # PCIe Port #4
52 device pci 1c.4 off end # PCIe Port #5
53 device pci 1c.5 off end # PCIe Port #6
54 device pci 1c.6 off end # PCIe Port #7
55 device pci 1c.7 off end # PCIe Port #8
56 device pci 1d.0 on end # USB2 EHCI #1
57 device pci 1f.0 on # LPC bridge
58 chip ec/lenovo/pmh7
59 register "backlight_enable" = "true"
60 register "dock_event_enable" = "true"
61 device pnp ff.1 on end # dummy
62 end
63 chip ec/lenovo/h8
64 register "beepmask0" = "0x00"
65 register "beepmask1" = "0x86"
66 register "config0" = "0xa6"
67 register "config1" = "0x0d"
68 register "config2" = "0xa8"
69 register "config3" = "0xc4"
70 register "has_keyboard_backlight" = "1"
71 register "event2_enable" = "0xff"
72 register "event3_enable" = "0xff"
73 register "event4_enable" = "0xd0"
74 register "event5_enable" = "0x3c"
75 register "event7_enable" = "0x01"
76 register "event8_enable" = "0x7b"
77 register "event9_enable" = "0xff"
78 register "eventc_enable" = "0xff"
79 register "eventd_enable" = "0xff"
80 register "evente_enable" = "0x9d"
81 device pnp ff.2 on # dummy
82 io 0x60 = 0x62
83 io 0x62 = 0x66
84 io 0x64 = 0x1600
85 io 0x66 = 0x1604
86 end
87 end
88 chip drivers/pc80/tpm
89 device pnp 0c31.0 on end
90 end
91 end
92 device pci 1f.2 on end # SATA Controller 1
93 device pci 1f.3 on end # SMBus
94 device pci 1f.5 off end # SATA Controller 2
95 device pci 1f.6 off end # Thermal
96 end
97 end
98 end