src/mainboard/lenovo/x60/mainboard.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/pci_def.h>
   4 #include <device/pci_ids.h>
   5 #include <device/device.h>
   6 #include <device/pci_ops.h>
   7 #include <arch/io.h>
   8 #include <ec/acpi/ec.h>
   9 #include <northbridge/intel/i945/i945.h>
  10 #include <southbridge/intel/i82801gx/chip.h>
  11 #include "dock.h"
  12 #include <drivers/intel/gma/int15.h>
  13 #include <drivers/lenovo/lenovo.h>
  14 #include <acpi/acpigen.h>
  15
  16 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
  17
  18 static void mainboard_init(struct device *dev)
  19 {
  20         struct device *idedev, *sdhci_dev;
  21
  22         ec_clr_bit(0x03, 2);
  23
  24         if (inb(0x164c) & 0x08) {
  25                 ec_set_bit(0x03, 2);
  26                 ec_write(0x0c, 0x88);
  27         }
  28
  29         install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
  30                                         GMA_INT15_PANEL_FIT_DEFAULT,
  31                                         PANEL, 3);
  32
  33         /* If we're resuming from suspend, blink suspend LED */
  34         if (acpi_is_wakeup_s3())
  35                 ec_write(0x0c, 0xc7);
  36
  37         idedev = pcidev_on_root(0x1f, 1);
  38         if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
  39                 struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
  40                 config->ide_enable_primary = true;
  41                 /* enable Ultrabay power */
  42                 outb(inb(0x1628) | 0x01, 0x1628);
  43                 ec_write(0x0c, 0x84);
  44         } else {
  45                 /* disable Ultrabay power */
  46                 outb(inb(0x1628) & ~0x01, 0x1628);
  47                 ec_write(0x0c, 0x04);
  48         }
  49
  50         /* Set SDHCI write protect polarity "SDWPPol" */
  51         sdhci_dev = dev_find_device(PCI_VID_RICOH, PCI_DID_RICOH_R5C822, 0);
  52         if (sdhci_dev) {
  53                 if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) {
  54                         /* unlock */
  55                         pci_write_config8(sdhci_dev, 0xf9, 0xfc);
  56                         /* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */
  57                         pci_write_config8(sdhci_dev, 0xfa, 0x20);
  58                         /* restore lock */
  59                         pci_write_config8(sdhci_dev, 0xf9, 0x00);
  60                 }
  61         }
  62 }
  63
  64 static void fill_ssdt(const struct device *device)
  65 {
  66         drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 1);
  67 }
  68
  69 static void mainboard_enable(struct device *dev)
  70 {
  71         dev->ops->init = mainboard_init;
  72         dev->ops->acpi_fill_ssdt = fill_ssdt;
  73 }
  74
  75 struct chip_operations mainboard_ops = {
  76         .enable_dev = mainboard_enable,
  77 };