src/northbridge/amd/agesa/state_machine.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef _STATE_MACHINE_H_
   4 #define _STATE_MACHINE_H_
   5
   6 #include <stdint.h>
   7 #include <AGESA.h>
   8 #include <AMD.h>
   9
  10 /* eventlog */
  11 void agesawrapper_trace(AGESA_STATUS ret, AMD_CONFIG_PARAMS *StdHeader, const char *func);
  12 AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus);
  13
  14 /* For suspend-to-ram support. */
  15
  16 #if !CONFIG(CPU_AMD_PI)
  17 /* TODO: With binaryPI we need different interface. */
  18 AGESA_STATUS OemInitResume(AMD_S3_PARAMS *dataBlock);
  19 AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock);
  20 AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock);
  21 #endif
  22
  23 /* For FCH */
  24 AGESA_STATUS fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader);
  25 AGESA_STATUS fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader);
  26
  27 struct sysinfo
  28 {
  29         AMD_CONFIG_PARAMS StdHeader;
  30
  31         int s3resume;
  32 };
  33
  34 void board_BeforeAgesa(struct sysinfo *cb);
  35
  36 void agesa_set_interface(struct sysinfo *cb);
  37
  38 struct agesa_state {
  39         u8 apic_id;
  40
  41         AGESA_STRUCT_NAME func;
  42         const char *function_name;
  43         uint32_t ts_entry_id;
  44         uint32_t ts_exit_id;
  45 };
  46
  47 void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func);
  48 void agesa_state_on_exit(struct agesa_state *task,
  49         AMD_CONFIG_PARAMS *StdHeader);
  50 int agesa_execute_state(struct sysinfo *cb, AGESA_STRUCT_NAME func);
  51
  52 /* AGESA dispatchers */
  53
  54 AGESA_STATUS module_dispatch(AGESA_STRUCT_NAME func, AMD_CONFIG_PARAMS *StdHeader);
  55
  56 void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset);
  57 void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset);
  58
  59 void platform_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early);
  60 void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early);
  61
  62 /* Normal boot */
  63 void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post);
  64 void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post);
  65 void platform_AfterInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post);
  66
  67 void platform_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env);
  68 void board_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env);
  69 void platform_AfterInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env);
  70
  71 void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid);
  72 void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid);
  73
  74 void platform_BeforeInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late);
  75 void board_BeforeInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late);
  76 void platform_AfterInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late);
  77 void completion_InitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late);
  78
  79 /* S3 Resume */
  80 void platform_BeforeInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume);
  81 void platform_AfterInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume);
  82
  83 void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late);
  84 void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late);
  85
  86 void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save);
  87
  88 /* FCH callouts, not used with CIMx. */
  89 #define HAS_AGESA_FCH_OEM_CALLOUT \
  90         CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) || \
  91         CONFIG(SOUTHBRIDGE_AMD_PI_KERN)
  92
  93 #if HAS_AGESA_FCH_OEM_CALLOUT
  94 /* FIXME:  Structures included here were supposed to be private to AGESA. */
  95 #include <FchCommonCfg.h>
  96 void agesa_fch_oem_config(uintptr_t Data, AMD_CONFIG_PARAMS *StdHeader);
  97 void board_FCH_InitReset(struct sysinfo *cb, FCH_RESET_DATA_BLOCK *FchReset);
  98 void board_FCH_InitEnv(struct sysinfo *cb, FCH_DATA_BLOCK *FchEnv);
  99 #endif
 100
 101 #endif /* _STATE_MACHINE_H_ */