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HEAD
mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot2.git]
/
src
/
soc
/
intel
/
xeon_sp
/
ras
/
Makefile.mk
blob
93c8705f94e4f096ed8bf4805ccb08781c4f2802
1
## SPDX-License-Identifier: GPL-2.0-or-later
2
3
ramstage-
$(
CONFIG_SOC_ACPI_HEST
) +=
hest.c
