mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot2.git] / src / southbridge / intel / i82801gx / Kconfig
blob757e5bf356536f0f0aea193bc59396e60392c280
1 # SPDX-License-Identifier: GPL-2.0-only
3 config SOUTHBRIDGE_INTEL_I82801GX
4         bool
5         select ACPI_COMMON_MADT_IOAPIC
6         select ACPI_COMMON_MADT_LAPIC
7         select ACPI_INTEL_HARDWARE_SLEEP_VALUES
8         select ACPI_SOC_NVS
9         select AZALIA_HDA_CODEC_SUPPORT
10         select USE_WATCHDOG_ON_BOOT
11         select HAVE_SMI_HANDLER
12         select SOUTHBRIDGE_INTEL_COMMON_GPIO
13         select SOUTHBRIDGE_INTEL_COMMON_SMBUS
14         select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
15         select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 if BOOT_DEVICE_SPI_FLASH
16         select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
17         select SOUTHBRIDGE_INTEL_COMMON_PMBASE
18         select HAVE_INTEL_CHIPSET_LOCKDOWN
19         select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
20         select INTEL_HAS_TOP_SWAP
21         select SOUTHBRIDGE_INTEL_COMMON_SMM
22         select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
23         select SOUTHBRIDGE_INTEL_COMMON_RTC
24         select SOUTHBRIDGE_INTEL_COMMON_RESET
25         select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
26         select SOUTHBRIDGE_INTEL_COMMON_HPET
27         select TCO_SPACE_NOT_YET_SPLIT
29 if SOUTHBRIDGE_INTEL_I82801GX
31 config EHCI_BAR
32         hex
33         default 0xfef00000
35 config HPET_MIN_TICKS
36         default 0x80
38 config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
39         hex
40         # Always 64K, all other options are invalid
41         default 0x10000
43 endif