src/mainboard/asrock/h81m-hds/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/pnp_ops.h>
   4 #include <superio/nuvoton/common/nuvoton.h>
   5 #include <superio/nuvoton/nct6776/nct6776.h>
   6 #include <southbridge/intel/lynxpoint/pch.h>
   7
   8 void mainboard_config_superio(void)
   9 {
  10         const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
  11         const pnp_devfn_t SERIAL_DEV = PNP_DEV(0x2e, NCT6776_SP1);
  12         const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI);
  13         const pnp_devfn_t IR_DEV = PNP_DEV(0x2e, NCT6776_SP2);
  14
  15         nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  16
  17         nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
  18
  19         /* Select HWM/LED functions instead of floppy functions. */
  20         pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03);
  21         pnp_write_config(GLOBAL_PSEUDO_DEV, 0x24, 0x24);
  22
  23         /* Power RAM in S3 and let the PCH handle power failure actions. */
  24         pnp_set_logical_device(ACPI_DEV);
  25         pnp_write_config(ACPI_DEV, 0xe4, 0x70);
  26
  27         /*
  28          * Don't know what's needed here, just set the same as the vendor
  29          * firmware.
  30          */
  31         pnp_set_logical_device(IR_DEV);
  32         pnp_write_config(IR_DEV, 0xf1, 0x5c);
  33
  34         nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
  35 }