mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / asus / p5qpl-am / hda_verb.c
blob525aab2c53ce485e0b75d6c5a03cdd9c86419f8b
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* coreboot specific header */
7 /* Realtek ALC662 rev1 */
8 0x10ec0887, /* Vendor ID */
9 0x1043840b, /* Subsystem ID */
10 14, /* Number of entries */
12 /* Pin Widget Verb Table */
14 AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
15 AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
16 AZALIA_PIN_CFG(0, 0x14, 0x01014010),
17 AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
18 AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
19 AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
20 AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
21 AZALIA_PIN_CFG(0, 0x19, 0x02a19850),
22 AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
23 AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
24 AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
25 AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
26 AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
27 AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
30 const u32 pc_beep_verbs[0] = {};
32 AZALIA_ARRAY_SIZES;