mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / google / slippy / devicetree.cb
blob0c1222c4e85a0a587a9c7139cc4ca88e0ae493ed
1 chip northbridge/intel/haswell
2 # IGD Displays
3 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
5 # Enable eDP Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
8 # Disable DisplayPort C Hotplug
9 register "gpu_dp_c_hotplug" = "0x00"
11 # Enable HDMI Hotplug with 6ms pulse
12 register "gpu_dp_b_hotplug" = "0x06"
14 register "ec_present" = "true"
16 register "usb_xhci_on_resume" = "true"
18 chip cpu/intel/haswell
19 device cpu_cluster 0 on ops haswell_cpu_bus_ops end
20 end
22 device domain 0 on
23 ops haswell_pci_domain_ops
24 device pci 00.0 on end # host bridge
25 device pci 02.0 on end # vga controller
26 device pci 03.0 on end # mini-hd audio
28 chip southbridge/intel/lynxpoint
29 # EC range is 0x800-0x9ff
30 register "gen1_dec" = "0x00fc0801"
31 register "gen2_dec" = "0x00fc0901"
33 # EC_SMI is GPIO34
34 register "alt_gp_smi_en" = "0x0004"
35 register "gpe0_en_1" = "0x00000000"
36 # EC_SCI is GPIO36
37 register "gpe0_en_2" = "0x00000010"
38 register "gpe0_en_3" = "0x00000000"
39 register "gpe0_en_4" = "0x00000000"
41 register "sata_port_map" = "0x1"
43 register "sio_acpi_mode" = "1"
44 register "sio_i2c0_voltage" = "0" # 3.3V
45 register "sio_i2c1_voltage" = "0" # 3.3V
47 # Force enable ASPM for PCIe Port 1
48 register "pcie_port_force_aspm" = "0x01"
50 # Route all USB ports to XHCI per default
51 register "xhci_default" = "1"
53 device pci 13.0 off end # Smart Sound Audio DSP
54 device pci 14.0 on end # USB3 XHCI
55 device pci 15.0 on end # Serial I/O DMA
56 device pci 15.1 on end # I2C0
57 device pci 15.2 on end # I2C1
58 device pci 15.3 off end # GSPI0
59 device pci 15.4 off end # GSPI1
60 device pci 15.5 off end # UART0
61 device pci 15.6 off end # UART1
62 device pci 16.0 on end # Management Engine Interface 1
63 device pci 16.1 off end # Management Engine Interface 2
64 device pci 16.2 off end # Management Engine IDE-R
65 device pci 16.3 off end # Management Engine KT
66 device pci 17.0 off end # SDIO
67 device pci 19.0 off end # GbE
68 device pci 1b.0 on end # High Definition Audio
69 device pci 1c.0 on end # PCIe Port #1
70 device pci 1c.1 off end # PCIe Port #2
71 device pci 1c.2 off end # PCIe Port #3
72 device pci 1c.3 off end # PCIe Port #4
73 device pci 1c.4 off end # PCIe Port #5
74 device pci 1c.5 off end # PCIe Port #6
75 device pci 1d.0 on end # USB2 EHCI
76 device pci 1e.0 off end # PCI bridge
77 device pci 1f.0 on
78 chip drivers/pc80/tpm
79 device pnp 0c31.0 on end
80 end
81 chip ec/google/chromeec
82 # We only have one init function that
83 # we need to call to initialize the
84 # keyboard part of the EC.
85 device pnp ff.1 on # dummy address
86 end
87 end
88 end # LPC bridge
89 device pci 1f.2 on end # SATA Controller
90 device pci 1f.3 on end # SMBus
91 device pci 1f.6 on end # Thermal
92 end
93 end
94 end