src/mainboard/google/storm/mainboard.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <boardid.h>
   4 #include <boot/coreboot_tables.h>
   5 #include <delay.h>
   6 #include <device/device.h>
   7 #include <gpio.h>
   8 #include <soc/clock.h>
   9 #include <soc/soc_services.h>
  10 #include <soc/usb.h>
  11 #include <symbols.h>
  12
  13 #include <vendorcode/google/chromeos/chromeos.h>
  14 #include "mmu.h"
  15
  16 #define USB_ENABLE_GPIO         51
  17
  18 static void setup_usb(void)
  19 {
  20 #if !CONFIG(BOARD_VARIANT_AP148)
  21         gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
  22                              GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
  23         gpio_set(USB_ENABLE_GPIO, 1);
  24 #endif
  25         usb_clock_config();
  26
  27         setup_usb_host1();
  28 }
  29
  30 #define TPM_RESET_GPIO 22
  31 static void setup_tpm(void)
  32 {
  33         if (board_id() != BOARD_ID_PROTO_0)
  34                 return; /* Only proto0 have TPM reset connected to GPIO22 */
  35
  36         gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP,
  37                              GPIO_4MA, GPIO_ENABLE);
  38         /*
  39          * Generate a reset pulse. The spec calls for 80 us minimum, let's
  40          * make it twice as long. If the output was driven low originally, the
  41          * reset pulse will be even longer.
  42          */
  43         gpio_set(TPM_RESET_GPIO, 0);
  44         udelay(160);
  45         gpio_set(TPM_RESET_GPIO, 1);
  46 }
  47
  48 #define SW_RESET_GPIO 26
  49 static void assert_sw_reset(void)
  50 {
  51         if (board_id() == BOARD_ID_PROTO_0)
  52                 return;
  53
  54         /*
  55          * only proto0.2 and later care about this. We want to keep the
  56          * ethernet switch in reset, otherwise it comes up in default
  57          * (bridging) mode.
  58          */
  59         gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
  60                              GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
  61
  62         gpio_set(SW_RESET_GPIO, 1);
  63 }
  64
  65 static void mainboard_init(struct device *dev)
  66 {
  67          /* disable mmu and d-cache before setting up secure world.*/
  68          dcache_mmu_disable();
  69          start_tzbsp();
  70          /* Setup mmu and d-cache again as non secure entries. */
  71          setup_mmu(DRAM_INITIALIZED);
  72          start_rpm();
  73          setup_usb();
  74          assert_sw_reset();
  75          setup_tpm();
  76          /* Functionally a 0-cost no-op if NAND is not present */
  77          board_nand_init();
  78
  79         /* Copy WIFI calibration data into CBMEM. */
  80         if (CONFIG(CHROMEOS))
  81                 cbmem_add_vpd_calibration_data();
  82
  83         /*
  84          * Make sure bootloader can issue sounds The frequency is calculated
  85          * as "<frame_rate> * <bit_width> * <channels> * 4", i.e.
  86          *
  87          * 48000 * 2 * 16 * 4 = 6144000
  88          */
  89         audio_clock_config(6144000);
  90 }
  91
  92 static void mainboard_enable(struct device *dev)
  93 {
  94         dev->ops->init = &mainboard_init;
  95 }
  96
  97 struct chip_operations mainboard_ops = {
  98         .enable_dev = mainboard_enable,
  99 };
 100
 101 void lb_board(struct lb_header *header)
 102 {
 103         struct lb_range *dma;
 104
 105         dma = (struct lb_range *)lb_new_record(header);
 106         dma->tag = LB_TAG_DMA;
 107         dma->size = sizeof(*dma);
 108         dma->range_start = (uintptr_t)_dma_coherent;
 109         dma->range_size = REGION_SIZE(dma_coherent);
 110
 111         /* Retrieve the switch interface MAC addresses. */
 112         if (CONFIG(CHROMEOS))
 113                 lb_table_add_macs_from_vpd(header);
 114 }