mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / msi / ms7e06 / hda_verb.c
blob96578fa9ab668ff83c6d9e55750a24ed58340e68
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* Realtek ALC897 */
7 0x10ec0897, /* Vendor ID */
8 0x14629e06, /* Subsystem ID */
9 15, /* Number of entries */
10 AZALIA_SUBVENDOR(0, 0x14629e06),
11 AZALIA_PIN_CFG(0, 0x11, 0x4037d540),
12 AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
13 AZALIA_PIN_CFG(0, 0x14, 0x01014010),
14 AZALIA_PIN_CFG(0, 0x15, 0x01011012),
15 AZALIA_PIN_CFG(0, 0x16, 0x01016011),
16 AZALIA_PIN_CFG(0, 0x17, 0x01012014),
17 AZALIA_PIN_CFG(0, 0x18, 0x01a19030),
18 AZALIA_PIN_CFG(0, 0x19, 0x02a19040),
19 AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
20 AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
21 AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
22 AZALIA_PIN_CFG(0, 0x1d, 0x402af66b),
23 AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
24 AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
26 /* Alderlake HDMI */
27 0x80862818, /* Vendor ID */
28 0x80860101, /* Subsystem ID */
29 10, /* Number of entries */
30 AZALIA_SUBVENDOR(2, 0x80860101),
31 AZALIA_PIN_CFG(2, 0x04, 0x18560010),
32 AZALIA_PIN_CFG(2, 0x06, 0x18560010),
33 AZALIA_PIN_CFG(2, 0x08, 0x18560010),
34 AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
35 AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
36 AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
37 AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
38 AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
39 AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
42 const u32 pc_beep_verbs[] = {};
44 AZALIA_ARRAY_SIZES;