mb/google/brya: Create rull variant
[coreboot2.git] / src / vendorcode / amd / pi / 00670F00 / Makefile.mk
blob330bfd7631cc74a094f042af3df925d621f6c589
1 ## SPDX-License-Identifier: BSD-3-Clause
3 #*****************************************************************************
5 # Redistribution and use in source and binary forms, with or without
6 # modification, are permitted provided that the following conditions are met:
7 # * Redistributions of source code must retain the above copyright
8 # notice, this list of conditions and the following disclaimer.
9 # * Redistributions in binary form must reproduce the above copyright
10 # notice, this list of conditions and the following disclaimer in the
11 # documentation and/or other materials provided with the distribution.
12 # * Neither the name of Advanced Micro Devices, Inc. nor the names of
13 # its contributors may be used to endorse or promote products derived
14 # from this software without specific prior written permission.
16 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
17 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 # DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
20 # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #*****************************************************************************
29 ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
31 AGESA_CFLAGS += -march=amdfam10 -fno-strict-aliasing -D__LIBAGESA__
33 CC_bootblock := $(CC_bootblock) $(BINARY_PI_INC)
34 CC_romstage := $(CC_romstage) $(BINARY_PI_INC)
35 CC_postcar:= $(CC_postcar) -I$(AGESA_ROOT)/binaryPI
36 CC_ramstage := $(CC_ramstage) $(BINARY_PI_INC)
38 #######################################################################
40 define create_agesa_cp_template
41 # $1 AGESA source file
43 $(agesa_src_path)/$(notdir $1): $1
44 @printf " AGESA Copying $$(notdir $1) => $$(@D)\n"
45 if [ ! -r $(agesa_src_path)/$(notdir $1) ]; then \
46 cp -f $1 $$(@D); \
49 $(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $(src)/include/kconfig.h
50 @printf " CC $$(subst $(obj)/,,$$(@))\n"
51 $(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \
52 $(AGESA_INC) \
53 -include $(src)/include/kconfig.h \
54 -include $(src)/include/rules.h \
55 -include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h \
56 -o $$@ \
57 $(agesa_src_path)/$(notdir $1)
59 endef
61 agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS])
63 agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS])
65 classes-y += libagesa
67 ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
68 $(eval $(call create_class_compiler,libagesa,x86_32))
69 else
70 $(eval $(call create_class_compiler,libagesa,x86_64))
71 endif
73 agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file)))))
74 agesa_output_path := $(obj)/libagesa
75 agesa_src_path := $(agesa_output_path)
76 agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files)))))
78 additional-dirs += $(agesa_src_path) $(agesa_dirs)
80 $(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file))))
82 $(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files))
83 @printf " AGESA $(subst $(obj)/,,$(@))\n"
84 $(AR_libagesa) rcs $@ $+
86 bootblock-libs += $(agesa_output_path)/libagesa.a
87 romstage-libs += $(agesa_output_path)/libagesa.a
88 ramstage-libs += $(agesa_output_path)/libagesa.a
90 #######################################################################
92 warn_no_agesa:
93 printf "\n\t** WARNING **\n"
94 printf "coreboot has been built with no AGESA support. Successfully "
95 printf "booting this image will be impossible.\n\n"
97 PHONY+=warn_no_agesa
99 ifeq ($(CONFIG_AGESA_SPLIT_MEMORY_FILES), y)
101 # convert input elf to rmodule
102 AGESA_POST_MEM_INPUT_ELF = $(call strip_quotes,$(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE))
104 # If no post-mem file then also skip pre-mem file
105 ifeq ($(AGESA_POST_MEM_INPUT_ELF),)
106 show_notices:: warn_no_agesa
107 else
108 AGESA_POST_MEM_ELF = $(objcbfs)/$(patsubst %.elf,%.debug,$(notdir $(AGESA_POST_MEM_INPUT_ELF)))
109 AGESA_POST_MEM_ELF_RMOD = $(AGESA_POST_MEM_ELF).rmod
111 $(AGESA_POST_MEM_ELF): $(AGESA_POST_MEM_INPUT_ELF)
112 cp $< $@
114 $(AGESA_POST_MEM_ELF_RMOD): $(AGESA_POST_MEM_ELF)
116 cbfs-files-y += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)
117 $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_PRE_MEMORY_BINARY_PI_FILE)
118 $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-type := stage
119 $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip
120 # 4KiB alignment to handle any interior alignment. Current AGESA only has
121 # 64 byte alignment.
122 $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-align := 4096
124 cbfs-files-y += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)
125 $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD)
126 $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage
127 $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG)
129 endif # AGESA_POST_MEM_INPUT_ELF == ""
131 else # CONFIG_AGESA_SPLIT_MEMORY_FILES
133 AGESA_BINARYPI_INPUT_FILE = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_FILE))
134 ifeq ($(AGESA_BINARYPI_INPUT_FILE),)
135 show_notices:: warn_no_agesa
136 else
138 cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME)
139 $(CONFIG_AGESA_CBFS_NAME)-file := $(AGESA_BINARYPI_INPUT_FILE)
141 ifeq ($(CONFIG_AGESA_BINARY_PI_AS_STAGE),y)
142 $(CONFIG_AGESA_CBFS_NAME)-type := stage
143 $(CONFIG_AGESA_CBFS_NAME)-options := --xip
144 # 4KiB alignment to handle any interior alignment. Current AGESA only has
145 # 64 byte alignment.
146 $(CONFIG_AGESA_CBFS_NAME)-align := 4096
147 else
148 $(CONFIG_AGESA_CBFS_NAME)-type := raw
149 $(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION)
150 regions-for-file-$(CONFIG_AGESA_CBFS_NAME) = COREBOOT
151 endif # CONFIG_AGESA_BINARY_PI_AS_STAGE
153 endif # AGESA_BINARYPI_INPUT_FILE == ""
154 endif # CONFIG_AGESA_SPLIT_MEMORY_FILES
156 endif