blk: rq_data_dir() should not return a boolean
[cris-mirror.git] / arch / arm / mach-exynos / smc.h
blobc2845717bc8fd9860d62ee14191556854a484d7d
1 /*
2 * Copyright (c) 2012 Samsung Electronics.
4 * EXYNOS - SMC Call
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #ifndef __ASM_ARCH_EXYNOS_SMC_H
12 #define __ASM_ARCH_EXYNOS_SMC_H
14 #define SMC_CMD_INIT (-1)
15 #define SMC_CMD_INFO (-2)
16 /* For Power Management */
17 #define SMC_CMD_SLEEP (-3)
18 #define SMC_CMD_CPU1BOOT (-4)
19 #define SMC_CMD_CPU0AFTR (-5)
20 #define SMC_CMD_SAVE (-6)
21 #define SMC_CMD_SHUTDOWN (-7)
22 /* For CP15 Access */
23 #define SMC_CMD_C15RESUME (-11)
24 /* For L2 Cache Access */
25 #define SMC_CMD_L2X0CTRL (-21)
26 #define SMC_CMD_L2X0SETUP1 (-22)
27 #define SMC_CMD_L2X0SETUP2 (-23)
28 #define SMC_CMD_L2X0INVALL (-24)
29 #define SMC_CMD_L2X0DEBUG (-25)
31 #ifndef __ASSEMBLY__
33 extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
35 #endif /* __ASSEMBLY__ */
37 /* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
38 #define OP_TYPE_CORE 0x0
39 #define OP_TYPE_CLUSTER 0x1
41 /* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
42 #define SMC_POWERSTATE_IDLE 0x1
44 #endif