blk: rq_data_dir() should not return a boolean
[cris-mirror.git] / arch / arm / mach-imx / cpuidle-imx6sx.c
blob3c6672b3796b24b2ffebb3ad7166688697ba980f
1 /*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #include <linux/cpuidle.h>
10 #include <linux/cpu_pm.h>
11 #include <linux/module.h>
12 #include <asm/cpuidle.h>
13 #include <asm/suspend.h>
15 #include "common.h"
16 #include "cpuidle.h"
18 static int imx6sx_idle_finish(unsigned long val)
20 cpu_do_idle();
22 return 0;
25 static int imx6sx_enter_wait(struct cpuidle_device *dev,
26 struct cpuidle_driver *drv, int index)
28 imx6_set_lpm(WAIT_UNCLOCKED);
30 switch (index) {
31 case 1:
32 cpu_do_idle();
33 break;
34 case 2:
35 imx6_enable_rbc(true);
36 imx_gpc_set_arm_power_in_lpm(true);
37 imx_set_cpu_jump(0, v7_cpu_resume);
38 /* Need to notify there is a cpu pm operation. */
39 cpu_pm_enter();
40 cpu_cluster_pm_enter();
42 cpu_suspend(0, imx6sx_idle_finish);
44 cpu_cluster_pm_exit();
45 cpu_pm_exit();
46 imx_gpc_set_arm_power_in_lpm(false);
47 imx6_enable_rbc(false);
48 break;
49 default:
50 break;
53 imx6_set_lpm(WAIT_CLOCKED);
55 return index;
58 static struct cpuidle_driver imx6sx_cpuidle_driver = {
59 .name = "imx6sx_cpuidle",
60 .owner = THIS_MODULE,
61 .states = {
62 /* WFI */
63 ARM_CPUIDLE_WFI_STATE,
64 /* WAIT */
66 .exit_latency = 50,
67 .target_residency = 75,
68 .flags = CPUIDLE_FLAG_TIMER_STOP,
69 .enter = imx6sx_enter_wait,
70 .name = "WAIT",
71 .desc = "Clock off",
73 /* WAIT + ARM power off */
76 * ARM gating 31us * 5 + RBC clear 65us
77 * and some margin for SW execution, here set it
78 * to 300us.
80 .exit_latency = 300,
81 .target_residency = 500,
82 .enter = imx6sx_enter_wait,
83 .name = "LOW-POWER-IDLE",
84 .desc = "ARM power off",
87 .state_count = 3,
88 .safe_state_index = 0,
91 int __init imx6sx_cpuidle_init(void)
93 imx6_enable_rbc(false);
95 * set ARM power up/down timing to the fastest,
96 * sw2iso and sw can be set to one 32K cycle = 31us
97 * except for power up sw2iso which need to be
98 * larger than LDO ramp up time.
100 imx_gpc_set_arm_power_up_timing(2, 1);
101 imx_gpc_set_arm_power_down_timing(1, 1);
103 return cpuidle_register(&imx6sx_cpuidle_driver, NULL);