2 * S390 64-bit swsusp implementation
4 * Copyright IBM Corp. 2009
6 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
7 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
10 #include <linux/linkage.h>
12 #include <asm/ptrace.h>
13 #include <asm/thread_info.h>
14 #include <asm/asm-offsets.h>
18 * Save register context in absolute 0 lowcore and call swsusp_save() to
19 * create in-memory kernel image. The context is saved in the designated
20 * "store status" memory locations (see POP).
21 * We return from this function twice. The first time during the suspend to
22 * disk process. The second time via the swsusp_arch_resume() function
23 * (see below) in the resume process.
24 * This function runs with disabled interrupts.
27 ENTRY(swsusp_arch_suspend)
28 stmg %r6,%r15,__SF_GPRS(%r15)
30 aghi %r15,-STACK_FRAME_OVERHEAD
31 stg %r1,__SF_BACKCHAIN(%r15)
34 stnsm __SF_EMPTY(%r15),0xfb
36 /* Store prefix register on stack */
39 /* Save prefix register contents for lowcore copy */
40 llgf %r10,__SF_EMPTY(%r15)
42 /* Get pointer to save area */
45 /* Save CPU address */
46 stap __LC_EXT_CPU_ADDR(%r0)
49 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
50 stfpc 0x31c(%r1) /* store fpu control */
51 std 0,0x200(%r1) /* store f0 */
52 std 1,0x208(%r1) /* store f1 */
53 std 2,0x210(%r1) /* store f2 */
54 std 3,0x218(%r1) /* store f3 */
55 std 4,0x220(%r1) /* store f4 */
56 std 5,0x228(%r1) /* store f5 */
57 std 6,0x230(%r1) /* store f6 */
58 std 7,0x238(%r1) /* store f7 */
59 std 8,0x240(%r1) /* store f8 */
60 std 9,0x248(%r1) /* store f9 */
61 std 10,0x250(%r1) /* store f10 */
62 std 11,0x258(%r1) /* store f11 */
63 std 12,0x260(%r1) /* store f12 */
64 std 13,0x268(%r1) /* store f13 */
65 std 14,0x270(%r1) /* store f14 */
66 std 15,0x278(%r1) /* store f15 */
67 stam %a0,%a15,0x340(%r1) /* store access registers */
68 stctg %c0,%c15,0x380(%r1) /* store control registers */
69 stmg %r0,%r15,0x280(%r1) /* store general registers */
71 stpt 0x328(%r1) /* store timer */
72 stck __SF_EMPTY(%r15) /* store clock */
73 stckc 0x330(%r1) /* store clock comparator */
75 /* Update cputime accounting before going to sleep */
76 lg %r0,__LC_LAST_UPDATE_TIMER
78 alg %r0,__LC_SYSTEM_TIMER
79 stg %r0,__LC_SYSTEM_TIMER
80 mvc __LC_LAST_UPDATE_TIMER(8),0x328(%r1)
81 lg %r0,__LC_LAST_UPDATE_CLOCK
82 slg %r0,__SF_EMPTY(%r15)
83 alg %r0,__LC_STEAL_TIMER
84 stg %r0,__LC_STEAL_TIMER
85 mvc __LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)
88 stosm __SF_EMPTY(%r15),0x04
90 /* Set prefix page to zero */
91 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
94 /* Save absolute zero pages */
95 larl %r2,suspend_zero_pages
103 /* Copy lowcore to absolute zero lowcore */
112 brasl %r14,swsusp_save
114 /* Restore prefix register and return */
117 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
122 * Restore saved memory image to correct place and restore register context.
123 * Then we return to the function that called swsusp_arch_suspend().
124 * swsusp_arch_resume() runs with disabled interrupts.
126 ENTRY(swsusp_arch_resume)
127 stmg %r6,%r15,__SF_GPRS(%r15)
129 aghi %r15,-STACK_FRAME_OVERHEAD
130 stg %r1,__SF_BACKCHAIN(%r15)
132 /* Make all free pages stable */
134 brasl %r14,arch_set_page_states
137 stnsm __SF_EMPTY(%r15),0xfb
139 /* Set prefix page to zero */
140 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
143 /* Restore saved image */
144 larl %r1,restore_pblist
166 larl %r1,restart_entry
167 larl %r2,.Lrestart_diag308_psw
170 larl %r1,.Lnew_pgm_check_psw
173 mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1)
178 sigp %r1,%r0,SIGP_SET_ARCHITECTURE
181 larl %r1,smp_cpu_mt_shift
186 sigp %r1,%r0,SIGP_SET_MULTI_THREADING
187 brc 8,smt_done /* accepted */
188 brc 2,smt_loop /* busy, try again */
191 larl %r1,.Lnew_pgm_check_psw
195 /* Switch to original suspend CPU */
196 larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
199 llgh %r1,__LC_EXT_CPU_ADDR(%r0) /* Suspend CPU address: r1 */
201 je restore_registers /* r1 = r2 -> nothing to do */
202 larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
203 mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
205 sigp %r9,%r1,SIGP_INITIAL_CPU_RESET /* sigp initial cpu reset */
206 brc 8,4f /* accepted */
207 brc 2,3b /* busy, try again */
209 /* Suspend CPU not available -> panic */
210 larl %r15,init_thread_union
211 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER)
212 larl %r2,.Lpanic_string
213 larl %r3,_sclp_print_early
216 sigp %r1,%r0,SIGP_SET_ARCHITECTURE
218 larl %r3,.Ldisabled_wait_31
221 /* Switch to suspend CPU */
222 sigp %r9,%r1,SIGP_RESTART /* sigp restart to suspend CPU */
223 brc 2,4b /* busy, try again */
225 sigp %r9,%r2,SIGP_STOP /* sigp stop to current resume CPU */
226 brc 2,5b /* busy, try again */
230 larl %r1,.Lresume_cpu
233 sigp %r9,%r2,SIGP_SENSE /* sigp sense, wait for resume CPU */
234 brc 8,7b /* accepted, status 0, still running */
235 brc 2,7b /* busy, try again */
236 tmll %r9,0x40 /* Test if resume CPU is stopped */
240 /* Restore registers */
241 lghi %r13,0x1000 /* %r1 = pointer to save area */
243 /* Ignore time spent in suspended state. */
245 stck __LC_LAST_UPDATE_CLOCK(%r1)
246 spt 0x328(%r13) /* reprogram timer */
247 //sckc 0x330(%r13) /* set clock comparator */
249 lctlg %c0,%c15,0x380(%r13) /* load control registers */
250 lam %a0,%a15,0x340(%r13) /* load access registers */
252 lfpc 0x31c(%r13) /* load fpu control */
253 ld 0,0x200(%r13) /* load f0 */
254 ld 1,0x208(%r13) /* load f1 */
255 ld 2,0x210(%r13) /* load f2 */
256 ld 3,0x218(%r13) /* load f3 */
257 ld 4,0x220(%r13) /* load f4 */
258 ld 5,0x228(%r13) /* load f5 */
259 ld 6,0x230(%r13) /* load f6 */
260 ld 7,0x238(%r13) /* load f7 */
261 ld 8,0x240(%r13) /* load f8 */
262 ld 9,0x248(%r13) /* load f9 */
263 ld 10,0x250(%r13) /* load f10 */
264 ld 11,0x258(%r13) /* load f11 */
265 ld 12,0x260(%r13) /* load f12 */
266 ld 13,0x268(%r13) /* load f13 */
267 ld 14,0x270(%r13) /* load f14 */
268 ld 15,0x278(%r13) /* load f15 */
273 /* Save prefix register */
274 mvc __SF_EMPTY(4,%r15),0x318(%r13)
276 /* Restore absolute zero pages */
278 larl %r4,suspend_zero_pages
285 /* Restore prefix register */
289 stosm __SF_EMPTY(%r15),0x04
291 /* Make all free pages unstable */
293 brasl %r14,arch_set_page_states
295 /* Call arch specific early resume code */
296 brasl %r14,s390_early_resume
299 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
303 .section .data..nosave,"aw",@progbits
306 .long 0x000a0000,0x00000000
308 .asciz "Resume not possible because suspend CPU is no longer available"
310 .Lrestart_diag308_psw:
311 .long 0x00080000,0x80000000
312 .Lrestart_suspend_psw:
313 .quad 0x0000000180000000,restart_suspend
315 .quad 0,pgm_check_entry