2 * Copyright (C) 2010 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include "nouveau_drv.h"
30 #include "nouveau_drm.h"
33 nv30_fb_init_tile_region(struct drm_device
*dev
, int i
, uint32_t addr
,
34 uint32_t size
, uint32_t pitch
, uint32_t flags
)
36 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
37 struct nouveau_tile_reg
*tile
= &dev_priv
->tile
.reg
[i
];
39 tile
->addr
= addr
| 1;
40 tile
->limit
= max(1u, addr
+ size
) - 1;
45 nv30_fb_free_tile_region(struct drm_device
*dev
, int i
)
47 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
48 struct nouveau_tile_reg
*tile
= &dev_priv
->tile
.reg
[i
];
50 tile
->addr
= tile
->limit
= tile
->pitch
= 0;
54 calc_bias(struct drm_device
*dev
, int k
, int i
, int j
)
56 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
57 int b
= (dev_priv
->chipset
> 0x30 ?
58 nv_rd32(dev
, 0x122c + 0x10 * k
+ 0x4 * j
) >> (4 * (i
^ 1)) :
61 return 2 * (b
& 0x8 ? b
- 0x10 : b
);
65 calc_ref(struct drm_device
*dev
, int l
, int k
, int i
)
69 for (j
= 0; j
< 4; j
++) {
70 int m
= (l
>> (8 * i
) & 0xff) + calc_bias(dev
, k
, i
, j
);
72 x
|= (0x80 | clamp(m
, 0, 0x1f)) << (8 * j
);
79 nv30_fb_init(struct drm_device
*dev
)
81 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
82 struct nouveau_fb_engine
*pfb
= &dev_priv
->engine
.fb
;
85 pfb
->num_tiles
= NV10_PFB_TILE__SIZE
;
87 /* Turn all the tiling regions off. */
88 for (i
= 0; i
< pfb
->num_tiles
; i
++)
89 pfb
->set_tile_region(dev
, i
);
91 /* Init the memory timing regs at 0x10037c/0x1003ac */
92 if (dev_priv
->chipset
== 0x30 ||
93 dev_priv
->chipset
== 0x31 ||
94 dev_priv
->chipset
== 0x35) {
95 /* Related to ROP count */
96 int n
= (dev_priv
->chipset
== 0x31 ? 2 : 4);
97 int l
= nv_rd32(dev
, 0x1003d0);
99 for (i
= 0; i
< n
; i
++) {
100 for (j
= 0; j
< 3; j
++)
101 nv_wr32(dev
, 0x10037c + 0xc * i
+ 0x4 * j
,
102 calc_ref(dev
, l
, 0, j
));
104 for (j
= 0; j
< 2; j
++)
105 nv_wr32(dev
, 0x1003ac + 0x8 * i
+ 0x4 * j
,
106 calc_ref(dev
, l
, 1, j
));
114 nv30_fb_takedown(struct drm_device
*dev
)