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FRV: Use generic show_interrupts()
[cris-mirror.git] / drivers / media / dvb / frontends / itd1000.c
blobf7a40a18777a0e13a90dfdc7f4e75ce87a952955
1 /*
2 * Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite"
3 *
4 * Copyright (c) 2007-8 Patrick Boettcher <pb@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/delay.h>
25 #include <linux/dvb/frontend.h>
26 #include <linux/i2c.h>
27 #include <linux/slab.h>
28
29 #include "dvb_frontend.h"
30
31 #include "itd1000.h"
32 #include "itd1000_priv.h"
33
34 static int debug;
35 module_param(debug, int, 0644);
36 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
37
38 #define deb(args...) do { \
39 if (debug) { \
40 printk(KERN_DEBUG "ITD1000: " args);\
41 printk("\n"); \
42 } \
43 } while (0)
44
45 #define warn(args...) do { \
46 printk(KERN_WARNING "ITD1000: " args); \
47 printk("\n"); \
48 } while (0)
49
50 #define info(args...) do { \
51 printk(KERN_INFO "ITD1000: " args); \
52 printk("\n"); \
53 } while (0)
54
55 /* don't write more than one byte with flexcop behind */
56 static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 len)
57 {
58 u8 buf[1+len];
59 struct i2c_msg msg = {
60 .addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1
61 };
62 buf[0] = reg;
63 memcpy(&buf[1], v, len);
64
65 /* deb("wr %02x: %02x", reg, v[0]); */
66
67 if (i2c_transfer(state->i2c, &msg, 1) != 1) {
68 printk(KERN_WARNING "itd1000 I2C write failed\n");
69 return -EREMOTEIO;
70 }
71 return 0;
72 }
73
74 static int itd1000_read_reg(struct itd1000_state *state, u8 reg)
75 {
76 u8 val;
77 struct i2c_msg msg[2] = {
78 { .addr = state->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 },
79 { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = &val, .len = 1 },
80 };
81
82 /* ugly flexcop workaround */
83 itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1);
84
85 if (i2c_transfer(state->i2c, msg, 2) != 2) {
86 warn("itd1000 I2C read failed");
87 return -EREMOTEIO;
88 }
89 return val;
90 }
91
92 static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v)
93 {
94 int ret = itd1000_write_regs(state, r, &v, 1);
95 state->shadow[r] = v;
96 return ret;
97 }
98
99
100 static struct {
101 u32 symbol_rate;
102 u8 pgaext : 4; /* PLLFH */
103 u8 bbgvmin : 4; /* BBGVMIN */
104 } itd1000_lpf_pga[] = {
105 { 0, 0x8, 0x3 },
106 { 5200000, 0x8, 0x3 },
107 { 12200000, 0x4, 0x3 },
108 { 15400000, 0x2, 0x3 },
109 { 19800000, 0x2, 0x3 },
110 { 21500000, 0x2, 0x3 },
111 { 24500000, 0x2, 0x3 },
112 { 28400000, 0x2, 0x3 },
113 { 33400000, 0x2, 0x3 },
114 { 34400000, 0x1, 0x4 },
115 { 34400000, 0x1, 0x4 },
116 { 38400000, 0x1, 0x4 },
117 { 38400000, 0x1, 0x4 },
118 { 40400000, 0x1, 0x4 },
119 { 45400000, 0x1, 0x4 },
120 };
121
122 static void itd1000_set_lpf_bw(struct itd1000_state *state, u32 symbol_rate)
123 {
124 u8 i;
125 u8 con1 = itd1000_read_reg(state, CON1) & 0xfd;
126 u8 pllfh = itd1000_read_reg(state, PLLFH) & 0x0f;
127 u8 bbgvmin = itd1000_read_reg(state, BBGVMIN) & 0xf0;
128 u8 bw = itd1000_read_reg(state, BW) & 0xf0;
129
130 deb("symbol_rate = %d", symbol_rate);
131
132 /* not sure what is that ? - starting to download the table */
133 itd1000_write_reg(state, CON1, con1 | (1 << 1));
134
135 for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++)
136 if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) {
137 deb("symrate: index: %d pgaext: %x, bbgvmin: %x", i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin);
138 itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4));
139 itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin));
140 itd1000_write_reg(state, BW, bw | (i & 0x0f));
141 break;
142 }
143
144 itd1000_write_reg(state, CON1, con1 | (0 << 1));
145 }
146
147 static struct {
148 u8 vcorg;
149 u32 fmax_rg;
150 } itd1000_vcorg[] = {
151 { 1, 920000 },
152 { 2, 971000 },
153 { 3, 1031000 },
154 { 4, 1091000 },
155 { 5, 1171000 },
156 { 6, 1281000 },
157 { 7, 1381000 },
158 { 8, 500000 }, /* this is intentional. */
159 { 9, 1451000 },
160 { 10, 1531000 },
161 { 11, 1631000 },
162 { 12, 1741000 },
163 { 13, 1891000 },
164 { 14, 2071000 },
165 { 15, 2250000 },
166 };
167
168 static void itd1000_set_vco(struct itd1000_state *state, u32 freq_khz)
169 {
170 u8 i;
171 u8 gvbb_i2c = itd1000_read_reg(state, GVBB_I2C) & 0xbf;
172 u8 vco_chp1_i2c = itd1000_read_reg(state, VCO_CHP1_I2C) & 0x0f;
173 u8 adcout;
174
175 /* reserved bit again (reset ?) */
176 itd1000_write_reg(state, GVBB_I2C, gvbb_i2c | (1 << 6));
177
178 for (i = 0; i < ARRAY_SIZE(itd1000_vcorg); i++) {
179 if (freq_khz < itd1000_vcorg[i].fmax_rg) {
180 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4));
181 msleep(1);
182
183 adcout = itd1000_read_reg(state, PLLLOCK) & 0x0f;
184
185 deb("VCO: %dkHz: %d -> ADCOUT: %d %02x", freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c);
186
187 if (adcout > 13) {
188 if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15))
189 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4));
190 } else if (adcout < 2) {
191 if (!(itd1000_vcorg[i].vcorg == 1 || itd1000_vcorg[i].vcorg == 9))
192 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4));
193 }
194 break;
195 }
196 }
197 }
198
199 static const struct {
200 u32 freq;
201 u8 values[10]; /* RFTR, RFST1 - RFST9 */
202 } itd1000_fre_values[] = {
203 { 1075000, { 0x59, 0x1d, 0x1c, 0x17, 0x16, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
204 { 1250000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
205 { 1450000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
206 { 1650000, { 0x69, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
207 { 1750000, { 0x69, 0x1e, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
208 { 1850000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },
209 { 1900000, { 0x69, 0x1d, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },
210 { 1950000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0d, 0x0b, 0x0a } },
211 { 2050000, { 0x69, 0x1e, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0b, 0x0a } },
212 { 2150000, { 0x69, 0x1d, 0x1c, 0x17, 0x15, 0x14, 0x13, 0x0f, 0x0e, 0x0b } }
213 };
214
215
216 #define FREF 16
217
218 static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz)
219 {
220 int i, j;
221 u32 plln, pllf;
222 u64 tmp;
223
224 plln = (freq_khz * 1000) / 2 / FREF;
225
226 /* Compute the factional part times 1000 */
227 tmp = plln % 1000000;
228 plln /= 1000000;
229
230 tmp *= 1048576;
231 do_div(tmp, 1000000);
232 pllf = (u32) tmp;
233
234 state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF;
235 deb("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d", freq_khz, state->frequency, pllf, plln);
236
237 itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */;
238 itd1000_write_reg(state, PLLNL, plln & 0xff);
239 itd1000_write_reg(state, PLLFH, (itd1000_read_reg(state, PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f));
240 itd1000_write_reg(state, PLLFM, (pllf >> 8) & 0xff);
241 itd1000_write_reg(state, PLLFL, (pllf >> 0) & 0xff);
242
243 for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) {
244 if (freq_khz <= itd1000_fre_values[i].freq) {
245 deb("fre_values: %d", i);
246 itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]);
247 for (j = 0; j < 9; j++)
248 itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]);
249 break;
250 }
251 }
252
253 itd1000_set_vco(state, freq_khz);
254 }
255
256 static int itd1000_set_parameters(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
257 {
258 struct itd1000_state *state = fe->tuner_priv;
259 u8 pllcon1;
260
261 itd1000_set_lo(state, p->frequency);
262 itd1000_set_lpf_bw(state, p->u.qpsk.symbol_rate);
263
264 pllcon1 = itd1000_read_reg(state, PLLCON1) & 0x7f;
265 itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));
266 itd1000_write_reg(state, PLLCON1, pllcon1);
267
268 return 0;
269 }
270
271 static int itd1000_get_frequency(struct dvb_frontend *fe, u32 *frequency)
272 {
273 struct itd1000_state *state = fe->tuner_priv;
274 *frequency = state->frequency;
275 return 0;
276 }
277
278 static int itd1000_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
279 {
280 return 0;
281 }
282
283 static u8 itd1000_init_tab[][2] = {
284 { PLLCON1, 0x65 }, /* Register does not change */
285 { PLLNH, 0x80 }, /* Bits [7:6] do not change */
286 { RESERVED_0X6D, 0x3b },
287 { VCO_CHP2_I2C, 0x12 },
288 { 0x72, 0xf9 }, /* No such regsister defined */
289 { RESERVED_0X73, 0xff },
290 { RESERVED_0X74, 0xb2 },
291 { RESERVED_0X75, 0xc7 },
292 { EXTGVBBRF, 0xf0 },
293 { DIVAGCCK, 0x80 },
294 { BBTR, 0xa0 },
295 { RESERVED_0X7E, 0x4f },
296 { 0x82, 0x88 }, /* No such regsister defined */
297 { 0x83, 0x80 }, /* No such regsister defined */
298 { 0x84, 0x80 }, /* No such regsister defined */
299 { RESERVED_0X85, 0x74 },
300 { RESERVED_0X86, 0xff },
301 { RESERVED_0X88, 0x02 },
302 { RESERVED_0X89, 0x16 },
303 { RFST0, 0x1f },
304 { RESERVED_0X94, 0x66 },
305 { RESERVED_0X95, 0x66 },
306 { RESERVED_0X96, 0x77 },
307 { RESERVED_0X97, 0x99 },
308 { RESERVED_0X98, 0xff },
309 { RESERVED_0X99, 0xfc },
310 { RESERVED_0X9A, 0xba },
311 { RESERVED_0X9B, 0xaa },
312 };
313
314 static u8 itd1000_reinit_tab[][2] = {
315 { VCO_CHP1_I2C, 0x8a },
316 { BW, 0x87 },
317 { GVBB_I2C, 0x03 },
318 { BBGVMIN, 0x03 },
319 { CON1, 0x2e },
320 };
321
322
323 static int itd1000_init(struct dvb_frontend *fe)
324 {
325 struct itd1000_state *state = fe->tuner_priv;
326 int i;
327
328 for (i = 0; i < ARRAY_SIZE(itd1000_init_tab); i++)
329 itd1000_write_reg(state, itd1000_init_tab[i][0], itd1000_init_tab[i][1]);
330
331 for (i = 0; i < ARRAY_SIZE(itd1000_reinit_tab); i++)
332 itd1000_write_reg(state, itd1000_reinit_tab[i][0], itd1000_reinit_tab[i][1]);
333
334 return 0;
335 }
336
337 static int itd1000_sleep(struct dvb_frontend *fe)
338 {
339 return 0;
340 }
341
342 static int itd1000_release(struct dvb_frontend *fe)
343 {
344 kfree(fe->tuner_priv);
345 fe->tuner_priv = NULL;
346 return 0;
347 }
348
349 static const struct dvb_tuner_ops itd1000_tuner_ops = {
350 .info = {
351 .name = "Integrant ITD1000",
352 .frequency_min = 950000,
353 .frequency_max = 2150000,
354 .frequency_step = 125, /* kHz for QPSK frontends */
355 },
356
357 .release = itd1000_release,
358
359 .init = itd1000_init,
360 .sleep = itd1000_sleep,
361
362 .set_params = itd1000_set_parameters,
363 .get_frequency = itd1000_get_frequency,
364 .get_bandwidth = itd1000_get_bandwidth
365 };
366
367
368 struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg)
369 {
370 struct itd1000_state *state = NULL;
371 u8 i = 0;
372
373 state = kzalloc(sizeof(struct itd1000_state), GFP_KERNEL);
374 if (state == NULL)
375 return NULL;
376
377 state->cfg = cfg;
378 state->i2c = i2c;
379
380 i = itd1000_read_reg(state, 0);
381 if (i != 0) {
382 kfree(state);
383 return NULL;
384 }
385 info("successfully identified (ID: %d)", i);
386
387 memset(state->shadow, 0xff, sizeof(state->shadow));
388 for (i = 0x65; i < 0x9c; i++)
389 state->shadow[i] = itd1000_read_reg(state, i);
390
391 memcpy(&fe->ops.tuner_ops, &itd1000_tuner_ops, sizeof(struct dvb_tuner_ops));
392
393 fe->tuner_priv = state;
394
395 return fe;
396 }
397 EXPORT_SYMBOL(itd1000_attach);
398
399 MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>");
400 MODULE_DESCRIPTION("Integrant ITD1000 driver");
401 MODULE_LICENSE("GPL");
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