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FRV: Use generic show_interrupts()
[cris-mirror.git] / drivers / media / video / mx3_camera.c
blob502e2a40964c1e5f372948988cbd82f710ca4135
1 /*
2 * V4L2 Driver for i.MX3x camera host
3 *
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/version.h>
15 #include <linux/videodev2.h>
16 #include <linux/platform_device.h>
17 #include <linux/clk.h>
18 #include <linux/vmalloc.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21
22 #include <media/v4l2-common.h>
23 #include <media/v4l2-dev.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <media/soc_camera.h>
26 #include <media/soc_mediabus.h>
27
28 #include <mach/ipu.h>
29 #include <mach/mx3_camera.h>
30 #include <mach/dma.h>
31
32 #define MX3_CAM_DRV_NAME "mx3-camera"
33
34 /* CMOS Sensor Interface Registers */
35 #define CSI_REG_START 0x60
36
37 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
38 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
39 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
40 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
41 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
42 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
43 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
44 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
45 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
46 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
47
48 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
49 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
50 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
51 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
52 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
53 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
54 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
55 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
56 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
57 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
58
59 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
61 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
62
63 #define MAX_VIDEO_MEM 16
64
65 enum csi_buffer_state {
66 CSI_BUF_NEEDS_INIT,
67 CSI_BUF_PREPARED,
68 };
69
70 struct mx3_camera_buffer {
71 /* common v4l buffer stuff -- must be first */
72 struct vb2_buffer vb;
73 enum csi_buffer_state state;
74 struct list_head queue;
75
76 /* One descriptot per scatterlist (per frame) */
77 struct dma_async_tx_descriptor *txd;
78
79 /* We have to "build" a scatterlist ourselves - one element per frame */
80 struct scatterlist sg;
81 };
82
83 /**
84 * struct mx3_camera_dev - i.MX3x camera (CSI) object
85 * @dev: camera device, to which the coherent buffer is attached
86 * @icd: currently attached camera sensor
87 * @clk: pointer to clock
88 * @base: remapped register base address
89 * @pdata: platform data
90 * @platform_flags: platform flags
91 * @mclk: master clock frequency in Hz
92 * @capture: list of capture videobuffers
93 * @lock: protects video buffer lists
94 * @active: active video buffer
95 * @idmac_channel: array of pointers to IPU DMAC DMA channels
96 * @soc_host: embedded soc_host object
97 */
98 struct mx3_camera_dev {
99 /*
100 * i.MX3x is only supposed to handle one camera on its Camera Sensor
101 * Interface. If anyone ever builds hardware to enable more than one
102 * camera _simultaneously_, they will have to modify this driver too
103 */
104 struct soc_camera_device *icd;
105 struct clk *clk;
106
107 void __iomem *base;
108
109 struct mx3_camera_pdata *pdata;
110
111 unsigned long platform_flags;
112 unsigned long mclk;
113
114 struct list_head capture;
115 spinlock_t lock; /* Protects video buffer lists */
116 struct mx3_camera_buffer *active;
117 struct vb2_alloc_ctx *alloc_ctx;
118 enum v4l2_field field;
119 int sequence;
120
121 /* IDMAC / dmaengine interface */
122 struct idmac_channel *idmac_channel[1]; /* We need one channel */
123
124 struct soc_camera_host soc_host;
125 };
126
127 struct dma_chan_request {
128 struct mx3_camera_dev *mx3_cam;
129 enum ipu_channel id;
130 };
131
132 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
133 {
134 return __raw_readl(mx3->base + reg);
135 }
136
137 static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
138 {
139 __raw_writel(value, mx3->base + reg);
140 }
141
142 static struct mx3_camera_buffer *to_mx3_vb(struct vb2_buffer *vb)
143 {
144 return container_of(vb, struct mx3_camera_buffer, vb);
145 }
146
147 /* Called from the IPU IDMAC ISR */
148 static void mx3_cam_dma_done(void *arg)
149 {
150 struct idmac_tx_desc *desc = to_tx_desc(arg);
151 struct dma_chan *chan = desc->txd.chan;
152 struct idmac_channel *ichannel = to_idmac_chan(chan);
153 struct mx3_camera_dev *mx3_cam = ichannel->client;
154
155 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
156 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
157
158 spin_lock(&mx3_cam->lock);
159 if (mx3_cam->active) {
160 struct vb2_buffer *vb = &mx3_cam->active->vb;
161 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
162
163 list_del_init(&buf->queue);
164 do_gettimeofday(&vb->v4l2_buf.timestamp);
165 vb->v4l2_buf.field = mx3_cam->field;
166 vb->v4l2_buf.sequence = mx3_cam->sequence++;
167 vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
168 }
169
170 if (list_empty(&mx3_cam->capture)) {
171 mx3_cam->active = NULL;
172 spin_unlock(&mx3_cam->lock);
173
174 /*
175 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
176 * not get updated
177 */
178 return;
179 }
180
181 mx3_cam->active = list_entry(mx3_cam->capture.next,
182 struct mx3_camera_buffer, queue);
183 spin_unlock(&mx3_cam->lock);
184 }
185
186 /*
187 * Videobuf operations
188 */
189
190 /*
191 * Calculate the __buffer__ (not data) size and number of buffers.
192 */
193 static int mx3_videobuf_setup(struct vb2_queue *vq,
194 unsigned int *count, unsigned int *num_planes,
195 unsigned long sizes[], void *alloc_ctxs[])
196 {
197 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
198 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
199 struct mx3_camera_dev *mx3_cam = ici->priv;
200 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
201 icd->current_fmt->host_fmt);
202
203 if (bytes_per_line < 0)
204 return bytes_per_line;
205
206 if (!mx3_cam->idmac_channel[0])
207 return -EINVAL;
208
209 *num_planes = 1;
210
211 mx3_cam->sequence = 0;
212 sizes[0] = bytes_per_line * icd->user_height;
213 alloc_ctxs[0] = mx3_cam->alloc_ctx;
214
215 if (!*count)
216 *count = 32;
217
218 if (sizes[0] * *count > MAX_VIDEO_MEM * 1024 * 1024)
219 *count = MAX_VIDEO_MEM * 1024 * 1024 / sizes[0];
220
221 return 0;
222 }
223
224 static int mx3_videobuf_prepare(struct vb2_buffer *vb)
225 {
226 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
227 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
228 struct mx3_camera_dev *mx3_cam = ici->priv;
229 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
230 struct scatterlist *sg;
231 struct mx3_camera_buffer *buf;
232 size_t new_size;
233 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
234 icd->current_fmt->host_fmt);
235
236 if (bytes_per_line < 0)
237 return bytes_per_line;
238
239 buf = to_mx3_vb(vb);
240 sg = &buf->sg;
241
242 new_size = bytes_per_line * icd->user_height;
243
244 if (vb2_plane_size(vb, 0) < new_size) {
245 dev_err(icd->dev.parent, "Buffer too small (%lu < %zu)\n",
246 vb2_plane_size(vb, 0), new_size);
247 return -ENOBUFS;
248 }
249
250 if (buf->state == CSI_BUF_NEEDS_INIT) {
251 sg_dma_address(sg) = vb2_dma_contig_plane_paddr(vb, 0);
252 sg_dma_len(sg) = new_size;
253
254 buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
255 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
256 DMA_PREP_INTERRUPT);
257 if (!buf->txd)
258 return -EIO;
259
260 buf->txd->callback_param = buf->txd;
261 buf->txd->callback = mx3_cam_dma_done;
262
263 buf->state = CSI_BUF_PREPARED;
264 }
265
266 vb2_set_plane_payload(vb, 0, new_size);
267
268 return 0;
269 }
270
271 static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
272 {
273 /* Add more formats as need arises and test possibilities appear... */
274 switch (fourcc) {
275 case V4L2_PIX_FMT_RGB24:
276 return IPU_PIX_FMT_RGB24;
277 case V4L2_PIX_FMT_UYVY:
278 case V4L2_PIX_FMT_RGB565:
279 default:
280 return IPU_PIX_FMT_GENERIC;
281 }
282 }
283
284 static void mx3_videobuf_queue(struct vb2_buffer *vb)
285 {
286 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
287 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
288 struct mx3_camera_dev *mx3_cam = ici->priv;
289 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
290 struct dma_async_tx_descriptor *txd = buf->txd;
291 struct idmac_channel *ichan = to_idmac_chan(txd->chan);
292 struct idmac_video_param *video = &ichan->params.video;
293 dma_cookie_t cookie;
294 u32 fourcc = icd->current_fmt->host_fmt->fourcc;
295 unsigned long flags;
296
297 /* This is the configuration of one sg-element */
298 video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
299
300 if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
301 /*
302 * If the IPU DMA channel is configured to transport
303 * generic 8-bit data, we have to set up correctly the
304 * geometry parameters upon the current pixel format.
305 * So, since the DMA horizontal parameters are expressed
306 * in bytes not pixels, convert these in the right unit.
307 */
308 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
309 icd->current_fmt->host_fmt);
310 BUG_ON(bytes_per_line <= 0);
311
312 video->out_width = bytes_per_line;
313 video->out_height = icd->user_height;
314 video->out_stride = bytes_per_line;
315 } else {
316 /*
317 * For IPU known formats the pixel unit will be managed
318 * successfully by the IPU code
319 */
320 video->out_width = icd->user_width;
321 video->out_height = icd->user_height;
322 video->out_stride = icd->user_width;
323 }
324
325 #ifdef DEBUG
326 /* helps to see what DMA actually has written */
327 if (vb2_plane_vaddr(vb, 0))
328 memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0));
329 #endif
330
331 spin_lock_irqsave(&mx3_cam->lock, flags);
332 list_add_tail(&buf->queue, &mx3_cam->capture);
333
334 if (!mx3_cam->active)
335 mx3_cam->active = buf;
336
337 spin_unlock_irq(&mx3_cam->lock);
338
339 cookie = txd->tx_submit(txd);
340 dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
341 cookie, sg_dma_address(&buf->sg));
342
343 if (cookie >= 0)
344 return;
345
346 spin_lock_irq(&mx3_cam->lock);
347
348 /* Submit error */
349 list_del_init(&buf->queue);
350
351 if (mx3_cam->active == buf)
352 mx3_cam->active = NULL;
353
354 spin_unlock_irqrestore(&mx3_cam->lock, flags);
355 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
356 }
357
358 static void mx3_videobuf_release(struct vb2_buffer *vb)
359 {
360 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
361 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
362 struct mx3_camera_dev *mx3_cam = ici->priv;
363 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
364 struct dma_async_tx_descriptor *txd = buf->txd;
365 unsigned long flags;
366
367 dev_dbg(icd->dev.parent,
368 "Release%s DMA 0x%08x, queue %sempty\n",
369 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
370 list_empty(&buf->queue) ? "" : "not ");
371
372 spin_lock_irqsave(&mx3_cam->lock, flags);
373
374 if (mx3_cam->active == buf)
375 mx3_cam->active = NULL;
376
377 /* Doesn't hurt also if the list is empty */
378 list_del_init(&buf->queue);
379 buf->state = CSI_BUF_NEEDS_INIT;
380
381 if (txd) {
382 buf->txd = NULL;
383 if (mx3_cam->idmac_channel[0])
384 async_tx_ack(txd);
385 }
386
387 spin_unlock_irqrestore(&mx3_cam->lock, flags);
388 }
389
390 static int mx3_videobuf_init(struct vb2_buffer *vb)
391 {
392 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
393 /* This is for locking debugging only */
394 INIT_LIST_HEAD(&buf->queue);
395 sg_init_table(&buf->sg, 1);
396
397 buf->state = CSI_BUF_NEEDS_INIT;
398 buf->txd = NULL;
399
400 return 0;
401 }
402
403 static struct vb2_ops mx3_videobuf_ops = {
404 .queue_setup = mx3_videobuf_setup,
405 .buf_prepare = mx3_videobuf_prepare,
406 .buf_queue = mx3_videobuf_queue,
407 .buf_cleanup = mx3_videobuf_release,
408 .buf_init = mx3_videobuf_init,
409 .wait_prepare = soc_camera_unlock,
410 .wait_finish = soc_camera_lock,
411 };
412
413 static int mx3_camera_init_videobuf(struct vb2_queue *q,
414 struct soc_camera_device *icd)
415 {
416 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
417 q->io_modes = VB2_MMAP | VB2_USERPTR;
418 q->drv_priv = icd;
419 q->ops = &mx3_videobuf_ops;
420 q->mem_ops = &vb2_dma_contig_memops;
421 q->buf_struct_size = sizeof(struct mx3_camera_buffer);
422
423 return vb2_queue_init(q);
424 }
425
426 /* First part of ipu_csi_init_interface() */
427 static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
428 struct soc_camera_device *icd)
429 {
430 u32 conf;
431 long rate;
432
433 /* Set default size: ipu_csi_set_window_size() */
434 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
435 /* ...and position to 0:0: ipu_csi_set_window_pos() */
436 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
437 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
438
439 /* We use only gated clock synchronisation mode so far */
440 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
441
442 /* Set generic data, platform-biggest bus-width */
443 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
444
445 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
446 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
447 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
448 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
449 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
450 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
451 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
452 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
453
454 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
455 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
456 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
457 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
458 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
459 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
460 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
461 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
462 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
463 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
464 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
465 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
466
467 /* ipu_csi_init_interface() */
468 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
469
470 clk_enable(mx3_cam->clk);
471 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
472 dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
473 if (rate)
474 clk_set_rate(mx3_cam->clk, rate);
475 }
476
477 /* Called with .video_lock held */
478 static int mx3_camera_add_device(struct soc_camera_device *icd)
479 {
480 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
481 struct mx3_camera_dev *mx3_cam = ici->priv;
482
483 if (mx3_cam->icd)
484 return -EBUSY;
485
486 mx3_camera_activate(mx3_cam, icd);
487
488 mx3_cam->icd = icd;
489
490 dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
491 icd->devnum);
492
493 return 0;
494 }
495
496 /* Called with .video_lock held */
497 static void mx3_camera_remove_device(struct soc_camera_device *icd)
498 {
499 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
500 struct mx3_camera_dev *mx3_cam = ici->priv;
501 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
502
503 BUG_ON(icd != mx3_cam->icd);
504
505 if (*ichan) {
506 dma_release_channel(&(*ichan)->dma_chan);
507 *ichan = NULL;
508 }
509
510 clk_disable(mx3_cam->clk);
511
512 mx3_cam->icd = NULL;
513
514 dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
515 icd->devnum);
516 }
517
518 static int test_platform_param(struct mx3_camera_dev *mx3_cam,
519 unsigned char buswidth, unsigned long *flags)
520 {
521 /*
522 * Platform specified synchronization and pixel clock polarities are
523 * only a recommendation and are only used during probing. MX3x
524 * camera interface only works in master mode, i.e., uses HSYNC and
525 * VSYNC signals from the sensor
526 */
527 *flags = SOCAM_MASTER |
528 SOCAM_HSYNC_ACTIVE_HIGH |
529 SOCAM_HSYNC_ACTIVE_LOW |
530 SOCAM_VSYNC_ACTIVE_HIGH |
531 SOCAM_VSYNC_ACTIVE_LOW |
532 SOCAM_PCLK_SAMPLE_RISING |
533 SOCAM_PCLK_SAMPLE_FALLING |
534 SOCAM_DATA_ACTIVE_HIGH |
535 SOCAM_DATA_ACTIVE_LOW;
536
537 /*
538 * If requested data width is supported by the platform, use it or any
539 * possible lower value - i.MX31 is smart enough to schift bits
540 */
541 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
542 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
543 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
544 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
545 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
546 SOCAM_DATAWIDTH_4;
547 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
548 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
549 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
550 *flags |= SOCAM_DATAWIDTH_4;
551
552 switch (buswidth) {
553 case 15:
554 if (!(*flags & SOCAM_DATAWIDTH_15))
555 return -EINVAL;
556 break;
557 case 10:
558 if (!(*flags & SOCAM_DATAWIDTH_10))
559 return -EINVAL;
560 break;
561 case 8:
562 if (!(*flags & SOCAM_DATAWIDTH_8))
563 return -EINVAL;
564 break;
565 case 4:
566 if (!(*flags & SOCAM_DATAWIDTH_4))
567 return -EINVAL;
568 break;
569 default:
570 dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
571 "Unsupported bus width %d\n", buswidth);
572 return -EINVAL;
573 }
574
575 return 0;
576 }
577
578 static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
579 const unsigned int depth)
580 {
581 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
582 struct mx3_camera_dev *mx3_cam = ici->priv;
583 unsigned long bus_flags, camera_flags;
584 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
585
586 dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
587
588 if (ret < 0)
589 return ret;
590
591 camera_flags = icd->ops->query_bus_param(icd);
592
593 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
594 if (ret < 0)
595 dev_warn(icd->dev.parent,
596 "Flags incompatible: camera %lx, host %lx\n",
597 camera_flags, bus_flags);
598
599 return ret;
600 }
601
602 static bool chan_filter(struct dma_chan *chan, void *arg)
603 {
604 struct dma_chan_request *rq = arg;
605 struct mx3_camera_pdata *pdata;
606
607 if (!imx_dma_is_ipu(chan))
608 return false;
609
610 if (!rq)
611 return false;
612
613 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
614
615 return rq->id == chan->chan_id &&
616 pdata->dma_dev == chan->device->dev;
617 }
618
619 static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
620 {
621 .fourcc = V4L2_PIX_FMT_SBGGR8,
622 .name = "Bayer BGGR (sRGB) 8 bit",
623 .bits_per_sample = 8,
624 .packing = SOC_MBUS_PACKING_NONE,
625 .order = SOC_MBUS_ORDER_LE,
626 }, {
627 .fourcc = V4L2_PIX_FMT_GREY,
628 .name = "Monochrome 8 bit",
629 .bits_per_sample = 8,
630 .packing = SOC_MBUS_PACKING_NONE,
631 .order = SOC_MBUS_ORDER_LE,
632 },
633 };
634
635 /* This will be corrected as we get more formats */
636 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
637 {
638 return fmt->packing == SOC_MBUS_PACKING_NONE ||
639 (fmt->bits_per_sample == 8 &&
640 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
641 (fmt->bits_per_sample > 8 &&
642 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
643 }
644
645 static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
646 struct soc_camera_format_xlate *xlate)
647 {
648 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
649 struct device *dev = icd->dev.parent;
650 int formats = 0, ret;
651 enum v4l2_mbus_pixelcode code;
652 const struct soc_mbus_pixelfmt *fmt;
653
654 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
655 if (ret < 0)
656 /* No more formats */
657 return 0;
658
659 fmt = soc_mbus_get_fmtdesc(code);
660 if (!fmt) {
661 dev_err(icd->dev.parent,
662 "Invalid format code #%u: %d\n", idx, code);
663 return 0;
664 }
665
666 /* This also checks support for the requested bits-per-sample */
667 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
668 if (ret < 0)
669 return 0;
670
671 switch (code) {
672 case V4L2_MBUS_FMT_SBGGR10_1X10:
673 formats++;
674 if (xlate) {
675 xlate->host_fmt = &mx3_camera_formats[0];
676 xlate->code = code;
677 xlate++;
678 dev_dbg(dev, "Providing format %s using code %d\n",
679 mx3_camera_formats[0].name, code);
680 }
681 break;
682 case V4L2_MBUS_FMT_Y10_1X10:
683 formats++;
684 if (xlate) {
685 xlate->host_fmt = &mx3_camera_formats[1];
686 xlate->code = code;
687 xlate++;
688 dev_dbg(dev, "Providing format %s using code %d\n",
689 mx3_camera_formats[1].name, code);
690 }
691 break;
692 default:
693 if (!mx3_camera_packing_supported(fmt))
694 return 0;
695 }
696
697 /* Generic pass-through */
698 formats++;
699 if (xlate) {
700 xlate->host_fmt = fmt;
701 xlate->code = code;
702 dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
703 (fmt->fourcc >> (0*8)) & 0xFF,
704 (fmt->fourcc >> (1*8)) & 0xFF,
705 (fmt->fourcc >> (2*8)) & 0xFF,
706 (fmt->fourcc >> (3*8)) & 0xFF);
707 xlate++;
708 }
709
710 return formats;
711 }
712
713 static void configure_geometry(struct mx3_camera_dev *mx3_cam,
714 unsigned int width, unsigned int height,
715 enum v4l2_mbus_pixelcode code)
716 {
717 u32 ctrl, width_field, height_field;
718 const struct soc_mbus_pixelfmt *fmt;
719
720 fmt = soc_mbus_get_fmtdesc(code);
721 BUG_ON(!fmt);
722
723 if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
724 /*
725 * As the CSI will be configured to output BAYER, here
726 * the width parameter count the number of samples to
727 * capture to complete the whole image width.
728 */
729 width *= soc_mbus_samples_per_pixel(fmt);
730 BUG_ON(width < 0);
731 }
732
733 /* Setup frame size - this cannot be changed on-the-fly... */
734 width_field = width - 1;
735 height_field = height - 1;
736 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
737
738 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
739 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
740
741 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
742
743 /* ...and position */
744 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
745 /* Sensor does the cropping */
746 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
747 }
748
749 static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
750 {
751 dma_cap_mask_t mask;
752 struct dma_chan *chan;
753 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
754 /* We have to use IDMAC_IC_7 for Bayer / generic data */
755 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
756 .id = IDMAC_IC_7};
757
758 dma_cap_zero(mask);
759 dma_cap_set(DMA_SLAVE, mask);
760 dma_cap_set(DMA_PRIVATE, mask);
761 chan = dma_request_channel(mask, chan_filter, &rq);
762 if (!chan)
763 return -EBUSY;
764
765 *ichan = to_idmac_chan(chan);
766 (*ichan)->client = mx3_cam;
767
768 return 0;
769 }
770
771 /*
772 * FIXME: learn to use stride != width, then we can keep stride properly aligned
773 * and support arbitrary (even) widths.
774 */
775 static inline void stride_align(__u32 *width)
776 {
777 if (((*width + 7) & ~7) < 4096)
778 *width = (*width + 7) & ~7;
779 else
780 *width = *width & ~7;
781 }
782
783 /*
784 * As long as we don't implement host-side cropping and scaling, we can use
785 * default g_crop and cropcap from soc_camera.c
786 */
787 static int mx3_camera_set_crop(struct soc_camera_device *icd,
788 struct v4l2_crop *a)
789 {
790 struct v4l2_rect *rect = &a->c;
791 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
792 struct mx3_camera_dev *mx3_cam = ici->priv;
793 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
794 struct v4l2_mbus_framefmt mf;
795 int ret;
796
797 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
798 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
799
800 ret = v4l2_subdev_call(sd, video, s_crop, a);
801 if (ret < 0)
802 return ret;
803
804 /* The capture device might have changed its output */
805 ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
806 if (ret < 0)
807 return ret;
808
809 if (mf.width & 7) {
810 /* Ouch! We can only handle 8-byte aligned width... */
811 stride_align(&mf.width);
812 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
813 if (ret < 0)
814 return ret;
815 }
816
817 if (mf.width != icd->user_width || mf.height != icd->user_height)
818 configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
819
820 dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
821 mf.width, mf.height);
822
823 icd->user_width = mf.width;
824 icd->user_height = mf.height;
825
826 return ret;
827 }
828
829 static int mx3_camera_set_fmt(struct soc_camera_device *icd,
830 struct v4l2_format *f)
831 {
832 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
833 struct mx3_camera_dev *mx3_cam = ici->priv;
834 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
835 const struct soc_camera_format_xlate *xlate;
836 struct v4l2_pix_format *pix = &f->fmt.pix;
837 struct v4l2_mbus_framefmt mf;
838 int ret;
839
840 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
841 if (!xlate) {
842 dev_warn(icd->dev.parent, "Format %x not found\n",
843 pix->pixelformat);
844 return -EINVAL;
845 }
846
847 stride_align(&pix->width);
848 dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
849
850 /*
851 * Might have to perform a complete interface initialisation like in
852 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
853 * mxc_v4l2_s_fmt()
854 */
855
856 configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
857
858 mf.width = pix->width;
859 mf.height = pix->height;
860 mf.field = pix->field;
861 mf.colorspace = pix->colorspace;
862 mf.code = xlate->code;
863
864 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
865 if (ret < 0)
866 return ret;
867
868 if (mf.code != xlate->code)
869 return -EINVAL;
870
871 if (!mx3_cam->idmac_channel[0]) {
872 ret = acquire_dma_channel(mx3_cam);
873 if (ret < 0)
874 return ret;
875 }
876
877 pix->width = mf.width;
878 pix->height = mf.height;
879 pix->field = mf.field;
880 mx3_cam->field = mf.field;
881 pix->colorspace = mf.colorspace;
882 icd->current_fmt = xlate;
883
884 pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
885 xlate->host_fmt);
886 if (pix->bytesperline < 0)
887 return pix->bytesperline;
888 pix->sizeimage = pix->height * pix->bytesperline;
889
890 dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
891
892 return ret;
893 }
894
895 static int mx3_camera_try_fmt(struct soc_camera_device *icd,
896 struct v4l2_format *f)
897 {
898 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
899 const struct soc_camera_format_xlate *xlate;
900 struct v4l2_pix_format *pix = &f->fmt.pix;
901 struct v4l2_mbus_framefmt mf;
902 __u32 pixfmt = pix->pixelformat;
903 int ret;
904
905 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
906 if (pixfmt && !xlate) {
907 dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
908 return -EINVAL;
909 }
910
911 /* limit to MX3 hardware capabilities */
912 if (pix->height > 4096)
913 pix->height = 4096;
914 if (pix->width > 4096)
915 pix->width = 4096;
916
917 pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
918 xlate->host_fmt);
919 if (pix->bytesperline < 0)
920 return pix->bytesperline;
921 pix->sizeimage = pix->height * pix->bytesperline;
922
923 /* limit to sensor capabilities */
924 mf.width = pix->width;
925 mf.height = pix->height;
926 mf.field = pix->field;
927 mf.colorspace = pix->colorspace;
928 mf.code = xlate->code;
929
930 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
931 if (ret < 0)
932 return ret;
933
934 pix->width = mf.width;
935 pix->height = mf.height;
936 pix->colorspace = mf.colorspace;
937
938 switch (mf.field) {
939 case V4L2_FIELD_ANY:
940 pix->field = V4L2_FIELD_NONE;
941 break;
942 case V4L2_FIELD_NONE:
943 break;
944 default:
945 dev_err(icd->dev.parent, "Field type %d unsupported.\n",
946 mf.field);
947 ret = -EINVAL;
948 }
949
950 return ret;
951 }
952
953 static int mx3_camera_reqbufs(struct soc_camera_device *icd,
954 struct v4l2_requestbuffers *p)
955 {
956 return 0;
957 }
958
959 static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
960 {
961 struct soc_camera_device *icd = file->private_data;
962
963 return vb2_poll(&icd->vb2_vidq, file, pt);
964 }
965
966 static int mx3_camera_querycap(struct soc_camera_host *ici,
967 struct v4l2_capability *cap)
968 {
969 /* cap->name is set by the firendly caller:-> */
970 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
971 cap->version = KERNEL_VERSION(0, 2, 2);
972 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
973
974 return 0;
975 }
976
977 static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
978 {
979 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
980 struct mx3_camera_dev *mx3_cam = ici->priv;
981 unsigned long bus_flags, camera_flags, common_flags;
982 u32 dw, sens_conf;
983 const struct soc_mbus_pixelfmt *fmt;
984 int buswidth;
985 int ret;
986 const struct soc_camera_format_xlate *xlate;
987 struct device *dev = icd->dev.parent;
988
989 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
990 if (!fmt)
991 return -EINVAL;
992
993 buswidth = fmt->bits_per_sample;
994 ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
995
996 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
997 if (!xlate) {
998 dev_warn(dev, "Format %x not found\n", pixfmt);
999 return -EINVAL;
1000 }
1001
1002 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
1003
1004 if (ret < 0)
1005 return ret;
1006
1007 camera_flags = icd->ops->query_bus_param(icd);
1008
1009 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
1010 dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
1011 camera_flags, bus_flags, common_flags);
1012 if (!common_flags) {
1013 dev_dbg(dev, "no common flags");
1014 return -EINVAL;
1015 }
1016
1017 /* Make choices, based on platform preferences */
1018 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
1019 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
1020 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1021 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
1022 else
1023 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
1024 }
1025
1026 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
1027 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
1028 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1029 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
1030 else
1031 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
1032 }
1033
1034 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
1035 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
1036 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1037 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
1038 else
1039 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
1040 }
1041
1042 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
1043 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
1044 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1045 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
1046 else
1047 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
1048 }
1049
1050 /*
1051 * Make the camera work in widest common mode, we'll take care of
1052 * the rest
1053 */
1054 if (common_flags & SOCAM_DATAWIDTH_15)
1055 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1056 SOCAM_DATAWIDTH_15;
1057 else if (common_flags & SOCAM_DATAWIDTH_10)
1058 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1059 SOCAM_DATAWIDTH_10;
1060 else if (common_flags & SOCAM_DATAWIDTH_8)
1061 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1062 SOCAM_DATAWIDTH_8;
1063 else
1064 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1065 SOCAM_DATAWIDTH_4;
1066
1067 ret = icd->ops->set_bus_param(icd, common_flags);
1068 if (ret < 0) {
1069 dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
1070 common_flags, ret);
1071 return ret;
1072 }
1073
1074 /*
1075 * So far only gated clock mode is supported. Add a line
1076 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1077 * below and select the required mode when supporting other
1078 * synchronisation protocols.
1079 */
1080 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1081 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1082 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1083 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1084 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1085 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1086 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1087
1088 /* TODO: Support RGB and YUV formats */
1089
1090 /* This has been set in mx3_camera_activate(), but we clear it above */
1091 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1092
1093 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
1094 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1095 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
1096 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1097 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
1098 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1099 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
1100 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1101
1102 /* Just do what we're asked to do */
1103 switch (xlate->host_fmt->bits_per_sample) {
1104 case 4:
1105 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1106 break;
1107 case 8:
1108 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1109 break;
1110 case 10:
1111 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1112 break;
1113 default:
1114 /*
1115 * Actually it can only be 15 now, default is just to silence
1116 * compiler warnings
1117 */
1118 case 15:
1119 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1120 }
1121
1122 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1123
1124 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1125
1126 return 0;
1127 }
1128
1129 static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1130 .owner = THIS_MODULE,
1131 .add = mx3_camera_add_device,
1132 .remove = mx3_camera_remove_device,
1133 .set_crop = mx3_camera_set_crop,
1134 .set_fmt = mx3_camera_set_fmt,
1135 .try_fmt = mx3_camera_try_fmt,
1136 .get_formats = mx3_camera_get_formats,
1137 .init_videobuf2 = mx3_camera_init_videobuf,
1138 .reqbufs = mx3_camera_reqbufs,
1139 .poll = mx3_camera_poll,
1140 .querycap = mx3_camera_querycap,
1141 .set_bus_param = mx3_camera_set_bus_param,
1142 };
1143
1144 static int __devinit mx3_camera_probe(struct platform_device *pdev)
1145 {
1146 struct mx3_camera_dev *mx3_cam;
1147 struct resource *res;
1148 void __iomem *base;
1149 int err = 0;
1150 struct soc_camera_host *soc_host;
1151
1152 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1153 if (!res) {
1154 err = -ENODEV;
1155 goto egetres;
1156 }
1157
1158 mx3_cam = vzalloc(sizeof(*mx3_cam));
1159 if (!mx3_cam) {
1160 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1161 err = -ENOMEM;
1162 goto ealloc;
1163 }
1164
1165 mx3_cam->clk = clk_get(&pdev->dev, NULL);
1166 if (IS_ERR(mx3_cam->clk)) {
1167 err = PTR_ERR(mx3_cam->clk);
1168 goto eclkget;
1169 }
1170
1171 mx3_cam->pdata = pdev->dev.platform_data;
1172 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1173 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
1174 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
1175 MX3_CAMERA_DATAWIDTH_15))) {
1176 /*
1177 * Platform hasn't set available data widths. This is bad.
1178 * Warn and use a default.
1179 */
1180 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1181 "data widths, using default 8 bit\n");
1182 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1183 }
1184
1185 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1186 if (!mx3_cam->mclk) {
1187 dev_warn(&pdev->dev,
1188 "mclk_10khz == 0! Please, fix your platform data. "
1189 "Using default 20MHz\n");
1190 mx3_cam->mclk = 20000000;
1191 }
1192
1193 /* list of video-buffers */
1194 INIT_LIST_HEAD(&mx3_cam->capture);
1195 spin_lock_init(&mx3_cam->lock);
1196
1197 base = ioremap(res->start, resource_size(res));
1198 if (!base) {
1199 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
1200 err = -ENOMEM;
1201 goto eioremap;
1202 }
1203
1204 mx3_cam->base = base;
1205
1206 soc_host = &mx3_cam->soc_host;
1207 soc_host->drv_name = MX3_CAM_DRV_NAME;
1208 soc_host->ops = &mx3_soc_camera_host_ops;
1209 soc_host->priv = mx3_cam;
1210 soc_host->v4l2_dev.dev = &pdev->dev;
1211 soc_host->nr = pdev->id;
1212
1213 mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1214 if (IS_ERR(mx3_cam->alloc_ctx)) {
1215 err = PTR_ERR(mx3_cam->alloc_ctx);
1216 goto eallocctx;
1217 }
1218
1219 err = soc_camera_host_register(soc_host);
1220 if (err)
1221 goto ecamhostreg;
1222
1223 /* IDMAC interface */
1224 dmaengine_get();
1225
1226 return 0;
1227
1228 ecamhostreg:
1229 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1230 eallocctx:
1231 iounmap(base);
1232 eioremap:
1233 clk_put(mx3_cam->clk);
1234 eclkget:
1235 vfree(mx3_cam);
1236 ealloc:
1237 egetres:
1238 return err;
1239 }
1240
1241 static int __devexit mx3_camera_remove(struct platform_device *pdev)
1242 {
1243 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1244 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1245 struct mx3_camera_dev, soc_host);
1246
1247 clk_put(mx3_cam->clk);
1248
1249 soc_camera_host_unregister(soc_host);
1250
1251 iounmap(mx3_cam->base);
1252
1253 /*
1254 * The channel has either not been allocated,
1255 * or should have been released
1256 */
1257 if (WARN_ON(mx3_cam->idmac_channel[0]))
1258 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1259
1260 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1261
1262 vfree(mx3_cam);
1263
1264 dmaengine_put();
1265
1266 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
1267
1268 return 0;
1269 }
1270
1271 static struct platform_driver mx3_camera_driver = {
1272 .driver = {
1273 .name = MX3_CAM_DRV_NAME,
1274 },
1275 .probe = mx3_camera_probe,
1276 .remove = __devexit_p(mx3_camera_remove),
1277 };
1278
1279
1280 static int __init mx3_camera_init(void)
1281 {
1282 return platform_driver_register(&mx3_camera_driver);
1283 }
1284
1285 static void __exit mx3_camera_exit(void)
1286 {
1287 platform_driver_unregister(&mx3_camera_driver);
1288 }
1289
1290 module_init(mx3_camera_init);
1291 module_exit(mx3_camera_exit);
1292
1293 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1294 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1295 MODULE_LICENSE("GPL v2");
1296 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);
CRIS linux kernel tree