Linux 3.11-rc3
[cris-mirror.git] / arch / arm / mach-msm / clock-pcom.h
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1 /*
2 * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
15 #define __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
17 /* clock IDs used by the modem processor */
19 #define P_ACPU_CLK 0 /* Applications processor clock */
20 #define P_ADM_CLK 1 /* Applications data mover clock */
21 #define P_ADSP_CLK 2 /* ADSP clock */
22 #define P_EBI1_CLK 3 /* External bus interface 1 clock */
23 #define P_EBI2_CLK 4 /* External bus interface 2 clock */
24 #define P_ECODEC_CLK 5 /* External CODEC clock */
25 #define P_EMDH_CLK 6 /* External MDDI host clock */
26 #define P_GP_CLK 7 /* General purpose clock */
27 #define P_GRP_3D_CLK 8 /* Graphics clock */
28 #define P_I2C_CLK 9 /* I2C clock */
29 #define P_ICODEC_RX_CLK 10 /* Internal CODEX RX clock */
30 #define P_ICODEC_TX_CLK 11 /* Internal CODEX TX clock */
31 #define P_IMEM_CLK 12 /* Internal graphics memory clock */
32 #define P_MDC_CLK 13 /* MDDI client clock */
33 #define P_MDP_CLK 14 /* Mobile display processor clock */
34 #define P_PBUS_CLK 15 /* Peripheral bus clock */
35 #define P_PCM_CLK 16 /* PCM clock */
36 #define P_PMDH_CLK 17 /* Primary MDDI host clock */
37 #define P_SDAC_CLK 18 /* Stereo DAC clock */
38 #define P_SDC1_CLK 19 /* Secure Digital Card clocks */
39 #define P_SDC1_P_CLK 20
40 #define P_SDC2_CLK 21
41 #define P_SDC2_P_CLK 22
42 #define P_SDC3_CLK 23
43 #define P_SDC3_P_CLK 24
44 #define P_SDC4_CLK 25
45 #define P_SDC4_P_CLK 26
46 #define P_TSIF_CLK 27 /* Transport Stream Interface clocks */
47 #define P_TSIF_REF_CLK 28
48 #define P_TV_DAC_CLK 29 /* TV clocks */
49 #define P_TV_ENC_CLK 30
50 #define P_UART1_CLK 31 /* UART clocks */
51 #define P_UART2_CLK 32
52 #define P_UART3_CLK 33
53 #define P_UART1DM_CLK 34
54 #define P_UART2DM_CLK 35
55 #define P_USB_HS_CLK 36 /* High speed USB core clock */
56 #define P_USB_HS_P_CLK 37 /* High speed USB pbus clock */
57 #define P_USB_OTG_CLK 38 /* Full speed USB clock */
58 #define P_VDC_CLK 39 /* Video controller clock */
59 #define P_VFE_MDC_CLK 40 /* Camera / Video Front End clock */
60 #define P_VFE_CLK 41 /* VFE MDDI client clock */
61 #define P_MDP_LCDC_PCLK_CLK 42
62 #define P_MDP_LCDC_PAD_PCLK_CLK 43
63 #define P_MDP_VSYNC_CLK 44
64 #define P_SPI_CLK 45
65 #define P_VFE_AXI_CLK 46
66 #define P_USB_HS2_CLK 47 /* High speed USB 2 core clock */
67 #define P_USB_HS2_P_CLK 48 /* High speed USB 2 pbus clock */
68 #define P_USB_HS3_CLK 49 /* High speed USB 3 core clock */
69 #define P_USB_HS3_P_CLK 50 /* High speed USB 3 pbus clock */
70 #define P_GRP_3D_P_CLK 51 /* Graphics pbus clock */
71 #define P_USB_PHY_CLK 52 /* USB PHY clock */
72 #define P_USB_HS_CORE_CLK 53 /* High speed USB 1 core clock */
73 #define P_USB_HS2_CORE_CLK 54 /* High speed USB 2 core clock */
74 #define P_USB_HS3_CORE_CLK 55 /* High speed USB 3 core clock */
75 #define P_CAM_M_CLK 56
76 #define P_CAMIF_PAD_P_CLK 57
77 #define P_GRP_2D_CLK 58
78 #define P_GRP_2D_P_CLK 59
79 #define P_I2S_CLK 60
80 #define P_JPEG_CLK 61
81 #define P_JPEG_P_CLK 62
82 #define P_LPA_CODEC_CLK 63
83 #define P_LPA_CORE_CLK 64
84 #define P_LPA_P_CLK 65
85 #define P_MDC_IO_CLK 66
86 #define P_MDC_P_CLK 67
87 #define P_MFC_CLK 68
88 #define P_MFC_DIV2_CLK 69
89 #define P_MFC_P_CLK 70
90 #define P_QUP_I2C_CLK 71
91 #define P_ROTATOR_IMEM_CLK 72
92 #define P_ROTATOR_P_CLK 73
93 #define P_VFE_CAMIF_CLK 74
94 #define P_VFE_P_CLK 75
95 #define P_VPE_CLK 76
96 #define P_I2C_2_CLK 77
97 #define P_MI2S_CODEC_RX_S_CLK 78
98 #define P_MI2S_CODEC_RX_M_CLK 79
99 #define P_MI2S_CODEC_TX_S_CLK 80
100 #define P_MI2S_CODEC_TX_M_CLK 81
101 #define P_PMDH_P_CLK 82
102 #define P_EMDH_P_CLK 83
103 #define P_SPI_P_CLK 84
104 #define P_TSIF_P_CLK 85
105 #define P_MDP_P_CLK 86
106 #define P_SDAC_M_CLK 87
107 #define P_MI2S_S_CLK 88
108 #define P_MI2S_M_CLK 89
109 #define P_AXI_ROTATOR_CLK 90
110 #define P_HDMI_CLK 91
111 #define P_CSI0_CLK 92
112 #define P_CSI0_VFE_CLK 93
113 #define P_CSI0_P_CLK 94
114 #define P_CSI1_CLK 95
115 #define P_CSI1_VFE_CLK 96
116 #define P_CSI1_P_CLK 97
117 #define P_GSBI_CLK 98
118 #define P_GSBI_P_CLK 99
119 #define P_CE_CLK 100 /* Crypto engine */
120 #define P_CODEC_SSBI_CLK 101
122 #define P_NR_CLKS 102
124 struct clk_pcom_desc {
125 unsigned id;
126 const char *name;
127 const char *con;
128 const char *dev;
129 unsigned long flags;
132 struct pcom_clk_pdata {
133 struct clk_pcom_desc *lookup;
134 u32 num_lookups;
137 #define CLK_PCOM(clk_name, clk_id, clk_dev, clk_flags) { \
138 .id = P_##clk_id, \
139 .name = #clk_id, \
140 .con = clk_name, \
141 .dev = clk_dev, \
142 .flags = clk_flags, \
145 #endif