Linux 3.11-rc3
[cris-mirror.git] / arch / arm / mach-netx / generic.c
blobdb25b0cef3a73dc88e841bda0416960c8e409e75
1 /*
2 * arch/arm/mach-netx/generic.c
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/device.h>
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/io.h>
26 #include <linux/irqchip/arm-vic.h>
27 #include <linux/reboot.h>
28 #include <mach/hardware.h>
29 #include <asm/mach/map.h>
30 #include <mach/netx-regs.h>
31 #include <asm/mach/irq.h>
33 static struct map_desc netx_io_desc[] __initdata = {
35 .virtual = NETX_IO_VIRT,
36 .pfn = __phys_to_pfn(NETX_IO_PHYS),
37 .length = NETX_IO_SIZE,
38 .type = MT_DEVICE
42 void __init netx_map_io(void)
44 iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
47 static struct resource netx_rtc_resources[] = {
48 [0] = {
49 .start = 0x00101200,
50 .end = 0x00101220,
51 .flags = IORESOURCE_MEM,
55 static struct platform_device netx_rtc_device = {
56 .name = "netx-rtc",
57 .id = 0,
58 .num_resources = ARRAY_SIZE(netx_rtc_resources),
59 .resource = netx_rtc_resources,
62 static struct platform_device *devices[] __initdata = {
63 &netx_rtc_device,
66 #if 0
67 #define DEBUG_IRQ(fmt...) printk(fmt)
68 #else
69 #define DEBUG_IRQ(fmt...) while (0) {}
70 #endif
72 static void
73 netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
75 unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
76 unsigned int stat;
78 stat = ((readl(NETX_DPMAS_INT_EN) &
79 readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
81 while (stat) {
82 if (stat & 1) {
83 DEBUG_IRQ("handling irq %d\n", irq);
84 generic_handle_irq(irq);
86 irq++;
87 stat >>= 1;
91 static int
92 netx_hif_irq_type(struct irq_data *d, unsigned int type)
94 unsigned int val, irq;
96 val = readl(NETX_DPMAS_IF_CONF1);
98 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
100 if (type & IRQ_TYPE_EDGE_RISING) {
101 DEBUG_IRQ("rising edges\n");
102 val |= (1 << 26) << irq;
104 if (type & IRQ_TYPE_EDGE_FALLING) {
105 DEBUG_IRQ("falling edges\n");
106 val &= ~((1 << 26) << irq);
108 if (type & IRQ_TYPE_LEVEL_LOW) {
109 DEBUG_IRQ("low level\n");
110 val &= ~((1 << 26) << irq);
112 if (type & IRQ_TYPE_LEVEL_HIGH) {
113 DEBUG_IRQ("high level\n");
114 val |= (1 << 26) << irq;
117 writel(val, NETX_DPMAS_IF_CONF1);
119 return 0;
122 static void
123 netx_hif_ack_irq(struct irq_data *d)
125 unsigned int val, irq;
127 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
128 writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
130 val = readl(NETX_DPMAS_INT_EN);
131 val &= ~((1 << 24) << irq);
132 writel(val, NETX_DPMAS_INT_EN);
134 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
137 static void
138 netx_hif_mask_irq(struct irq_data *d)
140 unsigned int val, irq;
142 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
143 val = readl(NETX_DPMAS_INT_EN);
144 val &= ~((1 << 24) << irq);
145 writel(val, NETX_DPMAS_INT_EN);
146 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
149 static void
150 netx_hif_unmask_irq(struct irq_data *d)
152 unsigned int val, irq;
154 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
155 val = readl(NETX_DPMAS_INT_EN);
156 val |= (1 << 24) << irq;
157 writel(val, NETX_DPMAS_INT_EN);
158 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
161 static struct irq_chip netx_hif_chip = {
162 .irq_ack = netx_hif_ack_irq,
163 .irq_mask = netx_hif_mask_irq,
164 .irq_unmask = netx_hif_unmask_irq,
165 .irq_set_type = netx_hif_irq_type,
168 void __init netx_init_irq(void)
170 int irq;
172 vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
174 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
175 irq_set_chip_and_handler(irq, &netx_hif_chip,
176 handle_level_irq);
177 set_irq_flags(irq, IRQF_VALID);
180 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
181 irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
184 static int __init netx_init(void)
186 return platform_add_devices(devices, ARRAY_SIZE(devices));
189 subsys_initcall(netx_init);
191 void netx_restart(enum reboot_mode mode, const char *cmd)
193 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
194 NETX_SYSTEM_RES_CR);