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[cris-mirror.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c
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1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/input.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/io.h>
24 #include <linux/i2c.h>
25 #include <linux/leds.h>
26 #include <linux/fb.h>
27 #include <linux/gpio.h>
28 #include <linux/delay.h>
29 #include <linux/smsc911x.h>
30 #include <linux/regulator/fixed.h>
31 #include <linux/regulator/machine.h>
32 #include <linux/pwm_backlight.h>
33 #include <linux/platform_data/s3c-hsotg.h>
35 #ifdef CONFIG_SMDK6410_WM1190_EV1
36 #include <linux/mfd/wm8350/core.h>
37 #include <linux/mfd/wm8350/pmic.h>
38 #endif
40 #ifdef CONFIG_SMDK6410_WM1192_EV1
41 #include <linux/mfd/wm831x/core.h>
42 #include <linux/mfd/wm831x/pdata.h>
43 #endif
45 #include <video/platform_lcd.h>
46 #include <video/samsung_fimd.h>
48 #include <asm/mach/arch.h>
49 #include <asm/mach/map.h>
50 #include <asm/mach/irq.h>
52 #include <mach/hardware.h>
53 #include <mach/map.h>
55 #include <asm/irq.h>
56 #include <asm/mach-types.h>
58 #include <plat/regs-serial.h>
59 #include <mach/regs-gpio.h>
60 #include <linux/platform_data/ata-samsung_cf.h>
61 #include <linux/platform_data/i2c-s3c2410.h>
62 #include <plat/fb.h>
63 #include <plat/gpio-cfg.h>
65 #include <plat/clock.h>
66 #include <plat/devs.h>
67 #include <plat/cpu.h>
68 #include <plat/adc.h>
69 #include <linux/platform_data/touchscreen-s3c2410.h>
70 #include <plat/keypad.h>
71 #include <plat/backlight.h>
72 #include <plat/samsung-time.h>
74 #include "common.h"
75 #include "regs-modem.h"
76 #include "regs-srom.h"
77 #include "regs-sys.h"
79 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
80 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
81 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
83 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
84 [0] = {
85 .hwport = 0,
86 .flags = 0,
87 .ucon = UCON,
88 .ulcon = ULCON,
89 .ufcon = UFCON,
91 [1] = {
92 .hwport = 1,
93 .flags = 0,
94 .ucon = UCON,
95 .ulcon = ULCON,
96 .ufcon = UFCON,
98 [2] = {
99 .hwport = 2,
100 .flags = 0,
101 .ucon = UCON,
102 .ulcon = ULCON,
103 .ufcon = UFCON,
105 [3] = {
106 .hwport = 3,
107 .flags = 0,
108 .ucon = UCON,
109 .ulcon = ULCON,
110 .ufcon = UFCON,
114 /* framebuffer and LCD setup. */
116 /* GPF15 = LCD backlight control
117 * GPF13 => Panel power
118 * GPN5 = LCD nRESET signal
119 * PWM_TOUT1 => backlight brightness
122 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
123 unsigned int power)
125 if (power) {
126 gpio_direction_output(S3C64XX_GPF(13), 1);
128 /* fire nRESET on power up */
129 gpio_direction_output(S3C64XX_GPN(5), 0);
130 msleep(10);
131 gpio_direction_output(S3C64XX_GPN(5), 1);
132 msleep(1);
133 } else {
134 gpio_direction_output(S3C64XX_GPF(13), 0);
138 static struct plat_lcd_data smdk6410_lcd_power_data = {
139 .set_power = smdk6410_lcd_power_set,
142 static struct platform_device smdk6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .dev.parent = &s3c_device_fb.dev,
145 .dev.platform_data = &smdk6410_lcd_power_data,
148 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
149 .max_bpp = 32,
150 .default_bpp = 16,
151 .xres = 800,
152 .yres = 480,
153 .virtual_y = 480 * 2,
154 .virtual_x = 800,
157 static struct fb_videomode smdk6410_lcd_timing = {
158 .left_margin = 8,
159 .right_margin = 13,
160 .upper_margin = 7,
161 .lower_margin = 5,
162 .hsync_len = 3,
163 .vsync_len = 1,
164 .xres = 800,
165 .yres = 480,
168 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
169 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
171 .vtiming = &smdk6410_lcd_timing,
172 .win[0] = &smdk6410_fb_win0,
173 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
174 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178 * Configuring Ethernet on SMDK6410
180 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
181 * The constant address below corresponds to nCS1
183 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
184 * 2) CFG6 needs to be switched to "LAN9115" side
187 static struct resource smdk6410_smsc911x_resources[] = {
188 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
189 [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
190 | IRQ_TYPE_LEVEL_LOW),
193 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
194 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
195 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
196 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
197 .phy_interface = PHY_INTERFACE_MODE_MII,
201 static struct platform_device smdk6410_smsc911x = {
202 .name = "smsc911x",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
205 .resource = &smdk6410_smsc911x_resources[0],
206 .dev = {
207 .platform_data = &smdk6410_smsc911x_pdata,
211 #ifdef CONFIG_REGULATOR
212 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
213 REGULATOR_SUPPLY("PVDD", "0-001b"),
214 REGULATOR_SUPPLY("AVDD", "0-001b"),
217 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
218 .constraints = {
219 .always_on = 1,
221 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
222 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
225 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
226 .supply_name = "B_PWR_5V",
227 .microvolts = 5000000,
228 .init_data = &smdk6410_b_pwr_5v_data,
229 .gpio = -EINVAL,
232 static struct platform_device smdk6410_b_pwr_5v = {
233 .name = "reg-fixed-voltage",
234 .id = -1,
235 .dev = {
236 .platform_data = &smdk6410_b_pwr_5v_pdata,
239 #endif
241 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
242 .setup_gpio = s3c64xx_ide_setup_gpio,
245 static uint32_t smdk6410_keymap[] __initdata = {
246 /* KEY(row, col, keycode) */
247 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
248 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
249 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
250 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
253 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
254 .keymap = smdk6410_keymap,
255 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
258 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
259 .keymap_data = &smdk6410_keymap_data,
260 .rows = 2,
261 .cols = 8,
264 static struct map_desc smdk6410_iodesc[] = {};
266 static struct platform_device *smdk6410_devices[] __initdata = {
267 #ifdef CONFIG_SMDK6410_SD_CH0
268 &s3c_device_hsmmc0,
269 #endif
270 #ifdef CONFIG_SMDK6410_SD_CH1
271 &s3c_device_hsmmc1,
272 #endif
273 &s3c_device_i2c0,
274 &s3c_device_i2c1,
275 &s3c_device_fb,
276 &s3c_device_ohci,
277 &s3c_device_usb_hsotg,
278 &s3c64xx_device_iisv4,
279 &samsung_device_keypad,
281 #ifdef CONFIG_REGULATOR
282 &smdk6410_b_pwr_5v,
283 #endif
284 &smdk6410_lcd_powerdev,
286 &smdk6410_smsc911x,
287 &s3c_device_adc,
288 &s3c_device_cfcon,
289 &s3c_device_rtc,
290 &s3c_device_ts,
291 &s3c_device_wdt,
294 #ifdef CONFIG_REGULATOR
295 /* ARM core */
296 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
297 REGULATOR_SUPPLY("vddarm", NULL),
300 /* VDDARM, BUCK1 on J5 */
301 static struct regulator_init_data smdk6410_vddarm = {
302 .constraints = {
303 .name = "PVDD_ARM",
304 .min_uV = 1000000,
305 .max_uV = 1300000,
306 .always_on = 1,
307 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
309 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
310 .consumer_supplies = smdk6410_vddarm_consumers,
313 /* VDD_INT, BUCK2 on J5 */
314 static struct regulator_init_data smdk6410_vddint = {
315 .constraints = {
316 .name = "PVDD_INT",
317 .min_uV = 1000000,
318 .max_uV = 1200000,
319 .always_on = 1,
320 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
324 /* VDD_HI, LDO3 on J5 */
325 static struct regulator_init_data smdk6410_vddhi = {
326 .constraints = {
327 .name = "PVDD_HI",
328 .always_on = 1,
332 /* VDD_PLL, LDO2 on J5 */
333 static struct regulator_init_data smdk6410_vddpll = {
334 .constraints = {
335 .name = "PVDD_PLL",
336 .always_on = 1,
340 /* VDD_UH_MMC, LDO5 on J5 */
341 static struct regulator_init_data smdk6410_vdduh_mmc = {
342 .constraints = {
343 .name = "PVDD_UH+PVDD_MMC",
344 .always_on = 1,
348 /* VCCM3BT, LDO8 on J5 */
349 static struct regulator_init_data smdk6410_vccmc3bt = {
350 .constraints = {
351 .name = "PVCCM3BT",
352 .always_on = 1,
356 /* VCCM2MTV, LDO11 on J5 */
357 static struct regulator_init_data smdk6410_vccm2mtv = {
358 .constraints = {
359 .name = "PVCCM2MTV",
360 .always_on = 1,
364 /* VDD_LCD, LDO12 on J5 */
365 static struct regulator_init_data smdk6410_vddlcd = {
366 .constraints = {
367 .name = "PVDD_LCD",
368 .always_on = 1,
372 /* VDD_OTGI, LDO9 on J5 */
373 static struct regulator_init_data smdk6410_vddotgi = {
374 .constraints = {
375 .name = "PVDD_OTGI",
376 .always_on = 1,
380 /* VDD_OTG, LDO14 on J5 */
381 static struct regulator_init_data smdk6410_vddotg = {
382 .constraints = {
383 .name = "PVDD_OTG",
384 .always_on = 1,
388 /* VDD_ALIVE, LDO15 on J5 */
389 static struct regulator_init_data smdk6410_vddalive = {
390 .constraints = {
391 .name = "PVDD_ALIVE",
392 .always_on = 1,
396 /* VDD_AUDIO, VLDO_AUDIO on J5 */
397 static struct regulator_init_data smdk6410_vddaudio = {
398 .constraints = {
399 .name = "PVDD_AUDIO",
400 .always_on = 1,
403 #endif
405 #ifdef CONFIG_SMDK6410_WM1190_EV1
406 /* S3C64xx internal logic & PLL */
407 static struct regulator_init_data wm8350_dcdc1_data = {
408 .constraints = {
409 .name = "PVDD_INT+PVDD_PLL",
410 .min_uV = 1200000,
411 .max_uV = 1200000,
412 .always_on = 1,
413 .apply_uV = 1,
417 /* Memory */
418 static struct regulator_init_data wm8350_dcdc3_data = {
419 .constraints = {
420 .name = "PVDD_MEM",
421 .min_uV = 1800000,
422 .max_uV = 1800000,
423 .always_on = 1,
424 .state_mem = {
425 .uV = 1800000,
426 .mode = REGULATOR_MODE_NORMAL,
427 .enabled = 1,
429 .initial_state = PM_SUSPEND_MEM,
433 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
434 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
435 REGULATOR_SUPPLY("DVDD", "0-001b"),
438 static struct regulator_init_data wm8350_dcdc4_data = {
439 .constraints = {
440 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
441 .min_uV = 3000000,
442 .max_uV = 3000000,
443 .always_on = 1,
445 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
446 .consumer_supplies = wm8350_dcdc4_consumers,
449 /* OTGi/1190-EV1 HPVDD & AVDD */
450 static struct regulator_init_data wm8350_ldo4_data = {
451 .constraints = {
452 .name = "PVDD_OTGI+HPVDD+AVDD",
453 .min_uV = 1200000,
454 .max_uV = 1200000,
455 .apply_uV = 1,
456 .always_on = 1,
460 static struct {
461 int regulator;
462 struct regulator_init_data *initdata;
463 } wm1190_regulators[] = {
464 { WM8350_DCDC_1, &wm8350_dcdc1_data },
465 { WM8350_DCDC_3, &wm8350_dcdc3_data },
466 { WM8350_DCDC_4, &wm8350_dcdc4_data },
467 { WM8350_DCDC_6, &smdk6410_vddarm },
468 { WM8350_LDO_1, &smdk6410_vddalive },
469 { WM8350_LDO_2, &smdk6410_vddotg },
470 { WM8350_LDO_3, &smdk6410_vddlcd },
471 { WM8350_LDO_4, &wm8350_ldo4_data },
474 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
476 int i;
478 /* Configure the IRQ line */
479 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
481 /* Instantiate the regulators */
482 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
483 wm8350_register_regulator(wm8350,
484 wm1190_regulators[i].regulator,
485 wm1190_regulators[i].initdata);
487 return 0;
490 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
491 .init = smdk6410_wm8350_init,
492 .irq_high = 1,
493 .irq_base = IRQ_BOARD_START,
495 #endif
497 #ifdef CONFIG_SMDK6410_WM1192_EV1
498 static struct gpio_led wm1192_pmic_leds[] = {
500 .name = "PMIC:red:power",
501 .gpio = GPIO_BOARD_START + 3,
502 .default_state = LEDS_GPIO_DEFSTATE_ON,
506 static struct gpio_led_platform_data wm1192_pmic_led = {
507 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
508 .leds = wm1192_pmic_leds,
511 static struct platform_device wm1192_pmic_led_dev = {
512 .name = "leds-gpio",
513 .id = -1,
514 .dev = {
515 .platform_data = &wm1192_pmic_led,
519 static int wm1192_pre_init(struct wm831x *wm831x)
521 int ret;
523 /* Configure the IRQ line */
524 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
526 ret = platform_device_register(&wm1192_pmic_led_dev);
527 if (ret != 0)
528 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
530 return 0;
533 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
534 .isink = 1,
535 .max_uA = 27554,
538 static struct regulator_init_data wm1192_dcdc3 = {
539 .constraints = {
540 .name = "PVDD_MEM+PVDD_GPS",
541 .always_on = 1,
545 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
546 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
549 static struct regulator_init_data wm1192_ldo1 = {
550 .constraints = {
551 .name = "PVDD_LCD+PVDD_EXT",
552 .always_on = 1,
554 .consumer_supplies = wm1192_ldo1_consumers,
555 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
558 static struct wm831x_status_pdata wm1192_led7_pdata = {
559 .name = "LED7:green:",
562 static struct wm831x_status_pdata wm1192_led8_pdata = {
563 .name = "LED8:green:",
566 static struct wm831x_pdata smdk6410_wm1192_pdata = {
567 .pre_init = wm1192_pre_init,
569 .backlight = &wm1192_backlight_pdata,
570 .dcdc = {
571 &smdk6410_vddarm, /* DCDC1 */
572 &smdk6410_vddint, /* DCDC2 */
573 &wm1192_dcdc3,
575 .gpio_base = GPIO_BOARD_START,
576 .ldo = {
577 &wm1192_ldo1, /* LDO1 */
578 &smdk6410_vdduh_mmc, /* LDO2 */
579 NULL, /* LDO3 NC */
580 &smdk6410_vddotgi, /* LDO4 */
581 &smdk6410_vddotg, /* LDO5 */
582 &smdk6410_vddhi, /* LDO6 */
583 &smdk6410_vddaudio, /* LDO7 */
584 &smdk6410_vccm2mtv, /* LDO8 */
585 &smdk6410_vddpll, /* LDO9 */
586 &smdk6410_vccmc3bt, /* LDO10 */
587 &smdk6410_vddalive, /* LDO11 */
589 .status = {
590 &wm1192_led7_pdata,
591 &wm1192_led8_pdata,
594 #endif
596 static struct i2c_board_info i2c_devs0[] __initdata = {
597 { I2C_BOARD_INFO("24c08", 0x50), },
598 { I2C_BOARD_INFO("wm8580", 0x1b), },
600 #ifdef CONFIG_SMDK6410_WM1192_EV1
601 { I2C_BOARD_INFO("wm8312", 0x34),
602 .platform_data = &smdk6410_wm1192_pdata,
603 .irq = S3C_EINT(12),
605 #endif
607 #ifdef CONFIG_SMDK6410_WM1190_EV1
608 { I2C_BOARD_INFO("wm8350", 0x1a),
609 .platform_data = &smdk6410_wm8350_pdata,
610 .irq = S3C_EINT(12),
612 #endif
615 static struct i2c_board_info i2c_devs1[] __initdata = {
616 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
619 /* LCD Backlight data */
620 static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
621 .no = S3C64XX_GPF(15),
622 .func = S3C_GPIO_SFN(2),
625 static struct platform_pwm_backlight_data smdk6410_bl_data = {
626 .pwm_id = 1,
629 static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
631 static void __init smdk6410_map_io(void)
633 u32 tmp;
635 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
636 s3c24xx_init_clocks(12000000);
637 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
638 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
640 /* set the LCD type */
642 tmp = __raw_readl(S3C64XX_SPCON);
643 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
644 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
645 __raw_writel(tmp, S3C64XX_SPCON);
647 /* remove the lcd bypass */
648 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
649 tmp &= ~MIFPCON_LCD_BYPASS;
650 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
653 static void __init smdk6410_machine_init(void)
655 u32 cs1;
657 s3c_i2c0_set_platdata(NULL);
658 s3c_i2c1_set_platdata(NULL);
659 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
660 s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
662 samsung_keypad_set_platdata(&smdk6410_keypad_data);
664 s3c24xx_ts_set_platdata(NULL);
666 /* configure nCS1 width to 16 bits */
668 cs1 = __raw_readl(S3C64XX_SROM_BW) &
669 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
670 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
671 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
672 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
673 S3C64XX_SROM_BW__NCS1__SHIFT;
674 __raw_writel(cs1, S3C64XX_SROM_BW);
676 /* set timing for nCS1 suitable for ethernet chip */
678 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
679 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
680 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
681 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
682 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
683 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
684 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
686 gpio_request(S3C64XX_GPN(5), "LCD power");
687 gpio_request(S3C64XX_GPF(13), "LCD power");
689 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
690 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
692 s3c_ide_set_platdata(&smdk6410_ide_pdata);
694 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
696 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
699 MACHINE_START(SMDK6410, "SMDK6410")
700 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
701 .atag_offset = 0x100,
703 .init_irq = s3c6410_init_irq,
704 .map_io = smdk6410_map_io,
705 .init_machine = smdk6410_machine_init,
706 .init_late = s3c64xx_init_late,
707 .init_time = samsung_timer_init,
708 .restart = s3c64xx_restart,
709 MACHINE_END