2 * Emma Mobile EV2 clock framework support
4 * Copyright (C) 2012 Magnus Damm
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #include <linux/init.h>
20 #include <linux/kernel.h>
22 #include <linux/sh_clk.h>
23 #include <linux/clkdev.h>
24 #include <mach/common.h>
26 #define EMEV2_SMU_BASE 0xe0110000
28 /* EMEV2 SMU registers */
29 #define USIAU0_RSTCTRL 0x094
30 #define USIBU1_RSTCTRL 0x0ac
31 #define USIBU2_RSTCTRL 0x0b0
32 #define USIBU3_RSTCTRL 0x0b4
33 #define STI_RSTCTRL 0x124
34 #define USIAU0GCLKCTRL 0x4a0
35 #define USIBU1GCLKCTRL 0x4b8
36 #define USIBU2GCLKCTRL 0x4bc
37 #define USIBU3GCLKCTRL 0x04c0
38 #define STIGCLKCTRL 0x528
39 #define USIAU0SCLKDIV 0x61c
40 #define USIB2SCLKDIV 0x65c
41 #define USIB3SCLKDIV 0x660
42 #define STI_CLKSEL 0x688
43 #define SMU_GENERAL_REG0 0x7c0
45 /* not pretty, but hey */
46 static void __iomem
*smu_base
;
48 static void emev2_smu_write(unsigned long value
, int offs
)
50 BUG_ON(!smu_base
|| (offs
>= PAGE_SIZE
));
51 iowrite32(value
, smu_base
+ offs
);
54 void emev2_set_boot_vector(unsigned long value
)
56 emev2_smu_write(value
, SMU_GENERAL_REG0
);
59 static struct clk_mapping smu_mapping
= {
60 .phys
= EMEV2_SMU_BASE
,
64 /* Fixed 32 KHz root clock from C32K pin */
65 static struct clk c32k_clk
= {
67 .mapping
= &smu_mapping
,
70 /* PLL3 multiplies C32K with 7000 */
71 static unsigned long pll3_recalc(struct clk
*clk
)
73 return clk
->parent
->rate
* 7000;
76 static struct sh_clk_ops pll3_clk_ops
= {
77 .recalc
= pll3_recalc
,
80 static struct clk pll3_clk
= {
85 static struct clk
*main_clks
[] = {
90 enum { SCLKDIV_USIAU0
, SCLKDIV_USIBU2
, SCLKDIV_USIBU1
, SCLKDIV_USIBU3
,
93 #define SCLKDIV(_reg, _shift) \
95 .parent = &pll3_clk, \
96 .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
97 .enable_bit = _shift, \
100 static struct clk sclkdiv_clks
[SCLKDIV_NR
] = {
101 [SCLKDIV_USIAU0
] = SCLKDIV(USIAU0SCLKDIV
, 0),
102 [SCLKDIV_USIBU2
] = SCLKDIV(USIB2SCLKDIV
, 16),
103 [SCLKDIV_USIBU1
] = SCLKDIV(USIB2SCLKDIV
, 0),
104 [SCLKDIV_USIBU3
] = SCLKDIV(USIB3SCLKDIV
, 0),
107 enum { GCLK_USIAU0_SCLK
, GCLK_USIBU1_SCLK
, GCLK_USIBU2_SCLK
, GCLK_USIBU3_SCLK
,
111 #define GCLK_SCLK(_parent, _reg) \
114 .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
115 .enable_bit = 1, /* SCLK_GCC */ \
118 static struct clk gclk_clks
[GCLK_NR
] = {
119 [GCLK_USIAU0_SCLK
] = GCLK_SCLK(&sclkdiv_clks
[SCLKDIV_USIAU0
],
121 [GCLK_USIBU1_SCLK
] = GCLK_SCLK(&sclkdiv_clks
[SCLKDIV_USIBU1
],
123 [GCLK_USIBU2_SCLK
] = GCLK_SCLK(&sclkdiv_clks
[SCLKDIV_USIBU2
],
125 [GCLK_USIBU3_SCLK
] = GCLK_SCLK(&sclkdiv_clks
[SCLKDIV_USIBU3
],
127 [GCLK_STI_SCLK
] = GCLK_SCLK(&c32k_clk
, STIGCLKCTRL
),
130 static int emev2_gclk_enable(struct clk
*clk
)
132 iowrite32(ioread32(clk
->mapped_reg
) | (1 << clk
->enable_bit
),
137 static void emev2_gclk_disable(struct clk
*clk
)
139 iowrite32(ioread32(clk
->mapped_reg
) & ~(1 << clk
->enable_bit
),
143 static struct sh_clk_ops emev2_gclk_clk_ops
= {
144 .enable
= emev2_gclk_enable
,
145 .disable
= emev2_gclk_disable
,
146 .recalc
= followparent_recalc
,
149 static int __init
emev2_gclk_register(struct clk
*clks
, int nr
)
155 for (k
= 0; !ret
&& (k
< nr
); k
++) {
157 clkp
->ops
= &emev2_gclk_clk_ops
;
158 ret
|= clk_register(clkp
);
164 static unsigned long emev2_sclkdiv_recalc(struct clk
*clk
)
166 unsigned int sclk_div
;
168 sclk_div
= (ioread32(clk
->mapped_reg
) >> clk
->enable_bit
) & 0xff;
170 return clk
->parent
->rate
/ (sclk_div
+ 1);
173 static struct sh_clk_ops emev2_sclkdiv_clk_ops
= {
174 .recalc
= emev2_sclkdiv_recalc
,
177 static int __init
emev2_sclkdiv_register(struct clk
*clks
, int nr
)
183 for (k
= 0; !ret
&& (k
< nr
); k
++) {
185 clkp
->ops
= &emev2_sclkdiv_clk_ops
;
186 ret
|= clk_register(clkp
);
192 static struct clk_lookup lookups
[] = {
193 CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks
[GCLK_USIAU0_SCLK
]),
194 CLKDEV_DEV_ID("e1020000.uart", &gclk_clks
[GCLK_USIAU0_SCLK
]),
195 CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks
[GCLK_USIBU1_SCLK
]),
196 CLKDEV_DEV_ID("e1030000.uart", &gclk_clks
[GCLK_USIBU1_SCLK
]),
197 CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks
[GCLK_USIBU2_SCLK
]),
198 CLKDEV_DEV_ID("e1040000.uart", &gclk_clks
[GCLK_USIBU2_SCLK
]),
199 CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks
[GCLK_USIBU3_SCLK
]),
200 CLKDEV_DEV_ID("e1050000.uart", &gclk_clks
[GCLK_USIBU3_SCLK
]),
201 CLKDEV_DEV_ID("em_sti.0", &gclk_clks
[GCLK_STI_SCLK
]),
202 CLKDEV_DEV_ID("e0180000.sti", &gclk_clks
[GCLK_STI_SCLK
]),
205 void __init
emev2_clock_init(void)
210 /* yuck, this is ugly as hell, but the non-smp case of clocks
211 * code is now designed to rely on ioremap() instead of static
212 * entity maps. in the case of smp we need access to the SMU
213 * register earlier than ioremap() is actually working without
214 * any static maps. to enable SMP in ugly but with dynamic
215 * mappings we have to call emev2_clock_init() from different
216 * places depending on UP and SMP...
221 smu_base
= ioremap(EMEV2_SMU_BASE
, PAGE_SIZE
);
224 /* setup STI timer to run on 37.768 kHz and deassert reset */
225 emev2_smu_write(0, STI_CLKSEL
);
226 emev2_smu_write(1, STI_RSTCTRL
);
228 /* deassert reset for UART0->UART3 */
229 emev2_smu_write(2, USIAU0_RSTCTRL
);
230 emev2_smu_write(2, USIBU1_RSTCTRL
);
231 emev2_smu_write(2, USIBU2_RSTCTRL
);
232 emev2_smu_write(2, USIBU3_RSTCTRL
);
234 for (k
= 0; !ret
&& (k
< ARRAY_SIZE(main_clks
)); k
++)
235 ret
= clk_register(main_clks
[k
]);
238 ret
= emev2_sclkdiv_register(sclkdiv_clks
, SCLKDIV_NR
);
241 ret
= emev2_gclk_register(gclk_clks
, GCLK_NR
);
243 clkdev_add_table(lookups
, ARRAY_SIZE(lookups
));
248 panic("failed to setup emev2 clocks\n");