2 * Low-Level PCI Access for i386 machines
4 * Copyright 1993, 1994 Drew Eckhardt
6 * (Unix and Linux consulting and custom programming)
10 * Drew's work was sponsored by:
11 * iX Multiuser Multitasking Magazine
15 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
17 * For more information, please consult the following manuals (look at
18 * http://www.pcisig.com/ for how to get them):
20 * PCI BIOS Specification
21 * PCI Local Bus Specification
22 * PCI to PCI Bridge Specification
23 * PCI System Design Guide
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/export.h>
30 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/errno.h>
34 #include <linux/bootmem.h>
38 #include <asm/pci_x86.h>
39 #include <asm/io_apic.h>
43 * This list of dynamic mappings is for temporarily maintaining
44 * original BIOS BAR addresses for possible reinstatement.
46 struct pcibios_fwaddrmap
{
47 struct list_head list
;
49 resource_size_t fw_addr
[DEVICE_COUNT_RESOURCE
];
52 static LIST_HEAD(pcibios_fwaddrmappings
);
53 static DEFINE_SPINLOCK(pcibios_fwaddrmap_lock
);
54 static bool pcibios_fw_addr_done
;
56 /* Must be called with 'pcibios_fwaddrmap_lock' lock held. */
57 static struct pcibios_fwaddrmap
*pcibios_fwaddrmap_lookup(struct pci_dev
*dev
)
59 struct pcibios_fwaddrmap
*map
;
61 WARN_ON_SMP(!spin_is_locked(&pcibios_fwaddrmap_lock
));
63 list_for_each_entry(map
, &pcibios_fwaddrmappings
, list
)
71 pcibios_save_fw_addr(struct pci_dev
*dev
, int idx
, resource_size_t fw_addr
)
74 struct pcibios_fwaddrmap
*map
;
76 if (pcibios_fw_addr_done
)
79 spin_lock_irqsave(&pcibios_fwaddrmap_lock
, flags
);
80 map
= pcibios_fwaddrmap_lookup(dev
);
82 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock
, flags
);
83 map
= kzalloc(sizeof(*map
), GFP_KERNEL
);
87 map
->dev
= pci_dev_get(dev
);
88 map
->fw_addr
[idx
] = fw_addr
;
89 INIT_LIST_HEAD(&map
->list
);
91 spin_lock_irqsave(&pcibios_fwaddrmap_lock
, flags
);
92 list_add_tail(&map
->list
, &pcibios_fwaddrmappings
);
94 map
->fw_addr
[idx
] = fw_addr
;
95 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock
, flags
);
98 resource_size_t
pcibios_retrieve_fw_addr(struct pci_dev
*dev
, int idx
)
101 struct pcibios_fwaddrmap
*map
;
102 resource_size_t fw_addr
= 0;
104 if (pcibios_fw_addr_done
)
107 spin_lock_irqsave(&pcibios_fwaddrmap_lock
, flags
);
108 map
= pcibios_fwaddrmap_lookup(dev
);
110 fw_addr
= map
->fw_addr
[idx
];
111 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock
, flags
);
116 static void __init
pcibios_fw_addr_list_del(void)
119 struct pcibios_fwaddrmap
*entry
, *next
;
121 spin_lock_irqsave(&pcibios_fwaddrmap_lock
, flags
);
122 list_for_each_entry_safe(entry
, next
, &pcibios_fwaddrmappings
, list
) {
123 list_del(&entry
->list
);
124 pci_dev_put(entry
->dev
);
127 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock
, flags
);
128 pcibios_fw_addr_done
= true;
132 skip_isa_ioresource_align(struct pci_dev
*dev
) {
134 if ((pci_probe
& PCI_CAN_SKIP_ISA_ALIGN
) &&
135 !(dev
->bus
->bridge_ctl
& PCI_BRIDGE_CTL_ISA
))
141 * We need to avoid collisions with `mirrored' VGA ports
142 * and other strange ISA hardware, so we always want the
143 * addresses to be allocated in the 0x000-0x0ff region
146 * Why? Because some silly external IO cards only decode
147 * the low 10 bits of the IO address. The 0x00-0xff region
148 * is reserved for motherboard devices that decode all 16
149 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
150 * but we want to try to avoid allocating at 0x2900-0x2bff
151 * which might have be mirrored at 0x0100-0x03ff..
154 pcibios_align_resource(void *data
, const struct resource
*res
,
155 resource_size_t size
, resource_size_t align
)
157 struct pci_dev
*dev
= data
;
158 resource_size_t start
= res
->start
;
160 if (res
->flags
& IORESOURCE_IO
) {
161 if (skip_isa_ioresource_align(dev
))
164 start
= (start
+ 0x3ff) & ~0x3ff;
168 EXPORT_SYMBOL(pcibios_align_resource
);
171 * Handle resources of PCI devices. If the world were perfect, we could
172 * just allocate all the resource regions and do nothing more. It isn't.
173 * On the other hand, we cannot just re-allocate all devices, as it would
174 * require us to know lots of host bridge internals. So we attempt to
175 * keep as much of the original configuration as possible, but tweak it
176 * when it's found to be wrong.
178 * Known BIOS problems we have to work around:
179 * - I/O or memory regions not configured
180 * - regions configured, but not enabled in the command register
181 * - bogus I/O addresses above 64K used
182 * - expansion ROMs left enabled (this may sound harmless, but given
183 * the fact the PCI specs explicitly allow address decoders to be
184 * shared between expansion ROMs and other resource regions, it's
185 * at least dangerous)
186 * - bad resource sizes or overlaps with other regions
189 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
190 * This gives us fixed barriers on where we can allocate.
191 * (2) Allocate resources for all enabled devices. If there is
192 * a collision, just mark the resource as unallocated. Also
193 * disable expansion ROMs during this step.
194 * (3) Try to allocate resources for disabled devices. If the
195 * resources were assigned correctly, everything goes well,
196 * if they weren't, they won't disturb allocation of other
198 * (4) Assign new addresses to resources which were either
199 * not configured at all or misconfigured. If explicitly
200 * requested by the user, configure expansion ROM address
204 static void pcibios_allocate_bridge_resources(struct pci_dev
*dev
)
209 for (idx
= PCI_BRIDGE_RESOURCES
; idx
< PCI_NUM_RESOURCES
; idx
++) {
210 r
= &dev
->resource
[idx
];
213 if (!r
->start
|| pci_claim_resource(dev
, idx
) < 0) {
215 * Something is wrong with the region.
216 * Invalidate the resource to prevent
217 * child resource allocations in this
220 r
->start
= r
->end
= 0;
226 static void pcibios_allocate_bus_resources(struct pci_bus
*bus
)
228 struct pci_bus
*child
;
230 /* Depth-First Search on bus tree */
232 pcibios_allocate_bridge_resources(bus
->self
);
233 list_for_each_entry(child
, &bus
->children
, node
)
234 pcibios_allocate_bus_resources(child
);
237 struct pci_check_idx_range
{
242 static void pcibios_allocate_dev_resources(struct pci_dev
*dev
, int pass
)
244 int idx
, disabled
, i
;
248 struct pci_check_idx_range idx_range
[] = {
249 { PCI_STD_RESOURCES
, PCI_STD_RESOURCE_END
},
250 #ifdef CONFIG_PCI_IOV
251 { PCI_IOV_RESOURCES
, PCI_IOV_RESOURCE_END
},
255 pci_read_config_word(dev
, PCI_COMMAND
, &command
);
256 for (i
= 0; i
< ARRAY_SIZE(idx_range
); i
++)
257 for (idx
= idx_range
[i
].start
; idx
<= idx_range
[i
].end
; idx
++) {
258 r
= &dev
->resource
[idx
];
259 if (r
->parent
) /* Already allocated */
261 if (!r
->start
) /* Address not assigned at all */
263 if (r
->flags
& IORESOURCE_IO
)
264 disabled
= !(command
& PCI_COMMAND_IO
);
266 disabled
= !(command
& PCI_COMMAND_MEMORY
);
267 if (pass
== disabled
) {
269 "BAR %d: reserving %pr (d=%d, p=%d)\n",
270 idx
, r
, disabled
, pass
);
271 if (pci_claim_resource(dev
, idx
) < 0) {
272 /* We'll assign a new address later */
273 pcibios_save_fw_addr(dev
,
281 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
282 if (r
->flags
& IORESOURCE_ROM_ENABLE
) {
283 /* Turn the ROM off, leave the resource region,
284 * but keep it unregistered. */
286 dev_dbg(&dev
->dev
, "disabling ROM %pR\n", r
);
287 r
->flags
&= ~IORESOURCE_ROM_ENABLE
;
288 pci_read_config_dword(dev
, dev
->rom_base_reg
, ®
);
289 pci_write_config_dword(dev
, dev
->rom_base_reg
,
290 reg
& ~PCI_ROM_ADDRESS_ENABLE
);
295 static void pcibios_allocate_resources(struct pci_bus
*bus
, int pass
)
298 struct pci_bus
*child
;
300 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
301 pcibios_allocate_dev_resources(dev
, pass
);
303 child
= dev
->subordinate
;
305 pcibios_allocate_resources(child
, pass
);
309 static void pcibios_allocate_dev_rom_resource(struct pci_dev
*dev
)
314 * Try to use BIOS settings for ROMs, otherwise let
315 * pci_assign_unassigned_resources() allocate the new
318 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
319 if (!r
->flags
|| !r
->start
)
322 if (pci_claim_resource(dev
, PCI_ROM_RESOURCE
) < 0) {
327 static void pcibios_allocate_rom_resources(struct pci_bus
*bus
)
330 struct pci_bus
*child
;
332 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
333 pcibios_allocate_dev_rom_resource(dev
);
335 child
= dev
->subordinate
;
337 pcibios_allocate_rom_resources(child
);
341 static int __init
pcibios_assign_resources(void)
345 if (!(pci_probe
& PCI_ASSIGN_ROMS
))
346 list_for_each_entry(bus
, &pci_root_buses
, node
)
347 pcibios_allocate_rom_resources(bus
);
349 pci_assign_unassigned_resources();
350 pcibios_fw_addr_list_del();
355 void pcibios_resource_survey_bus(struct pci_bus
*bus
)
357 dev_printk(KERN_DEBUG
, &bus
->dev
, "Allocating resources\n");
359 pcibios_allocate_bus_resources(bus
);
361 pcibios_allocate_resources(bus
, 0);
362 pcibios_allocate_resources(bus
, 1);
364 if (!(pci_probe
& PCI_ASSIGN_ROMS
))
365 pcibios_allocate_rom_resources(bus
);
368 void __init
pcibios_resource_survey(void)
372 DBG("PCI: Allocating resources\n");
374 list_for_each_entry(bus
, &pci_root_buses
, node
)
375 pcibios_allocate_bus_resources(bus
);
377 list_for_each_entry(bus
, &pci_root_buses
, node
)
378 pcibios_allocate_resources(bus
, 0);
379 list_for_each_entry(bus
, &pci_root_buses
, node
)
380 pcibios_allocate_resources(bus
, 1);
382 e820_reserve_resources_late();
384 * Insert the IO APIC resources after PCI initialization has
385 * occurred to handle IO APICS that are mapped in on a BAR in
386 * PCI space, but before trying to assign unassigned pci res.
388 ioapic_insert_resources();
392 * called in fs_initcall (one below subsys_initcall),
393 * give a chance for motherboard reserve resources
395 fs_initcall(pcibios_assign_resources
);
397 static const struct vm_operations_struct pci_mmap_ops
= {
398 .access
= generic_access_phys
,
401 int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
402 enum pci_mmap_state mmap_state
, int write_combine
)
406 /* I/O space cannot be accessed via normal processor loads and
407 * stores on this platform.
409 if (mmap_state
== pci_mmap_io
)
412 prot
= pgprot_val(vma
->vm_page_prot
);
415 * Return error if pat is not enabled and write_combine is requested.
416 * Caller can followup with UC MINUS request and add a WC mtrr if there
417 * is a free mtrr slot.
419 if (!pat_enabled
&& write_combine
)
422 if (pat_enabled
&& write_combine
)
423 prot
|= _PAGE_CACHE_WC
;
424 else if (pat_enabled
|| boot_cpu_data
.x86
> 3)
426 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
427 * To avoid attribute conflicts, request UC MINUS here
430 prot
|= _PAGE_CACHE_UC_MINUS
;
432 prot
|= _PAGE_IOMAP
; /* creating a mapping for IO */
434 vma
->vm_page_prot
= __pgprot(prot
);
436 if (io_remap_pfn_range(vma
, vma
->vm_start
, vma
->vm_pgoff
,
437 vma
->vm_end
- vma
->vm_start
,
441 vma
->vm_ops
= &pci_mmap_ops
;