Linux 3.11-rc3
[cris-mirror.git] / drivers / media / i2c / saa7110.c
blobac43e929a1d6eabbc2333676e088c133fea2107a
1 /*
2 * saa7110 - Philips SAA7110(A) video decoder driver
4 * Copyright (C) 1998 Pauline Middelink <middelin@polyware.nl>
6 * Copyright (C) 1999 Wolfgang Scherr <scherr@net4you.net>
7 * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
8 * - some corrections for Pinnacle Systems Inc. DC10plus card.
10 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
11 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/types.h>
31 #include <linux/delay.h>
32 #include <linux/slab.h>
33 #include <linux/wait.h>
34 #include <asm/uaccess.h>
35 #include <linux/i2c.h>
36 #include <linux/videodev2.h>
37 #include <media/v4l2-device.h>
38 #include <media/v4l2-ctrls.h>
40 MODULE_DESCRIPTION("Philips SAA7110 video decoder driver");
41 MODULE_AUTHOR("Pauline Middelink");
42 MODULE_LICENSE("GPL");
45 static int debug;
46 module_param(debug, int, 0);
47 MODULE_PARM_DESC(debug, "Debug level (0-1)");
49 #define SAA7110_MAX_INPUT 9 /* 6 CVBS, 3 SVHS */
50 #define SAA7110_MAX_OUTPUT 1 /* 1 YUV */
52 #define SAA7110_NR_REG 0x35
54 struct saa7110 {
55 struct v4l2_subdev sd;
56 struct v4l2_ctrl_handler hdl;
57 u8 reg[SAA7110_NR_REG];
59 v4l2_std_id norm;
60 int input;
61 int enable;
63 wait_queue_head_t wq;
66 static inline struct saa7110 *to_saa7110(struct v4l2_subdev *sd)
68 return container_of(sd, struct saa7110, sd);
71 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
73 return &container_of(ctrl->handler, struct saa7110, hdl)->sd;
76 /* ----------------------------------------------------------------------- */
77 /* I2C support functions */
78 /* ----------------------------------------------------------------------- */
80 static int saa7110_write(struct v4l2_subdev *sd, u8 reg, u8 value)
82 struct i2c_client *client = v4l2_get_subdevdata(sd);
83 struct saa7110 *decoder = to_saa7110(sd);
85 decoder->reg[reg] = value;
86 return i2c_smbus_write_byte_data(client, reg, value);
89 static int saa7110_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
91 struct i2c_client *client = v4l2_get_subdevdata(sd);
92 struct saa7110 *decoder = to_saa7110(sd);
93 int ret = -1;
94 u8 reg = *data; /* first register to write to */
96 /* Sanity check */
97 if (reg + (len - 1) > SAA7110_NR_REG)
98 return ret;
100 /* the saa7110 has an autoincrement function, use it if
101 * the adapter understands raw I2C */
102 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
103 ret = i2c_master_send(client, data, len);
105 /* Cache the written data */
106 memcpy(decoder->reg + reg, data + 1, len - 1);
107 } else {
108 for (++data, --len; len; len--) {
109 ret = saa7110_write(sd, reg++, *data++);
110 if (ret < 0)
111 break;
115 return ret;
118 static inline int saa7110_read(struct v4l2_subdev *sd)
120 struct i2c_client *client = v4l2_get_subdevdata(sd);
122 return i2c_smbus_read_byte(client);
125 /* ----------------------------------------------------------------------- */
126 /* SAA7110 functions */
127 /* ----------------------------------------------------------------------- */
129 #define FRESP_06H_COMPST 0x03 /*0x13*/
130 #define FRESP_06H_SVIDEO 0x83 /*0xC0*/
133 static int saa7110_selmux(struct v4l2_subdev *sd, int chan)
135 static const unsigned char modes[9][8] = {
136 /* mode 0 */
137 {FRESP_06H_COMPST, 0xD9, 0x17, 0x40, 0x03,
138 0x44, 0x75, 0x16},
139 /* mode 1 */
140 {FRESP_06H_COMPST, 0xD8, 0x17, 0x40, 0x03,
141 0x44, 0x75, 0x16},
142 /* mode 2 */
143 {FRESP_06H_COMPST, 0xBA, 0x07, 0x91, 0x03,
144 0x60, 0xB5, 0x05},
145 /* mode 3 */
146 {FRESP_06H_COMPST, 0xB8, 0x07, 0x91, 0x03,
147 0x60, 0xB5, 0x05},
148 /* mode 4 */
149 {FRESP_06H_COMPST, 0x7C, 0x07, 0xD2, 0x83,
150 0x60, 0xB5, 0x03},
151 /* mode 5 */
152 {FRESP_06H_COMPST, 0x78, 0x07, 0xD2, 0x83,
153 0x60, 0xB5, 0x03},
154 /* mode 6 */
155 {FRESP_06H_SVIDEO, 0x59, 0x17, 0x42, 0xA3,
156 0x44, 0x75, 0x12},
157 /* mode 7 */
158 {FRESP_06H_SVIDEO, 0x9A, 0x17, 0xB1, 0x13,
159 0x60, 0xB5, 0x14},
160 /* mode 8 */
161 {FRESP_06H_SVIDEO, 0x3C, 0x27, 0xC1, 0x23,
162 0x44, 0x75, 0x21}
164 struct saa7110 *decoder = to_saa7110(sd);
165 const unsigned char *ptr = modes[chan];
167 saa7110_write(sd, 0x06, ptr[0]); /* Luminance control */
168 saa7110_write(sd, 0x20, ptr[1]); /* Analog Control #1 */
169 saa7110_write(sd, 0x21, ptr[2]); /* Analog Control #2 */
170 saa7110_write(sd, 0x22, ptr[3]); /* Mixer Control #1 */
171 saa7110_write(sd, 0x2C, ptr[4]); /* Mixer Control #2 */
172 saa7110_write(sd, 0x30, ptr[5]); /* ADCs gain control */
173 saa7110_write(sd, 0x31, ptr[6]); /* Mixer Control #3 */
174 saa7110_write(sd, 0x21, ptr[7]); /* Analog Control #2 */
175 decoder->input = chan;
177 return 0;
180 static const unsigned char initseq[1 + SAA7110_NR_REG] = {
181 0, 0x4C, 0x3C, 0x0D, 0xEF, 0xBD, 0xF2, 0x03, 0x00,
182 /* 0x08 */ 0xF8, 0xF8, 0x60, 0x60, 0x00, 0x86, 0x18, 0x90,
183 /* 0x10 */ 0x00, 0x59, 0x40, 0x46, 0x42, 0x1A, 0xFF, 0xDA,
184 /* 0x18 */ 0xF2, 0x8B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
185 /* 0x20 */ 0xD9, 0x16, 0x40, 0x41, 0x80, 0x41, 0x80, 0x4F,
186 /* 0x28 */ 0xFE, 0x01, 0xCF, 0x0F, 0x03, 0x01, 0x03, 0x0C,
187 /* 0x30 */ 0x44, 0x71, 0x02, 0x8C, 0x02
190 static v4l2_std_id determine_norm(struct v4l2_subdev *sd)
192 DEFINE_WAIT(wait);
193 struct saa7110 *decoder = to_saa7110(sd);
194 int status;
196 /* mode changed, start automatic detection */
197 saa7110_write_block(sd, initseq, sizeof(initseq));
198 saa7110_selmux(sd, decoder->input);
199 prepare_to_wait(&decoder->wq, &wait, TASK_UNINTERRUPTIBLE);
200 schedule_timeout(msecs_to_jiffies(250));
201 finish_wait(&decoder->wq, &wait);
202 status = saa7110_read(sd);
203 if (status & 0x40) {
204 v4l2_dbg(1, debug, sd, "status=0x%02x (no signal)\n", status);
205 return V4L2_STD_UNKNOWN;
207 if ((status & 3) == 0) {
208 saa7110_write(sd, 0x06, 0x83);
209 if (status & 0x20) {
210 v4l2_dbg(1, debug, sd, "status=0x%02x (NTSC/no color)\n", status);
211 /*saa7110_write(sd,0x2E,0x81);*/
212 return V4L2_STD_NTSC;
214 v4l2_dbg(1, debug, sd, "status=0x%02x (PAL/no color)\n", status);
215 /*saa7110_write(sd,0x2E,0x9A);*/
216 return V4L2_STD_PAL;
218 /*saa7110_write(sd,0x06,0x03);*/
219 if (status & 0x20) { /* 60Hz */
220 v4l2_dbg(1, debug, sd, "status=0x%02x (NTSC)\n", status);
221 saa7110_write(sd, 0x0D, 0x86);
222 saa7110_write(sd, 0x0F, 0x50);
223 saa7110_write(sd, 0x11, 0x2C);
224 /*saa7110_write(sd,0x2E,0x81);*/
225 return V4L2_STD_NTSC;
228 /* 50Hz -> PAL/SECAM */
229 saa7110_write(sd, 0x0D, 0x86);
230 saa7110_write(sd, 0x0F, 0x10);
231 saa7110_write(sd, 0x11, 0x59);
232 /*saa7110_write(sd,0x2E,0x9A);*/
234 prepare_to_wait(&decoder->wq, &wait, TASK_UNINTERRUPTIBLE);
235 schedule_timeout(msecs_to_jiffies(250));
236 finish_wait(&decoder->wq, &wait);
238 status = saa7110_read(sd);
239 if ((status & 0x03) == 0x01) {
240 v4l2_dbg(1, debug, sd, "status=0x%02x (SECAM)\n", status);
241 saa7110_write(sd, 0x0D, 0x87);
242 return V4L2_STD_SECAM;
244 v4l2_dbg(1, debug, sd, "status=0x%02x (PAL)\n", status);
245 return V4L2_STD_PAL;
248 static int saa7110_g_input_status(struct v4l2_subdev *sd, u32 *pstatus)
250 struct saa7110 *decoder = to_saa7110(sd);
251 int res = V4L2_IN_ST_NO_SIGNAL;
252 int status = saa7110_read(sd);
254 v4l2_dbg(1, debug, sd, "status=0x%02x norm=%llx\n",
255 status, (unsigned long long)decoder->norm);
256 if (!(status & 0x40))
257 res = 0;
258 if (!(status & 0x03))
259 res |= V4L2_IN_ST_NO_COLOR;
261 *pstatus = res;
262 return 0;
265 static int saa7110_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
267 *std &= determine_norm(sd);
268 return 0;
271 static int saa7110_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
273 struct saa7110 *decoder = to_saa7110(sd);
275 if (decoder->norm != std) {
276 decoder->norm = std;
277 /*saa7110_write(sd, 0x06, 0x03);*/
278 if (std & V4L2_STD_NTSC) {
279 saa7110_write(sd, 0x0D, 0x86);
280 saa7110_write(sd, 0x0F, 0x50);
281 saa7110_write(sd, 0x11, 0x2C);
282 /*saa7110_write(sd, 0x2E, 0x81);*/
283 v4l2_dbg(1, debug, sd, "switched to NTSC\n");
284 } else if (std & V4L2_STD_PAL) {
285 saa7110_write(sd, 0x0D, 0x86);
286 saa7110_write(sd, 0x0F, 0x10);
287 saa7110_write(sd, 0x11, 0x59);
288 /*saa7110_write(sd, 0x2E, 0x9A);*/
289 v4l2_dbg(1, debug, sd, "switched to PAL\n");
290 } else if (std & V4L2_STD_SECAM) {
291 saa7110_write(sd, 0x0D, 0x87);
292 saa7110_write(sd, 0x0F, 0x10);
293 saa7110_write(sd, 0x11, 0x59);
294 /*saa7110_write(sd, 0x2E, 0x9A);*/
295 v4l2_dbg(1, debug, sd, "switched to SECAM\n");
296 } else {
297 return -EINVAL;
300 return 0;
303 static int saa7110_s_routing(struct v4l2_subdev *sd,
304 u32 input, u32 output, u32 config)
306 struct saa7110 *decoder = to_saa7110(sd);
308 if (input >= SAA7110_MAX_INPUT) {
309 v4l2_dbg(1, debug, sd, "input=%d not available\n", input);
310 return -EINVAL;
312 if (decoder->input != input) {
313 saa7110_selmux(sd, input);
314 v4l2_dbg(1, debug, sd, "switched to input=%d\n", input);
316 return 0;
319 static int saa7110_s_stream(struct v4l2_subdev *sd, int enable)
321 struct saa7110 *decoder = to_saa7110(sd);
323 if (decoder->enable != enable) {
324 decoder->enable = enable;
325 saa7110_write(sd, 0x0E, enable ? 0x18 : 0x80);
326 v4l2_dbg(1, debug, sd, "YUV %s\n", enable ? "on" : "off");
328 return 0;
331 static int saa7110_s_ctrl(struct v4l2_ctrl *ctrl)
333 struct v4l2_subdev *sd = to_sd(ctrl);
335 switch (ctrl->id) {
336 case V4L2_CID_BRIGHTNESS:
337 saa7110_write(sd, 0x19, ctrl->val);
338 break;
339 case V4L2_CID_CONTRAST:
340 saa7110_write(sd, 0x13, ctrl->val);
341 break;
342 case V4L2_CID_SATURATION:
343 saa7110_write(sd, 0x12, ctrl->val);
344 break;
345 case V4L2_CID_HUE:
346 saa7110_write(sd, 0x07, ctrl->val);
347 break;
348 default:
349 return -EINVAL;
351 return 0;
354 /* ----------------------------------------------------------------------- */
356 static const struct v4l2_ctrl_ops saa7110_ctrl_ops = {
357 .s_ctrl = saa7110_s_ctrl,
360 static const struct v4l2_subdev_core_ops saa7110_core_ops = {
361 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
362 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
363 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
364 .g_ctrl = v4l2_subdev_g_ctrl,
365 .s_ctrl = v4l2_subdev_s_ctrl,
366 .queryctrl = v4l2_subdev_queryctrl,
367 .querymenu = v4l2_subdev_querymenu,
368 .s_std = saa7110_s_std,
371 static const struct v4l2_subdev_video_ops saa7110_video_ops = {
372 .s_routing = saa7110_s_routing,
373 .s_stream = saa7110_s_stream,
374 .querystd = saa7110_querystd,
375 .g_input_status = saa7110_g_input_status,
378 static const struct v4l2_subdev_ops saa7110_ops = {
379 .core = &saa7110_core_ops,
380 .video = &saa7110_video_ops,
383 /* ----------------------------------------------------------------------- */
385 static int saa7110_probe(struct i2c_client *client,
386 const struct i2c_device_id *id)
388 struct saa7110 *decoder;
389 struct v4l2_subdev *sd;
390 int rv;
392 /* Check if the adapter supports the needed features */
393 if (!i2c_check_functionality(client->adapter,
394 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
395 return -ENODEV;
397 v4l_info(client, "chip found @ 0x%x (%s)\n",
398 client->addr << 1, client->adapter->name);
400 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
401 if (!decoder)
402 return -ENOMEM;
403 sd = &decoder->sd;
404 v4l2_i2c_subdev_init(sd, client, &saa7110_ops);
405 decoder->norm = V4L2_STD_PAL;
406 decoder->input = 0;
407 decoder->enable = 1;
408 v4l2_ctrl_handler_init(&decoder->hdl, 2);
409 v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
410 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
411 v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
412 V4L2_CID_CONTRAST, 0, 127, 1, 64);
413 v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
414 V4L2_CID_SATURATION, 0, 127, 1, 64);
415 v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
416 V4L2_CID_HUE, -128, 127, 1, 0);
417 sd->ctrl_handler = &decoder->hdl;
418 if (decoder->hdl.error) {
419 int err = decoder->hdl.error;
421 v4l2_ctrl_handler_free(&decoder->hdl);
422 return err;
424 v4l2_ctrl_handler_setup(&decoder->hdl);
426 init_waitqueue_head(&decoder->wq);
428 rv = saa7110_write_block(sd, initseq, sizeof(initseq));
429 if (rv < 0) {
430 v4l2_dbg(1, debug, sd, "init status %d\n", rv);
431 } else {
432 int ver, status;
433 saa7110_write(sd, 0x21, 0x10);
434 saa7110_write(sd, 0x0e, 0x18);
435 saa7110_write(sd, 0x0D, 0x04);
436 ver = saa7110_read(sd);
437 saa7110_write(sd, 0x0D, 0x06);
438 /*mdelay(150);*/
439 status = saa7110_read(sd);
440 v4l2_dbg(1, debug, sd, "version %x, status=0x%02x\n",
441 ver, status);
442 saa7110_write(sd, 0x0D, 0x86);
443 saa7110_write(sd, 0x0F, 0x10);
444 saa7110_write(sd, 0x11, 0x59);
445 /*saa7110_write(sd, 0x2E, 0x9A);*/
448 /*saa7110_selmux(sd,0);*/
449 /*determine_norm(sd);*/
450 /* setup and implicit mode 0 select has been performed */
452 return 0;
455 static int saa7110_remove(struct i2c_client *client)
457 struct v4l2_subdev *sd = i2c_get_clientdata(client);
458 struct saa7110 *decoder = to_saa7110(sd);
460 v4l2_device_unregister_subdev(sd);
461 v4l2_ctrl_handler_free(&decoder->hdl);
462 return 0;
465 /* ----------------------------------------------------------------------- */
467 static const struct i2c_device_id saa7110_id[] = {
468 { "saa7110", 0 },
471 MODULE_DEVICE_TABLE(i2c, saa7110_id);
473 static struct i2c_driver saa7110_driver = {
474 .driver = {
475 .owner = THIS_MODULE,
476 .name = "saa7110",
478 .probe = saa7110_probe,
479 .remove = saa7110_remove,
480 .id_table = saa7110_id,
483 module_i2c_driver(saa7110_driver);