2 * linux/drivers/i2c/chips/twl4030-power.c
4 * Handle TWL4030 Power initialization
6 * Copyright (C) 2008 Nokia Corporation
7 * Copyright (C) 2006 Texas Instruments, Inc
9 * Written by Kalle Jokiniemi
10 * Peter De Schrijver <peter.de-schrijver@nokia.com>
11 * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of this
15 * archive for more details.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/module.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/platform_device.h>
33 #include <asm/mach-types.h>
35 static u8 twl4030_start_script_address
= 0x2b;
37 #define PWR_P1_SW_EVENTS 0x10
38 #define PWR_DEVOFF (1 << 0)
39 #define SEQ_OFFSYNC (1 << 0)
41 #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
42 #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
44 /* resource - hfclk */
45 #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
48 #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
49 #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
50 #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
51 #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
52 #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
53 #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
55 #define LVL_WAKEUP 0x08
57 #define ENABLE_WARMRESET (1<<4)
59 #define END_OF_SCRIPT 0x3f
61 #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
62 #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
63 #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
64 #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
65 #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
66 #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
68 /* resource configuration registers
69 <RESOURCE>_DEV_GRP at address 'n+0'
70 <RESOURCE>_TYPE at address 'n+1'
71 <RESOURCE>_REMAP at address 'n+2'
72 <RESOURCE>_DEDICATED at address 'n+3'
74 #define DEV_GRP_OFFSET 0
76 #define REMAP_OFFSET 2
77 #define DEDICATED_OFFSET 3
79 /* Bit positions in the registers */
81 /* <RESOURCE>_DEV_GRP */
82 #define DEV_GRP_SHIFT 5
83 #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
87 #define TYPE_MASK (7 << TYPE_SHIFT)
89 #define TYPE2_MASK (3 << TYPE2_SHIFT)
91 /* <RESOURCE>_REMAP */
92 #define SLEEP_STATE_SHIFT 0
93 #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT)
94 #define OFF_STATE_SHIFT 4
95 #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT)
97 static u8 res_config_addrs
[] = {
108 [RES_VINTANA1
] = 0x3f,
109 [RES_VINTANA2
] = 0x43,
110 [RES_VINTDIG
] = 0x47,
114 [RES_VUSB_1V5
] = 0x71,
115 [RES_VUSB_1V8
] = 0x74,
116 [RES_VUSB_3V1
] = 0x77,
119 [RES_NRES_PWRON
] = 0x82,
122 [RES_HFCLKOUT
] = 0x8b,
123 [RES_32KCLKOUT
] = 0x8e,
125 [RES_MAIN_REF
] = 0x94,
128 static int twl4030_write_script_byte(u8 address
, u8 byte
)
132 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, address
, R_MEMORY_ADDRESS
);
135 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, byte
, R_MEMORY_DATA
);
140 static int twl4030_write_script_ins(u8 address
, u16 pmb_message
,
146 err
= twl4030_write_script_byte(address
++, pmb_message
>> 8);
149 err
= twl4030_write_script_byte(address
++, pmb_message
& 0xff);
152 err
= twl4030_write_script_byte(address
++, delay
);
155 err
= twl4030_write_script_byte(address
++, next
);
160 static int twl4030_write_script(u8 address
, struct twl4030_ins
*script
,
165 for (; len
; len
--, address
++, script
++) {
167 err
= twl4030_write_script_ins(address
,
174 err
= twl4030_write_script_ins(address
,
185 static int twl4030_config_wakeup3_sequence(u8 address
)
190 /* Set SLEEP to ACTIVE SEQ address for P3 */
191 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, address
, R_SEQ_ADD_S2A3
);
195 /* P3 LVL_WAKEUP should be on LEVEL */
196 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &data
, R_P3_SW_EVENTS
);
200 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, data
, R_P3_SW_EVENTS
);
203 pr_err("TWL4030 wakeup sequence for P3 config error\n");
207 static int twl4030_config_wakeup12_sequence(u8 address
)
212 /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
213 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, address
, R_SEQ_ADD_S2A12
);
217 /* P1/P2 LVL_WAKEUP should be on LEVEL */
218 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &data
, R_P1_SW_EVENTS
);
223 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, data
, R_P1_SW_EVENTS
);
227 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &data
, R_P2_SW_EVENTS
);
232 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, data
, R_P2_SW_EVENTS
);
236 if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
237 /* Disabling AC charger effect on sleep-active transitions */
238 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &data
,
239 R_CFG_P1_TRANSITION
);
243 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, data
,
244 R_CFG_P1_TRANSITION
);
251 pr_err("TWL4030 wakeup sequence for P1 and P2" \
256 static int twl4030_config_sleep_sequence(u8 address
)
260 /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
261 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, address
, R_SEQ_ADD_A2S
);
264 pr_err("TWL4030 sleep sequence config error\n");
269 static int twl4030_config_warmreset_sequence(u8 address
)
274 /* Set WARM RESET SEQ address for P1 */
275 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, address
, R_SEQ_ADD_WARM
);
279 /* P1/P2/P3 enable WARMRESET */
280 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &rd_data
, R_P1_SW_EVENTS
);
284 rd_data
|= ENABLE_WARMRESET
;
285 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, rd_data
, R_P1_SW_EVENTS
);
289 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &rd_data
, R_P2_SW_EVENTS
);
293 rd_data
|= ENABLE_WARMRESET
;
294 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, rd_data
, R_P2_SW_EVENTS
);
298 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &rd_data
, R_P3_SW_EVENTS
);
302 rd_data
|= ENABLE_WARMRESET
;
303 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, rd_data
, R_P3_SW_EVENTS
);
306 pr_err("TWL4030 warmreset seq config error\n");
310 static int twl4030_configure_resource(struct twl4030_resconfig
*rconfig
)
318 if (rconfig
->resource
> TOTAL_RESOURCES
) {
319 pr_err("TWL4030 Resource %d does not exist\n",
324 rconfig_addr
= res_config_addrs
[rconfig
->resource
];
326 /* Set resource group */
327 err
= twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER
, &grp
,
328 rconfig_addr
+ DEV_GRP_OFFSET
);
330 pr_err("TWL4030 Resource %d group could not be read\n",
335 if (rconfig
->devgroup
!= TWL4030_RESCONFIG_UNDEF
) {
336 grp
&= ~DEV_GRP_MASK
;
337 grp
|= rconfig
->devgroup
<< DEV_GRP_SHIFT
;
338 err
= twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER
,
339 grp
, rconfig_addr
+ DEV_GRP_OFFSET
);
341 pr_err("TWL4030 failed to program devgroup\n");
346 /* Set resource types */
347 err
= twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER
, &type
,
348 rconfig_addr
+ TYPE_OFFSET
);
350 pr_err("TWL4030 Resource %d type could not be read\n",
355 if (rconfig
->type
!= TWL4030_RESCONFIG_UNDEF
) {
357 type
|= rconfig
->type
<< TYPE_SHIFT
;
360 if (rconfig
->type2
!= TWL4030_RESCONFIG_UNDEF
) {
362 type
|= rconfig
->type2
<< TYPE2_SHIFT
;
365 err
= twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER
,
366 type
, rconfig_addr
+ TYPE_OFFSET
);
368 pr_err("TWL4030 failed to program resource type\n");
372 /* Set remap states */
373 err
= twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER
, &remap
,
374 rconfig_addr
+ REMAP_OFFSET
);
376 pr_err("TWL4030 Resource %d remap could not be read\n",
381 if (rconfig
->remap_off
!= TWL4030_RESCONFIG_UNDEF
) {
382 remap
&= ~OFF_STATE_MASK
;
383 remap
|= rconfig
->remap_off
<< OFF_STATE_SHIFT
;
386 if (rconfig
->remap_sleep
!= TWL4030_RESCONFIG_UNDEF
) {
387 remap
&= ~SLEEP_STATE_MASK
;
388 remap
|= rconfig
->remap_sleep
<< SLEEP_STATE_SHIFT
;
391 err
= twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER
,
393 rconfig_addr
+ REMAP_OFFSET
);
395 pr_err("TWL4030 failed to program remap\n");
402 static int load_twl4030_script(struct twl4030_script
*tscript
,
408 /* Make sure the script isn't going beyond last valid address (0x3f) */
409 if ((address
+ tscript
->size
) > END_OF_SCRIPT
) {
410 pr_err("TWL4030 scripts too big error\n");
414 err
= twl4030_write_script(address
, tscript
->script
, tscript
->size
);
418 if (tscript
->flags
& TWL4030_WRST_SCRIPT
) {
419 err
= twl4030_config_warmreset_sequence(address
);
423 if (tscript
->flags
& TWL4030_WAKEUP12_SCRIPT
) {
424 err
= twl4030_config_wakeup12_sequence(address
);
429 if (tscript
->flags
& TWL4030_WAKEUP3_SCRIPT
) {
430 err
= twl4030_config_wakeup3_sequence(address
);
434 if (tscript
->flags
& TWL4030_SLEEP_SCRIPT
) {
436 pr_warning("TWL4030: Bad order of scripts (sleep "\
437 "script before wakeup) Leads to boot"\
438 "failure on some boards\n");
439 err
= twl4030_config_sleep_sequence(address
);
445 int twl4030_remove_script(u8 flags
)
449 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, TWL4030_PM_MASTER_KEY_CFG1
,
450 TWL4030_PM_MASTER_PROTECT_KEY
);
452 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
456 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, TWL4030_PM_MASTER_KEY_CFG2
,
457 TWL4030_PM_MASTER_PROTECT_KEY
);
459 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
463 if (flags
& TWL4030_WRST_SCRIPT
) {
464 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, END_OF_SCRIPT
,
469 if (flags
& TWL4030_WAKEUP12_SCRIPT
) {
470 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, END_OF_SCRIPT
,
475 if (flags
& TWL4030_WAKEUP3_SCRIPT
) {
476 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, END_OF_SCRIPT
,
481 if (flags
& TWL4030_SLEEP_SCRIPT
) {
482 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, END_OF_SCRIPT
,
488 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, 0,
489 TWL4030_PM_MASTER_PROTECT_KEY
);
491 pr_err("TWL4030 Unable to relock registers\n");
496 int twl4030_power_configure_scripts(struct twl4030_power_data
*pdata
)
500 u8 address
= twl4030_start_script_address
;
502 for (i
= 0; i
< pdata
->num
; i
++) {
503 err
= load_twl4030_script(pdata
->scripts
[i
], address
);
506 address
+= pdata
->scripts
[i
]->size
;
512 int twl4030_power_configure_resources(struct twl4030_power_data
*pdata
)
514 struct twl4030_resconfig
*resconfig
= pdata
->resource_config
;
518 while (resconfig
->resource
) {
519 err
= twl4030_configure_resource(resconfig
);
530 * In master mode, start the power off sequence.
531 * After a successful execution, TWL shuts down the power to the SoC
532 * and all peripherals connected to it.
534 void twl4030_power_off(void)
538 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, PWR_DEVOFF
,
539 TWL4030_PM_MASTER_P1_SW_EVENTS
);
541 pr_err("TWL4030 Unable to power off\n");
544 static bool twl4030_power_use_poweroff(struct twl4030_power_data
*pdata
,
545 struct device_node
*node
)
547 if (pdata
&& pdata
->use_poweroff
)
550 if (of_property_read_bool(node
, "ti,use_poweroff"))
556 int twl4030_power_probe(struct platform_device
*pdev
)
558 struct twl4030_power_data
*pdata
= pdev
->dev
.platform_data
;
559 struct device_node
*node
= pdev
->dev
.of_node
;
564 if (!pdata
&& !node
) {
565 dev_err(&pdev
->dev
, "Platform data is missing\n");
569 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, TWL4030_PM_MASTER_KEY_CFG1
,
570 TWL4030_PM_MASTER_PROTECT_KEY
);
571 err
|= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
,
572 TWL4030_PM_MASTER_KEY_CFG2
,
573 TWL4030_PM_MASTER_PROTECT_KEY
);
576 pr_err("TWL4030 Unable to unlock registers\n");
581 /* TODO: convert to device tree */
582 err
= twl4030_power_configure_scripts(pdata
);
584 pr_err("TWL4030 failed to load scripts\n");
587 err
= twl4030_power_configure_resources(pdata
);
589 pr_err("TWL4030 failed to configure resource\n");
594 /* Board has to be wired properly to use this feature */
595 if (twl4030_power_use_poweroff(pdata
, node
) && !pm_power_off
) {
596 /* Default for SEQ_OFFSYNC is set, lets ensure this */
597 err
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &val
,
598 TWL4030_PM_MASTER_CFG_P123_TRANSITION
);
600 pr_warning("TWL4030 Unable to read registers\n");
602 } else if (!(val
& SEQ_OFFSYNC
)) {
604 err
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, val
,
605 TWL4030_PM_MASTER_CFG_P123_TRANSITION
);
607 pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
612 pm_power_off
= twl4030_power_off
;
616 err2
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, 0,
617 TWL4030_PM_MASTER_PROTECT_KEY
);
619 pr_err("TWL4030 Unable to relock registers\n");
626 static int twl4030_power_remove(struct platform_device
*pdev
)
632 static const struct of_device_id twl4030_power_of_match
[] = {
633 {.compatible
= "ti,twl4030-power", },
636 MODULE_DEVICE_TABLE(of
, twl4030_power_of_match
);
639 static struct platform_driver twl4030_power_driver
= {
641 .name
= "twl4030_power",
642 .owner
= THIS_MODULE
,
643 .of_match_table
= of_match_ptr(twl4030_power_of_match
),
645 .probe
= twl4030_power_probe
,
646 .remove
= twl4030_power_remove
,
649 module_platform_driver(twl4030_power_driver
);
651 MODULE_AUTHOR("Nokia Corporation");
652 MODULE_AUTHOR("Texas Instruments, Inc.");
653 MODULE_DESCRIPTION("Power management for TWL4030");
654 MODULE_LICENSE("GPL");
655 MODULE_ALIAS("platform:twl4030_power");