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Linux 3.11-rc3
[cris-mirror.git] / drivers / pinctrl / pinctrl-abx500.c
blob1d3f988c2c8bff0cfff3e5fdebba241deaaff9d4
1 /*
2 * Copyright (C) ST-Ericsson SA 2013
3 *
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/mfd/abx500/ab8500-gpio.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/consumer.h>
30 #include <linux/pinctrl/pinmux.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/machine.h>
34
35 #include "pinctrl-abx500.h"
36 #include "core.h"
37 #include "pinconf.h"
38
39 /*
40 * The AB9540 and AB8540 GPIO support are extended versions
41 * of the AB8500 GPIO support.
42 * The AB9540 supports an additional (7th) register so that
43 * more GPIO may be configured and used.
44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
45 * internal pull-up and pull-down capabilities.
46 */
47
48 /*
49 * GPIO registers offset
50 * Bank: 0x10
51 */
52 #define AB8500_GPIO_SEL1_REG 0x00
53 #define AB8500_GPIO_SEL2_REG 0x01
54 #define AB8500_GPIO_SEL3_REG 0x02
55 #define AB8500_GPIO_SEL4_REG 0x03
56 #define AB8500_GPIO_SEL5_REG 0x04
57 #define AB8500_GPIO_SEL6_REG 0x05
58 #define AB9540_GPIO_SEL7_REG 0x06
59
60 #define AB8500_GPIO_DIR1_REG 0x10
61 #define AB8500_GPIO_DIR2_REG 0x11
62 #define AB8500_GPIO_DIR3_REG 0x12
63 #define AB8500_GPIO_DIR4_REG 0x13
64 #define AB8500_GPIO_DIR5_REG 0x14
65 #define AB8500_GPIO_DIR6_REG 0x15
66 #define AB9540_GPIO_DIR7_REG 0x16
67
68 #define AB8500_GPIO_OUT1_REG 0x20
69 #define AB8500_GPIO_OUT2_REG 0x21
70 #define AB8500_GPIO_OUT3_REG 0x22
71 #define AB8500_GPIO_OUT4_REG 0x23
72 #define AB8500_GPIO_OUT5_REG 0x24
73 #define AB8500_GPIO_OUT6_REG 0x25
74 #define AB9540_GPIO_OUT7_REG 0x26
75
76 #define AB8500_GPIO_PUD1_REG 0x30
77 #define AB8500_GPIO_PUD2_REG 0x31
78 #define AB8500_GPIO_PUD3_REG 0x32
79 #define AB8500_GPIO_PUD4_REG 0x33
80 #define AB8500_GPIO_PUD5_REG 0x34
81 #define AB8500_GPIO_PUD6_REG 0x35
82 #define AB9540_GPIO_PUD7_REG 0x36
83
84 #define AB8500_GPIO_IN1_REG 0x40
85 #define AB8500_GPIO_IN2_REG 0x41
86 #define AB8500_GPIO_IN3_REG 0x42
87 #define AB8500_GPIO_IN4_REG 0x43
88 #define AB8500_GPIO_IN5_REG 0x44
89 #define AB8500_GPIO_IN6_REG 0x45
90 #define AB9540_GPIO_IN7_REG 0x46
91 #define AB8540_GPIO_VINSEL_REG 0x47
92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
93 #define AB8500_GPIO_ALTFUN_REG 0x50
94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
95 #define AB8540_GPIO_VINSEL_MASK 0x03
96 #define AB8540_GPIOX_VBAT_START 51
97 #define AB8540_GPIOX_VBAT_END 54
98
99 #define ABX500_GPIO_INPUT 0
100 #define ABX500_GPIO_OUTPUT 1
101
102 struct abx500_pinctrl {
103 struct device *dev;
104 struct pinctrl_dev *pctldev;
105 struct abx500_pinctrl_soc_data *soc;
106 struct gpio_chip chip;
107 struct ab8500 *parent;
108 struct abx500_gpio_irq_cluster *irq_cluster;
109 int irq_cluster_size;
110 };
111
112 /**
113 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
114 * @chip: Member of the structure abx500_pinctrl
115 */
116 static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip)
117 {
118 return container_of(chip, struct abx500_pinctrl, chip);
119 }
120
121 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
122 unsigned offset, bool *bit)
123 {
124 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
125 u8 pos = offset % 8;
126 u8 val;
127 int ret;
128
129 reg += offset / 8;
130 ret = abx500_get_register_interruptible(pct->dev,
131 AB8500_MISC, reg, &val);
132
133 *bit = !!(val & BIT(pos));
134
135 if (ret < 0)
136 dev_err(pct->dev,
137 "%s read reg =%x, offset=%x failed (%d)\n",
138 __func__, reg, offset, ret);
139
140 return ret;
141 }
142
143 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
144 unsigned offset, int val)
145 {
146 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
147 u8 pos = offset % 8;
148 int ret;
149
150 reg += offset / 8;
151 ret = abx500_mask_and_set_register_interruptible(pct->dev,
152 AB8500_MISC, reg, BIT(pos), val << pos);
153 if (ret < 0)
154 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
155 __func__, reg, offset, ret);
156
157 return ret;
158 }
159
160 /**
161 * abx500_gpio_get() - Get the particular GPIO value
162 * @chip: Gpio device
163 * @offset: GPIO number to read
164 */
165 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
166 {
167 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
168 bool bit;
169 bool is_out;
170 u8 gpio_offset = offset - 1;
171 int ret;
172
173 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
174 gpio_offset, &is_out);
175 if (ret < 0)
176 goto out;
177
178 if (is_out)
179 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
180 gpio_offset, &bit);
181 else
182 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
183 gpio_offset, &bit);
184 out:
185 if (ret < 0) {
186 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
187 return ret;
188 }
189
190 return bit;
191 }
192
193 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
194 {
195 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
196 int ret;
197
198 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
199 if (ret < 0)
200 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
201 }
202
203 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
204 enum abx500_gpio_pull_updown *pull_updown)
205 {
206 u8 pos;
207 u8 val;
208 int ret;
209 struct pullud *pullud;
210
211 if (!pct->soc->pullud) {
212 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
213 __func__);
214 ret = -EPERM;
215 goto out;
216 }
217
218 pullud = pct->soc->pullud;
219
220 if ((offset < pullud->first_pin)
221 || (offset > pullud->last_pin)) {
222 ret = -EINVAL;
223 goto out;
224 }
225
226 ret = abx500_get_register_interruptible(pct->dev,
227 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
228
229 pos = (offset - pullud->first_pin) << 1;
230 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
231
232 out:
233 if (ret < 0)
234 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
235
236 return ret;
237 }
238
239 static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
240 int offset, enum abx500_gpio_pull_updown val)
241 {
242 u8 pos;
243 int ret;
244 struct pullud *pullud;
245
246 if (!pct->soc->pullud) {
247 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
248 __func__);
249 ret = -EPERM;
250 goto out;
251 }
252
253 pullud = pct->soc->pullud;
254
255 if ((offset < pullud->first_pin)
256 || (offset > pullud->last_pin)) {
257 ret = -EINVAL;
258 goto out;
259 }
260 pos = (offset - pullud->first_pin) << 1;
261
262 ret = abx500_mask_and_set_register_interruptible(pct->dev,
263 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
264 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
265
266 out:
267 if (ret < 0)
268 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
269
270 return ret;
271 }
272
273 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
274 {
275 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
276 struct pullud *pullud = pct->soc->pullud;
277
278 return (pullud &&
279 gpio >= pullud->first_pin &&
280 gpio <= pullud->last_pin);
281 }
282
283 static int abx500_gpio_direction_output(struct gpio_chip *chip,
284 unsigned offset,
285 int val)
286 {
287 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
288 unsigned gpio;
289 int ret;
290
291 /* set direction as output */
292 ret = abx500_gpio_set_bits(chip,
293 AB8500_GPIO_DIR1_REG,
294 offset,
295 ABX500_GPIO_OUTPUT);
296 if (ret < 0)
297 goto out;
298
299 /* disable pull down */
300 ret = abx500_gpio_set_bits(chip,
301 AB8500_GPIO_PUD1_REG,
302 offset,
303 ABX500_GPIO_PULL_NONE);
304 if (ret < 0)
305 goto out;
306
307 /* if supported, disable both pull down and pull up */
308 gpio = offset + 1;
309 if (abx500_pullud_supported(chip, gpio)) {
310 ret = abx500_set_pull_updown(pct,
311 gpio,
312 ABX500_GPIO_PULL_NONE);
313 }
314 out:
315 if (ret < 0) {
316 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
317 return ret;
318 }
319
320 /* set the output as 1 or 0 */
321 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
322 }
323
324 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
325 {
326 /* set the register as input */
327 return abx500_gpio_set_bits(chip,
328 AB8500_GPIO_DIR1_REG,
329 offset,
330 ABX500_GPIO_INPUT);
331 }
332
333 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
334 {
335 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
336 /* The AB8500 GPIO numbers are off by one */
337 int gpio = offset + 1;
338 int hwirq;
339 int i;
340
341 for (i = 0; i < pct->irq_cluster_size; i++) {
342 struct abx500_gpio_irq_cluster *cluster =
343 &pct->irq_cluster[i];
344
345 if (gpio >= cluster->start && gpio <= cluster->end) {
346 /*
347 * The ABx500 GPIO's associated IRQs are clustered together
348 * throughout the interrupt numbers at irregular intervals.
349 * To solve this quandry, we have placed the read-in values
350 * into the cluster information table.
351 */
352 hwirq = gpio - cluster->start + cluster->to_irq;
353 return irq_create_mapping(pct->parent->domain, hwirq);
354 }
355 }
356
357 return -EINVAL;
358 }
359
360 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
361 unsigned gpio, int alt_setting)
362 {
363 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
364 struct alternate_functions af = pct->soc->alternate_functions[gpio];
365 int ret;
366 int val;
367 unsigned offset;
368
369 const char *modes[] = {
370 [ABX500_DEFAULT] = "default",
371 [ABX500_ALT_A] = "altA",
372 [ABX500_ALT_B] = "altB",
373 [ABX500_ALT_C] = "altC",
374 };
375
376 /* sanity check */
377 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
378 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
379 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
380 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
381 modes[alt_setting]);
382 return -EINVAL;
383 }
384
385 /* on ABx5xx, there is no GPIO0, so adjust the offset */
386 offset = gpio - 1;
387
388 switch (alt_setting) {
389 case ABX500_DEFAULT:
390 /*
391 * for ABx5xx family, default mode is always selected by
392 * writing 0 to GPIOSELx register, except for pins which
393 * support at least ALT_B mode, default mode is selected
394 * by writing 1 to GPIOSELx register
395 */
396 val = 0;
397 if (af.alt_bit1 != UNUSED)
398 val++;
399
400 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
401 offset, val);
402 break;
403
404 case ABX500_ALT_A:
405 /*
406 * for ABx5xx family, alt_a mode is always selected by
407 * writing 1 to GPIOSELx register, except for pins which
408 * support at least ALT_B mode, alt_a mode is selected
409 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
410 * register
411 */
412 if (af.alt_bit1 != UNUSED) {
413 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
414 offset, 0);
415 if (ret < 0)
416 goto out;
417
418 ret = abx500_gpio_set_bits(chip,
419 AB8500_GPIO_ALTFUN_REG,
420 af.alt_bit1,
421 !!(af.alta_val && BIT(0)));
422 if (ret < 0)
423 goto out;
424
425 if (af.alt_bit2 != UNUSED)
426 ret = abx500_gpio_set_bits(chip,
427 AB8500_GPIO_ALTFUN_REG,
428 af.alt_bit2,
429 !!(af.alta_val && BIT(1)));
430 } else
431 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
432 offset, 1);
433 break;
434
435 case ABX500_ALT_B:
436 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
437 offset, 0);
438 if (ret < 0)
439 goto out;
440
441 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
442 af.alt_bit1, !!(af.altb_val && BIT(0)));
443 if (ret < 0)
444 goto out;
445
446 if (af.alt_bit2 != UNUSED)
447 ret = abx500_gpio_set_bits(chip,
448 AB8500_GPIO_ALTFUN_REG,
449 af.alt_bit2,
450 !!(af.altb_val && BIT(1)));
451 break;
452
453 case ABX500_ALT_C:
454 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
455 offset, 0);
456 if (ret < 0)
457 goto out;
458
459 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
460 af.alt_bit2, !!(af.altc_val && BIT(0)));
461 if (ret < 0)
462 goto out;
463
464 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
465 af.alt_bit2, !!(af.altc_val && BIT(1)));
466 break;
467
468 default:
469 dev_dbg(pct->dev, "unknow alt_setting %d\n", alt_setting);
470
471 return -EINVAL;
472 }
473 out:
474 if (ret < 0)
475 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
476
477 return ret;
478 }
479
480 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
481 unsigned gpio)
482 {
483 u8 mode;
484 bool bit_mode;
485 bool alt_bit1;
486 bool alt_bit2;
487 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
488 struct alternate_functions af = pct->soc->alternate_functions[gpio];
489 /* on ABx5xx, there is no GPIO0, so adjust the offset */
490 unsigned offset = gpio - 1;
491 int ret;
492
493 /*
494 * if gpiosel_bit is set to unused,
495 * it means no GPIO or special case
496 */
497 if (af.gpiosel_bit == UNUSED)
498 return ABX500_DEFAULT;
499
500 /* read GpioSelx register */
501 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
502 af.gpiosel_bit, &bit_mode);
503 if (ret < 0)
504 goto out;
505
506 mode = bit_mode;
507
508 /* sanity check */
509 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
510 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
511 dev_err(pct->dev,
512 "alt_bitX value not in correct range (-1 to 7)\n");
513 return -EINVAL;
514 }
515
516 /* if alt_bit2 is used, alt_bit1 must be used too */
517 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
518 dev_err(pct->dev,
519 "if alt_bit2 is used, alt_bit1 can't be unused\n");
520 return -EINVAL;
521 }
522
523 /* check if pin use AlternateFunction register */
524 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
525 return mode;
526 /*
527 * if pin GPIOSEL bit is set and pin supports alternate function,
528 * it means DEFAULT mode
529 */
530 if (mode)
531 return ABX500_DEFAULT;
532
533 /*
534 * pin use the AlternatFunction register
535 * read alt_bit1 value
536 */
537 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
538 af.alt_bit1, &alt_bit1);
539 if (ret < 0)
540 goto out;
541
542 if (af.alt_bit2 != UNUSED) {
543 /* read alt_bit2 value */
544 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
545 af.alt_bit2,
546 &alt_bit2);
547 if (ret < 0)
548 goto out;
549 } else
550 alt_bit2 = 0;
551
552 mode = (alt_bit2 << 1) + alt_bit1;
553 if (mode == af.alta_val)
554 return ABX500_ALT_A;
555 else if (mode == af.altb_val)
556 return ABX500_ALT_B;
557 else
558 return ABX500_ALT_C;
559
560 out:
561 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
562 return ret;
563 }
564
565 #ifdef CONFIG_DEBUG_FS
566
567 #include <linux/seq_file.h>
568
569 static void abx500_gpio_dbg_show_one(struct seq_file *s,
570 struct pinctrl_dev *pctldev,
571 struct gpio_chip *chip,
572 unsigned offset, unsigned gpio)
573 {
574 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
575 const char *label = gpiochip_is_requested(chip, offset - 1);
576 u8 gpio_offset = offset - 1;
577 int mode = -1;
578 bool is_out;
579 bool pd;
580 enum abx500_gpio_pull_updown pud = 0;
581 int ret;
582
583 const char *modes[] = {
584 [ABX500_DEFAULT] = "default",
585 [ABX500_ALT_A] = "altA",
586 [ABX500_ALT_B] = "altB",
587 [ABX500_ALT_C] = "altC",
588 };
589
590 const char *pull_up_down[] = {
591 [ABX500_GPIO_PULL_DOWN] = "pull down",
592 [ABX500_GPIO_PULL_NONE] = "pull none",
593 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
594 [ABX500_GPIO_PULL_UP] = "pull up",
595 };
596
597 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
598 gpio_offset, &is_out);
599 if (ret < 0)
600 goto out;
601
602 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
603 gpio, label ?: "(none)",
604 is_out ? "out" : "in ");
605
606 if (!is_out) {
607 if (abx500_pullud_supported(chip, offset)) {
608 ret = abx500_get_pull_updown(pct, offset, &pud);
609 if (ret < 0)
610 goto out;
611
612 seq_printf(s, " %-9s", pull_up_down[pud]);
613 } else {
614 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
615 gpio_offset, &pd);
616 if (ret < 0)
617 goto out;
618
619 seq_printf(s, " %-9s", pull_up_down[pd]);
620 }
621 } else
622 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
623
624 if (pctldev)
625 mode = abx500_get_mode(pctldev, chip, offset);
626
627 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
628
629 out:
630 if (ret < 0)
631 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
632 }
633
634 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
635 {
636 unsigned i;
637 unsigned gpio = chip->base;
638 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
639 struct pinctrl_dev *pctldev = pct->pctldev;
640
641 for (i = 0; i < chip->ngpio; i++, gpio++) {
642 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
643 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
644 seq_printf(s, "\n");
645 }
646 }
647
648 #else
649 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
650 struct pinctrl_dev *pctldev,
651 struct gpio_chip *chip,
652 unsigned offset, unsigned gpio)
653 {
654 }
655 #define abx500_gpio_dbg_show NULL
656 #endif
657
658 static int abx500_gpio_request(struct gpio_chip *chip, unsigned offset)
659 {
660 int gpio = chip->base + offset;
661
662 return pinctrl_request_gpio(gpio);
663 }
664
665 static void abx500_gpio_free(struct gpio_chip *chip, unsigned offset)
666 {
667 int gpio = chip->base + offset;
668
669 pinctrl_free_gpio(gpio);
670 }
671
672 static struct gpio_chip abx500gpio_chip = {
673 .label = "abx500-gpio",
674 .owner = THIS_MODULE,
675 .request = abx500_gpio_request,
676 .free = abx500_gpio_free,
677 .direction_input = abx500_gpio_direction_input,
678 .get = abx500_gpio_get,
679 .direction_output = abx500_gpio_direction_output,
680 .set = abx500_gpio_set,
681 .to_irq = abx500_gpio_to_irq,
682 .dbg_show = abx500_gpio_dbg_show,
683 };
684
685 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
686 {
687 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
688
689 return pct->soc->nfunctions;
690 }
691
692 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
693 unsigned function)
694 {
695 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
696
697 return pct->soc->functions[function].name;
698 }
699
700 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
701 unsigned function,
702 const char * const **groups,
703 unsigned * const num_groups)
704 {
705 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
706
707 *groups = pct->soc->functions[function].groups;
708 *num_groups = pct->soc->functions[function].ngroups;
709
710 return 0;
711 }
712
713 static int abx500_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
714 unsigned group)
715 {
716 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
717 struct gpio_chip *chip = &pct->chip;
718 const struct abx500_pingroup *g;
719 int i;
720 int ret = 0;
721
722 g = &pct->soc->groups[group];
723 if (g->altsetting < 0)
724 return -EINVAL;
725
726 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
727
728 for (i = 0; i < g->npins; i++) {
729 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
730 g->pins[i], g->altsetting);
731
732 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
733 }
734
735 if (ret < 0)
736 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
737
738 return ret;
739 }
740
741 static void abx500_pmx_disable(struct pinctrl_dev *pctldev,
742 unsigned function, unsigned group)
743 {
744 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
745 const struct abx500_pingroup *g;
746
747 g = &pct->soc->groups[group];
748 if (g->altsetting < 0)
749 return;
750
751 /* FIXME: poke out the mux, set the pin to some default state? */
752 dev_dbg(pct->dev, "disable group %s, %u pins\n", g->name, g->npins);
753 }
754
755 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
756 struct pinctrl_gpio_range *range,
757 unsigned offset)
758 {
759 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
760 const struct abx500_pinrange *p;
761 int ret;
762 int i;
763
764 /*
765 * Different ranges have different ways to enable GPIO function on a
766 * pin, so refer back to our local range type, where we handily define
767 * what altfunc enables GPIO for a certain pin.
768 */
769 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
770 p = &pct->soc->gpio_ranges[i];
771 if ((offset >= p->offset) &&
772 (offset < (p->offset + p->npins)))
773 break;
774 }
775
776 if (i == pct->soc->gpio_num_ranges) {
777 dev_err(pct->dev, "%s failed to locate range\n", __func__);
778 return -ENODEV;
779 }
780
781 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
782 p->altfunc, offset);
783
784 ret = abx500_set_mode(pct->pctldev, &pct->chip,
785 offset, p->altfunc);
786 if (ret < 0)
787 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
788
789 return ret;
790 }
791
792 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
793 struct pinctrl_gpio_range *range,
794 unsigned offset)
795 {
796 }
797
798 static const struct pinmux_ops abx500_pinmux_ops = {
799 .get_functions_count = abx500_pmx_get_funcs_cnt,
800 .get_function_name = abx500_pmx_get_func_name,
801 .get_function_groups = abx500_pmx_get_func_groups,
802 .enable = abx500_pmx_enable,
803 .disable = abx500_pmx_disable,
804 .gpio_request_enable = abx500_gpio_request_enable,
805 .gpio_disable_free = abx500_gpio_disable_free,
806 };
807
808 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
809 {
810 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
811
812 return pct->soc->ngroups;
813 }
814
815 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
816 unsigned selector)
817 {
818 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
819
820 return pct->soc->groups[selector].name;
821 }
822
823 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
824 unsigned selector,
825 const unsigned **pins,
826 unsigned *num_pins)
827 {
828 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
829
830 *pins = pct->soc->groups[selector].pins;
831 *num_pins = pct->soc->groups[selector].npins;
832
833 return 0;
834 }
835
836 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
837 struct seq_file *s, unsigned offset)
838 {
839 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
840 struct gpio_chip *chip = &pct->chip;
841
842 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
843 chip->base + offset - 1);
844 }
845
846 static void abx500_dt_free_map(struct pinctrl_dev *pctldev,
847 struct pinctrl_map *map, unsigned num_maps)
848 {
849 int i;
850
851 for (i = 0; i < num_maps; i++)
852 if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
853 kfree(map[i].data.configs.configs);
854 kfree(map);
855 }
856
857 static int abx500_dt_reserve_map(struct pinctrl_map **map,
858 unsigned *reserved_maps,
859 unsigned *num_maps,
860 unsigned reserve)
861 {
862 unsigned old_num = *reserved_maps;
863 unsigned new_num = *num_maps + reserve;
864 struct pinctrl_map *new_map;
865
866 if (old_num >= new_num)
867 return 0;
868
869 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
870 if (!new_map)
871 return -ENOMEM;
872
873 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
874
875 *map = new_map;
876 *reserved_maps = new_num;
877
878 return 0;
879 }
880
881 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
882 unsigned *reserved_maps,
883 unsigned *num_maps, const char *group,
884 const char *function)
885 {
886 if (*num_maps == *reserved_maps)
887 return -ENOSPC;
888
889 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
890 (*map)[*num_maps].data.mux.group = group;
891 (*map)[*num_maps].data.mux.function = function;
892 (*num_maps)++;
893
894 return 0;
895 }
896
897 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
898 unsigned *reserved_maps,
899 unsigned *num_maps, const char *group,
900 unsigned long *configs, unsigned num_configs)
901 {
902 unsigned long *dup_configs;
903
904 if (*num_maps == *reserved_maps)
905 return -ENOSPC;
906
907 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
908 GFP_KERNEL);
909 if (!dup_configs)
910 return -ENOMEM;
911
912 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
913
914 (*map)[*num_maps].data.configs.group_or_pin = group;
915 (*map)[*num_maps].data.configs.configs = dup_configs;
916 (*map)[*num_maps].data.configs.num_configs = num_configs;
917 (*num_maps)++;
918
919 return 0;
920 }
921
922 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
923 const char *pin_name)
924 {
925 int i, pin_number;
926 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
927
928 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
929 for (i = 0; i < npct->soc->npins; i++)
930 if (npct->soc->pins[i].number == pin_number)
931 return npct->soc->pins[i].name;
932 return NULL;
933 }
934
935 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
936 struct device_node *np,
937 struct pinctrl_map **map,
938 unsigned *reserved_maps,
939 unsigned *num_maps)
940 {
941 int ret;
942 const char *function = NULL;
943 unsigned long *configs;
944 unsigned int nconfigs = 0;
945 bool has_config = 0;
946 unsigned reserve = 0;
947 struct property *prop;
948 const char *group, *gpio_name;
949 struct device_node *np_config;
950
951 ret = of_property_read_string(np, "ste,function", &function);
952 if (ret >= 0)
953 reserve = 1;
954
955 ret = pinconf_generic_parse_dt_config(np, &configs, &nconfigs);
956 if (nconfigs)
957 has_config = 1;
958
959 np_config = of_parse_phandle(np, "ste,config", 0);
960 if (np_config) {
961 ret = pinconf_generic_parse_dt_config(np_config, &configs,
962 &nconfigs);
963 if (ret)
964 goto exit;
965 has_config |= nconfigs;
966 }
967
968 ret = of_property_count_strings(np, "ste,pins");
969 if (ret < 0)
970 goto exit;
971
972 if (has_config)
973 reserve++;
974
975 reserve *= ret;
976
977 ret = abx500_dt_reserve_map(map, reserved_maps, num_maps, reserve);
978 if (ret < 0)
979 goto exit;
980
981 of_property_for_each_string(np, "ste,pins", prop, group) {
982 if (function) {
983 ret = abx500_dt_add_map_mux(map, reserved_maps,
984 num_maps, group, function);
985 if (ret < 0)
986 goto exit;
987 }
988 if (has_config) {
989 gpio_name = abx500_find_pin_name(pctldev, group);
990
991 ret = abx500_dt_add_map_configs(map, reserved_maps,
992 num_maps, gpio_name, configs, 1);
993 if (ret < 0)
994 goto exit;
995 }
996
997 }
998 exit:
999 return ret;
1000 }
1001
1002 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
1003 struct device_node *np_config,
1004 struct pinctrl_map **map, unsigned *num_maps)
1005 {
1006 unsigned reserved_maps;
1007 struct device_node *np;
1008 int ret;
1009
1010 reserved_maps = 0;
1011 *map = NULL;
1012 *num_maps = 0;
1013
1014 for_each_child_of_node(np_config, np) {
1015 ret = abx500_dt_subnode_to_map(pctldev, np, map,
1016 &reserved_maps, num_maps);
1017 if (ret < 0) {
1018 abx500_dt_free_map(pctldev, *map, *num_maps);
1019 return ret;
1020 }
1021 }
1022
1023 return 0;
1024 }
1025
1026 static const struct pinctrl_ops abx500_pinctrl_ops = {
1027 .get_groups_count = abx500_get_groups_cnt,
1028 .get_group_name = abx500_get_group_name,
1029 .get_group_pins = abx500_get_group_pins,
1030 .pin_dbg_show = abx500_pin_dbg_show,
1031 .dt_node_to_map = abx500_dt_node_to_map,
1032 .dt_free_map = abx500_dt_free_map,
1033 };
1034
1035 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
1036 unsigned pin,
1037 unsigned long *config)
1038 {
1039 return -ENOSYS;
1040 }
1041
1042 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
1043 unsigned pin,
1044 unsigned long config)
1045 {
1046 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
1047 struct gpio_chip *chip = &pct->chip;
1048 unsigned offset;
1049 int ret = -EINVAL;
1050 enum pin_config_param param = pinconf_to_config_param(config);
1051 enum pin_config_param argument = pinconf_to_config_argument(config);
1052
1053 dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n",
1054 pin, config, (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
1055 (param == PIN_CONFIG_OUTPUT) ? (argument ? "high" : "low") :
1056 (argument ? "pull up" : "pull down"));
1057
1058 /* on ABx500, there is no GPIO0, so adjust the offset */
1059 offset = pin - 1;
1060
1061 switch (param) {
1062 case PIN_CONFIG_BIAS_DISABLE:
1063 ret = abx500_gpio_direction_input(chip, offset);
1064 if (ret < 0)
1065 goto out;
1066 /*
1067 * Some chips only support pull down, while some actually
1068 * support both pull up and pull down. Such chips have
1069 * a "pullud" range specified for the pins that support
1070 * both features. If the pin is not within that range, we
1071 * fall back to the old bit set that only support pull down.
1072 */
1073 if (abx500_pullud_supported(chip, pin))
1074 ret = abx500_set_pull_updown(pct,
1075 pin,
1076 ABX500_GPIO_PULL_NONE);
1077 else
1078 /* Chip only supports pull down */
1079 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG,
1080 offset, ABX500_GPIO_PULL_NONE);
1081 break;
1082
1083 case PIN_CONFIG_BIAS_PULL_DOWN:
1084 ret = abx500_gpio_direction_input(chip, offset);
1085 if (ret < 0)
1086 goto out;
1087 /*
1088 * if argument = 1 set the pull down
1089 * else clear the pull down
1090 * Some chips only support pull down, while some actually
1091 * support both pull up and pull down. Such chips have
1092 * a "pullud" range specified for the pins that support
1093 * both features. If the pin is not within that range, we
1094 * fall back to the old bit set that only support pull down.
1095 */
1096 if (abx500_pullud_supported(chip, pin))
1097 ret = abx500_set_pull_updown(pct,
1098 pin,
1099 argument ? ABX500_GPIO_PULL_DOWN : ABX500_GPIO_PULL_NONE);
1100 else
1101 /* Chip only supports pull down */
1102 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG,
1103 offset,
1104 argument ? ABX500_GPIO_PULL_DOWN : ABX500_GPIO_PULL_NONE);
1105 break;
1106
1107 case PIN_CONFIG_BIAS_PULL_UP:
1108 ret = abx500_gpio_direction_input(chip, offset);
1109 if (ret < 0)
1110 goto out;
1111 /*
1112 * if argument = 1 set the pull up
1113 * else clear the pull up
1114 */
1115 ret = abx500_gpio_direction_input(chip, offset);
1116 /*
1117 * Some chips only support pull down, while some actually
1118 * support both pull up and pull down. Such chips have
1119 * a "pullud" range specified for the pins that support
1120 * both features. If the pin is not within that range, do
1121 * nothing
1122 */
1123 if (abx500_pullud_supported(chip, pin))
1124 ret = abx500_set_pull_updown(pct,
1125 pin,
1126 argument ? ABX500_GPIO_PULL_UP : ABX500_GPIO_PULL_NONE);
1127 break;
1128
1129 case PIN_CONFIG_OUTPUT:
1130 ret = abx500_gpio_direction_output(chip, offset, argument);
1131 break;
1132
1133 default:
1134 dev_err(chip->dev, "illegal configuration requested\n");
1135 }
1136 out:
1137 if (ret < 0)
1138 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1139
1140 return ret;
1141 }
1142
1143 static const struct pinconf_ops abx500_pinconf_ops = {
1144 .pin_config_get = abx500_pin_config_get,
1145 .pin_config_set = abx500_pin_config_set,
1146 };
1147
1148 static struct pinctrl_desc abx500_pinctrl_desc = {
1149 .name = "pinctrl-abx500",
1150 .pctlops = &abx500_pinctrl_ops,
1151 .pmxops = &abx500_pinmux_ops,
1152 .confops = &abx500_pinconf_ops,
1153 .owner = THIS_MODULE,
1154 };
1155
1156 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1157 {
1158 unsigned int lowest = 0;
1159 unsigned int highest = 0;
1160 unsigned int npins = 0;
1161 int i;
1162
1163 /*
1164 * Compute number of GPIOs from the last SoC gpio range descriptors
1165 * These ranges may include "holes" but the GPIO number space shall
1166 * still be homogeneous, so we need to detect and account for any
1167 * such holes so that these are included in the number of GPIO pins.
1168 */
1169 for (i = 0; i < soc->gpio_num_ranges; i++) {
1170 unsigned gstart;
1171 unsigned gend;
1172 const struct abx500_pinrange *p;
1173
1174 p = &soc->gpio_ranges[i];
1175 gstart = p->offset;
1176 gend = p->offset + p->npins - 1;
1177
1178 if (i == 0) {
1179 /* First iteration, set start values */
1180 lowest = gstart;
1181 highest = gend;
1182 } else {
1183 if (gstart < lowest)
1184 lowest = gstart;
1185 if (gend > highest)
1186 highest = gend;
1187 }
1188 }
1189 /* this gives the absolute number of pins */
1190 npins = highest - lowest + 1;
1191 return npins;
1192 }
1193
1194 static const struct of_device_id abx500_gpio_match[] = {
1195 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1196 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1197 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1198 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1199 { }
1200 };
1201
1202 static int abx500_gpio_probe(struct platform_device *pdev)
1203 {
1204 struct ab8500_platform_data *abx500_pdata =
1205 dev_get_platdata(pdev->dev.parent);
1206 struct abx500_gpio_platform_data *pdata = NULL;
1207 struct device_node *np = pdev->dev.of_node;
1208 struct abx500_pinctrl *pct;
1209 const struct platform_device_id *platid = platform_get_device_id(pdev);
1210 unsigned int id = -1;
1211 int ret, err;
1212 int i;
1213
1214 if (abx500_pdata)
1215 pdata = abx500_pdata->gpio;
1216
1217 if (!(pdata || np)) {
1218 dev_err(&pdev->dev, "gpio dt and platform data missing\n");
1219 return -ENODEV;
1220 }
1221
1222 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1223 GFP_KERNEL);
1224 if (pct == NULL) {
1225 dev_err(&pdev->dev,
1226 "failed to allocate memory for pct\n");
1227 return -ENOMEM;
1228 }
1229
1230 pct->dev = &pdev->dev;
1231 pct->parent = dev_get_drvdata(pdev->dev.parent);
1232 pct->chip = abx500gpio_chip;
1233 pct->chip.dev = &pdev->dev;
1234 pct->chip.base = (np) ? -1 : pdata->gpio_base;
1235
1236 if (platid)
1237 id = platid->driver_data;
1238 else if (np) {
1239 const struct of_device_id *match;
1240
1241 match = of_match_device(abx500_gpio_match, &pdev->dev);
1242 if (match)
1243 id = (unsigned long)match->data;
1244 }
1245
1246 /* Poke in other ASIC variants here */
1247 switch (id) {
1248 case PINCTRL_AB8500:
1249 abx500_pinctrl_ab8500_init(&pct->soc);
1250 break;
1251 case PINCTRL_AB8540:
1252 abx500_pinctrl_ab8540_init(&pct->soc);
1253 break;
1254 case PINCTRL_AB9540:
1255 abx500_pinctrl_ab9540_init(&pct->soc);
1256 break;
1257 case PINCTRL_AB8505:
1258 abx500_pinctrl_ab8505_init(&pct->soc);
1259 break;
1260 default:
1261 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1262 return -EINVAL;
1263 }
1264
1265 if (!pct->soc) {
1266 dev_err(&pdev->dev, "Invalid SOC data\n");
1267 return -EINVAL;
1268 }
1269
1270 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1271 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1272 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1273
1274 ret = gpiochip_add(&pct->chip);
1275 if (ret) {
1276 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1277 return ret;
1278 }
1279 dev_info(&pdev->dev, "added gpiochip\n");
1280
1281 abx500_pinctrl_desc.pins = pct->soc->pins;
1282 abx500_pinctrl_desc.npins = pct->soc->npins;
1283 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
1284 if (!pct->pctldev) {
1285 dev_err(&pdev->dev,
1286 "could not register abx500 pinctrl driver\n");
1287 ret = -EINVAL;
1288 goto out_rem_chip;
1289 }
1290 dev_info(&pdev->dev, "registered pin controller\n");
1291
1292 /* We will handle a range of GPIO pins */
1293 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1294 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1295
1296 ret = gpiochip_add_pin_range(&pct->chip,
1297 dev_name(&pdev->dev),
1298 p->offset - 1, p->offset, p->npins);
1299 if (ret < 0)
1300 goto out_rem_chip;
1301 }
1302
1303 platform_set_drvdata(pdev, pct);
1304 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1305
1306 return 0;
1307
1308 out_rem_chip:
1309 err = gpiochip_remove(&pct->chip);
1310 if (err)
1311 dev_info(&pdev->dev, "failed to remove gpiochip\n");
1312
1313 return ret;
1314 }
1315
1316 /**
1317 * abx500_gpio_remove() - remove Ab8500-gpio driver
1318 * @pdev: Platform device registered
1319 */
1320 static int abx500_gpio_remove(struct platform_device *pdev)
1321 {
1322 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1323 int ret;
1324
1325 ret = gpiochip_remove(&pct->chip);
1326 if (ret < 0) {
1327 dev_err(pct->dev, "unable to remove gpiochip: %d\n",
1328 ret);
1329 return ret;
1330 }
1331
1332 return 0;
1333 }
1334
1335 static const struct platform_device_id abx500_pinctrl_id[] = {
1336 { "pinctrl-ab8500", PINCTRL_AB8500 },
1337 { "pinctrl-ab8540", PINCTRL_AB8540 },
1338 { "pinctrl-ab9540", PINCTRL_AB9540 },
1339 { "pinctrl-ab8505", PINCTRL_AB8505 },
1340 { },
1341 };
1342
1343 static struct platform_driver abx500_gpio_driver = {
1344 .driver = {
1345 .name = "abx500-gpio",
1346 .owner = THIS_MODULE,
1347 .of_match_table = abx500_gpio_match,
1348 },
1349 .probe = abx500_gpio_probe,
1350 .remove = abx500_gpio_remove,
1351 .id_table = abx500_pinctrl_id,
1352 };
1353
1354 static int __init abx500_gpio_init(void)
1355 {
1356 return platform_driver_register(&abx500_gpio_driver);
1357 }
1358 core_initcall(abx500_gpio_init);
1359
1360 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1361 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1362 MODULE_ALIAS("platform:abx500-gpio");
1363 MODULE_LICENSE("GPL v2");
CRIS linux kernel tree