drivers/pinctrl/sh-pfc/gpio.c

   1 /*
   2  * SuperH Pin Function Controller GPIO driver.
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  * Copyright (C) 2009 - 2012 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #include <linux/device.h>
  13 #include <linux/gpio.h>
  14 #include <linux/init.h>
  15 #include <linux/module.h>
  16 #include <linux/pinctrl/consumer.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19
  20 #include "core.h"
  21
  22 struct sh_pfc_gpio_data_reg {
  23         const struct pinmux_data_reg *info;
  24         unsigned long shadow;
  25 };
  26
  27 struct sh_pfc_gpio_pin {
  28         u8 dbit;
  29         u8 dreg;
  30 };
  31
  32 struct sh_pfc_chip {
  33         struct sh_pfc                   *pfc;
  34         struct gpio_chip                gpio_chip;
  35
  36         struct sh_pfc_window            *mem;
  37         struct sh_pfc_gpio_data_reg     *regs;
  38         struct sh_pfc_gpio_pin          *pins;
  39 };
  40
  41 static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
  42 {
  43         return container_of(gc, struct sh_pfc_chip, gpio_chip);
  44 }
  45
  46 static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
  47 {
  48         return gpio_to_pfc_chip(gc)->pfc;
  49 }
  50
  51 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
  52                               struct sh_pfc_gpio_data_reg **reg,
  53                               unsigned int *bit)
  54 {
  55         int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
  56         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
  57
  58         *reg = &chip->regs[gpio_pin->dreg];
  59         *bit = gpio_pin->dbit;
  60 }
  61
  62 static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
  63                                         const struct pinmux_data_reg *dreg)
  64 {
  65         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  66
  67         return sh_pfc_read_raw_reg(mem, dreg->reg_width);
  68 }
  69
  70 static void gpio_write_data_reg(struct sh_pfc_chip *chip,
  71                                 const struct pinmux_data_reg *dreg,
  72                                 unsigned long value)
  73 {
  74         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  75
  76         sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
  77 }
  78
  79 static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
  80 {
  81         struct sh_pfc *pfc = chip->pfc;
  82         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
  83         const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
  84         const struct pinmux_data_reg *dreg;
  85         unsigned int bit;
  86         unsigned int i;
  87
  88         for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
  89                 for (bit = 0; bit < dreg->reg_width; bit++) {
  90                         if (dreg->enum_ids[bit] == pin->enum_id) {
  91                                 gpio_pin->dreg = i;
  92                                 gpio_pin->dbit = bit;
  93                                 return;
  94                         }
  95                 }
  96         }
  97
  98         BUG();
  99 }
 100
 101 static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
 102 {
 103         struct sh_pfc *pfc = chip->pfc;
 104         const struct pinmux_data_reg *dreg;
 105         unsigned int i;
 106
 107         /* Count the number of data registers, allocate memory and initialize
 108          * them.
 109          */
 110         for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
 111                 ;
 112
 113         chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
 114                                   GFP_KERNEL);
 115         if (chip->regs == NULL)
 116                 return -ENOMEM;
 117
 118         for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
 119                 chip->regs[i].info = dreg;
 120                 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
 121         }
 122
 123         for (i = 0; i < pfc->info->nr_pins; i++) {
 124                 if (pfc->info->pins[i].enum_id == 0)
 125                         continue;
 126
 127                 gpio_setup_data_reg(chip, i);
 128         }
 129
 130         return 0;
 131 }
 132
 133 /* -----------------------------------------------------------------------------
 134  * Pin GPIOs
 135  */
 136
 137 static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
 138 {
 139         struct sh_pfc *pfc = gpio_to_pfc(gc);
 140         int idx = sh_pfc_get_pin_index(pfc, offset);
 141
 142         if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
 143                 return -EINVAL;
 144
 145         return pinctrl_request_gpio(offset);
 146 }
 147
 148 static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
 149 {
 150         return pinctrl_free_gpio(offset);
 151 }
 152
 153 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
 154                                int value)
 155 {
 156         struct sh_pfc_gpio_data_reg *reg;
 157         unsigned long pos;
 158         unsigned int bit;
 159
 160         gpio_get_data_reg(chip, offset, &reg, &bit);
 161
 162         pos = reg->info->reg_width - (bit + 1);
 163
 164         if (value)
 165                 set_bit(pos, &reg->shadow);
 166         else
 167                 clear_bit(pos, &reg->shadow);
 168
 169         gpio_write_data_reg(chip, reg->info, reg->shadow);
 170 }
 171
 172 static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
 173 {
 174         return pinctrl_gpio_direction_input(offset);
 175 }
 176
 177 static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
 178                                     int value)
 179 {
 180         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 181
 182         return pinctrl_gpio_direction_output(offset);
 183 }
 184
 185 static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
 186 {
 187         struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
 188         struct sh_pfc_gpio_data_reg *reg;
 189         unsigned long pos;
 190         unsigned int bit;
 191
 192         gpio_get_data_reg(chip, offset, &reg, &bit);
 193
 194         pos = reg->info->reg_width - (bit + 1);
 195
 196         return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
 197 }
 198
 199 static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 200 {
 201         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 202 }
 203
 204 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 205 {
 206         struct sh_pfc *pfc = gpio_to_pfc(gc);
 207         int i, k;
 208
 209         for (i = 0; i < pfc->info->gpio_irq_size; i++) {
 210                 unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
 211
 212                 for (k = 0; gpios[k]; k++) {
 213                         if (gpios[k] == offset)
 214                                 return pfc->info->gpio_irq[i].irq;
 215                 }
 216         }
 217
 218         return -ENOSYS;
 219 }
 220
 221 static int gpio_pin_setup(struct sh_pfc_chip *chip)
 222 {
 223         struct sh_pfc *pfc = chip->pfc;
 224         struct gpio_chip *gc = &chip->gpio_chip;
 225         int ret;
 226
 227         chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
 228                                   GFP_KERNEL);
 229         if (chip->pins == NULL)
 230                 return -ENOMEM;
 231
 232         ret = gpio_setup_data_regs(chip);
 233         if (ret < 0)
 234                 return ret;
 235
 236         gc->request = gpio_pin_request;
 237         gc->free = gpio_pin_free;
 238         gc->direction_input = gpio_pin_direction_input;
 239         gc->get = gpio_pin_get;
 240         gc->direction_output = gpio_pin_direction_output;
 241         gc->set = gpio_pin_set;
 242         gc->to_irq = gpio_pin_to_irq;
 243
 244         gc->label = pfc->info->name;
 245         gc->dev = pfc->dev;
 246         gc->owner = THIS_MODULE;
 247         gc->base = 0;
 248         gc->ngpio = pfc->nr_pins;
 249
 250         return 0;
 251 }
 252
 253 /* -----------------------------------------------------------------------------
 254  * Function GPIOs
 255  */
 256
 257 static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
 258 {
 259         static bool __print_once;
 260         struct sh_pfc *pfc = gpio_to_pfc(gc);
 261         unsigned int mark = pfc->info->func_gpios[offset].enum_id;
 262         unsigned long flags;
 263         int ret;
 264
 265         if (!__print_once) {
 266                 dev_notice(pfc->dev,
 267                            "Use of GPIO API for function requests is deprecated."
 268                            " Convert to pinctrl\n");
 269                 __print_once = true;
 270         }
 271
 272         if (mark == 0)
 273                 return -EINVAL;
 274
 275         spin_lock_irqsave(&pfc->lock, flags);
 276         ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
 277         spin_unlock_irqrestore(&pfc->lock, flags);
 278
 279         return ret;
 280 }
 281
 282 static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
 283 {
 284 }
 285
 286 static int gpio_function_setup(struct sh_pfc_chip *chip)
 287 {
 288         struct sh_pfc *pfc = chip->pfc;
 289         struct gpio_chip *gc = &chip->gpio_chip;
 290
 291         gc->request = gpio_function_request;
 292         gc->free = gpio_function_free;
 293
 294         gc->label = pfc->info->name;
 295         gc->owner = THIS_MODULE;
 296         gc->base = pfc->nr_pins;
 297         gc->ngpio = pfc->info->nr_func_gpios;
 298
 299         return 0;
 300 }
 301
 302 /* -----------------------------------------------------------------------------
 303  * Register/unregister
 304  */
 305
 306 static struct sh_pfc_chip *
 307 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
 308                     struct sh_pfc_window *mem)
 309 {
 310         struct sh_pfc_chip *chip;
 311         int ret;
 312
 313         chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
 314         if (unlikely(!chip))
 315                 return ERR_PTR(-ENOMEM);
 316
 317         chip->mem = mem;
 318         chip->pfc = pfc;
 319
 320         ret = setup(chip);
 321         if (ret < 0)
 322                 return ERR_PTR(ret);
 323
 324         ret = gpiochip_add(&chip->gpio_chip);
 325         if (unlikely(ret < 0))
 326                 return ERR_PTR(ret);
 327
 328         dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
 329                  chip->gpio_chip.label, chip->gpio_chip.base,
 330                  chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
 331
 332         return chip;
 333 }
 334
 335 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 336 {
 337         const struct pinmux_range *ranges;
 338         struct pinmux_range def_range;
 339         struct sh_pfc_chip *chip;
 340         unsigned int nr_ranges;
 341         unsigned int i;
 342         int ret;
 343
 344         if (pfc->info->data_regs == NULL)
 345                 return 0;
 346
 347         /* Find the memory window that contain the GPIO registers. Boards that
 348          * register a separate GPIO device will not supply a memory resource
 349          * that covers the data registers. In that case don't try to handle
 350          * GPIOs.
 351          */
 352         for (i = 0; i < pfc->num_windows; ++i) {
 353                 struct sh_pfc_window *window = &pfc->window[i];
 354
 355                 if (pfc->info->data_regs[0].reg >= window->phys &&
 356                     pfc->info->data_regs[0].reg < window->phys + window->size)
 357                         break;
 358         }
 359
 360         if (i == pfc->num_windows)
 361                 return 0;
 362
 363         /* Register the real GPIOs chip. */
 364         chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->window[i]);
 365         if (IS_ERR(chip))
 366                 return PTR_ERR(chip);
 367
 368         pfc->gpio = chip;
 369
 370         /* Register the GPIO to pin mappings. */
 371         if (pfc->info->ranges == NULL) {
 372                 def_range.begin = 0;
 373                 def_range.end = pfc->info->nr_pins - 1;
 374                 ranges = &def_range;
 375                 nr_ranges = 1;
 376         } else {
 377                 ranges = pfc->info->ranges;
 378                 nr_ranges = pfc->info->nr_ranges;
 379         }
 380
 381         for (i = 0; i < nr_ranges; ++i) {
 382                 const struct pinmux_range *range = &ranges[i];
 383
 384                 ret = gpiochip_add_pin_range(&chip->gpio_chip,
 385                                              dev_name(pfc->dev),
 386                                              range->begin, range->begin,
 387                                              range->end - range->begin + 1);
 388                 if (ret < 0)
 389                         return ret;
 390         }
 391
 392         /* Register the function GPIOs chip. */
 393         if (pfc->info->nr_func_gpios == 0)
 394                 return 0;
 395
 396         chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
 397         if (IS_ERR(chip))
 398                 return PTR_ERR(chip);
 399
 400         pfc->func = chip;
 401
 402         return 0;
 403 }
 404
 405 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
 406 {
 407         int err;
 408         int ret;
 409
 410         ret = gpiochip_remove(&pfc->gpio->gpio_chip);
 411         err = gpiochip_remove(&pfc->func->gpio_chip);
 412
 413         return ret < 0 ? ret : err;
 414 }