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Linux 3.11-rc3
[cris-mirror.git] / drivers / tty / serial / bfin_uart.c
blob26a3be7ced7d92df93616f2a50363970a93de67b
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2011 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38 #include <asm/bfin_serial.h>
39
40 #ifdef CONFIG_SERIAL_BFIN_MODULE
41 # undef CONFIG_EARLY_PRINTK
42 #endif
43
44 #ifdef CONFIG_SERIAL_BFIN_MODULE
45 # undef CONFIG_EARLY_PRINTK
46 #endif
47
48 /* UART name and device definitions */
49 #define BFIN_SERIAL_DEV_NAME "ttyBF"
50 #define BFIN_SERIAL_MAJOR 204
51 #define BFIN_SERIAL_MINOR 64
52
53 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
54
55 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
56 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
57
58 # ifndef CONFIG_SERIAL_BFIN_PIO
59 # error KGDB only support UART in PIO mode.
60 # endif
61
62 static int kgdboc_port_line;
63 static int kgdboc_break_enabled;
64 #endif
65 /*
66 * Setup for console. Argument comes from the menuconfig
67 */
68 #define DMA_RX_XCOUNT 512
69 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
70
71 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
72
73 #ifdef CONFIG_SERIAL_BFIN_DMA
74 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
75 #else
76 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
77 #endif
78
79 static void bfin_serial_reset_irda(struct uart_port *port);
80
81 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
82 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
83 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
84 {
85 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
86 if (uart->cts_pin < 0)
87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
88
89 /* CTS PIN is negative assertive. */
90 if (UART_GET_CTS(uart))
91 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
92 else
93 return TIOCM_DSR | TIOCM_CAR;
94 }
95
96 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
97 {
98 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
99 if (uart->rts_pin < 0)
100 return;
101
102 /* RTS PIN is negative assertive. */
103 if (mctrl & TIOCM_RTS)
104 UART_ENABLE_RTS(uart);
105 else
106 UART_DISABLE_RTS(uart);
107 }
108
109 /*
110 * Handle any change of modem status signal.
111 */
112 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
113 {
114 struct bfin_serial_port *uart = dev_id;
115 unsigned int status = bfin_serial_get_mctrl(&uart->port);
116 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
117 struct tty_struct *tty = uart->port.state->port.tty;
118
119 UART_CLEAR_SCTS(uart);
120 if (tty->hw_stopped) {
121 if (status) {
122 tty->hw_stopped = 0;
123 uart_write_wakeup(&uart->port);
124 }
125 } else {
126 if (!status)
127 tty->hw_stopped = 1;
128 }
129 #endif
130 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
131
132 return IRQ_HANDLED;
133 }
134 #else
135 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
136 {
137 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
138 }
139
140 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
141 {
142 }
143 #endif
144
145 /*
146 * interrupts are disabled on entry
147 */
148 static void bfin_serial_stop_tx(struct uart_port *port)
149 {
150 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
151 #ifdef CONFIG_SERIAL_BFIN_DMA
152 struct circ_buf *xmit = &uart->port.state->xmit;
153 #endif
154
155 while (!(UART_GET_LSR(uart) & TEMT))
156 cpu_relax();
157
158 #ifdef CONFIG_SERIAL_BFIN_DMA
159 disable_dma(uart->tx_dma_channel);
160 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
161 uart->port.icount.tx += uart->tx_count;
162 uart->tx_count = 0;
163 uart->tx_done = 1;
164 #else
165 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
166 /* Clear TFI bit */
167 UART_PUT_LSR(uart, TFI);
168 #endif
169 UART_CLEAR_IER(uart, ETBEI);
170 #endif
171 }
172
173 /*
174 * port is locked and interrupts are disabled
175 */
176 static void bfin_serial_start_tx(struct uart_port *port)
177 {
178 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
179 struct tty_struct *tty = uart->port.state->port.tty;
180
181 /*
182 * To avoid losting RX interrupt, we reset IR function
183 * before sending data.
184 */
185 if (tty->termios.c_line == N_IRDA)
186 bfin_serial_reset_irda(port);
187
188 #ifdef CONFIG_SERIAL_BFIN_DMA
189 if (uart->tx_done)
190 bfin_serial_dma_tx_chars(uart);
191 #else
192 UART_SET_IER(uart, ETBEI);
193 bfin_serial_tx_chars(uart);
194 #endif
195 }
196
197 /*
198 * Interrupts are enabled
199 */
200 static void bfin_serial_stop_rx(struct uart_port *port)
201 {
202 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
203
204 UART_CLEAR_IER(uart, ERBFI);
205 }
206
207 /*
208 * Set the modem control timer to fire immediately.
209 */
210 static void bfin_serial_enable_ms(struct uart_port *port)
211 {
212 }
213
214
215 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
216 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
217 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
218 #else
219 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
220 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
221 #endif
222
223 #ifdef CONFIG_SERIAL_BFIN_PIO
224 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
225 {
226 unsigned int status, ch, flg;
227 static struct timeval anomaly_start = { .tv_sec = 0 };
228
229 status = UART_GET_LSR(uart);
230 UART_CLEAR_LSR(uart);
231
232 ch = UART_GET_CHAR(uart);
233 uart->port.icount.rx++;
234
235 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
236 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
237 if (kgdb_connected && kgdboc_port_line == uart->port.line
238 && kgdboc_break_enabled)
239 if (ch == 0x3) {/* Ctrl + C */
240 kgdb_breakpoint();
241 return;
242 }
243
244 if (!uart->port.state)
245 return;
246 #endif
247 if (ANOMALY_05000363) {
248 /* The BF533 (and BF561) family of processors have a nice anomaly
249 * where they continuously generate characters for a "single" break.
250 * We have to basically ignore this flood until the "next" valid
251 * character comes across. Due to the nature of the flood, it is
252 * not possible to reliably catch bytes that are sent too quickly
253 * after this break. So application code talking to the Blackfin
254 * which sends a break signal must allow at least 1.5 character
255 * times after the end of the break for things to stabilize. This
256 * timeout was picked as it must absolutely be larger than 1
257 * character time +/- some percent. So 1.5 sounds good. All other
258 * Blackfin families operate properly. Woo.
259 */
260 if (anomaly_start.tv_sec) {
261 struct timeval curr;
262 suseconds_t usecs;
263
264 if ((~ch & (~ch + 1)) & 0xff)
265 goto known_good_char;
266
267 do_gettimeofday(&curr);
268 if (curr.tv_sec - anomaly_start.tv_sec > 1)
269 goto known_good_char;
270
271 usecs = 0;
272 if (curr.tv_sec != anomaly_start.tv_sec)
273 usecs += USEC_PER_SEC;
274 usecs += curr.tv_usec - anomaly_start.tv_usec;
275
276 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
277 goto known_good_char;
278
279 if (ch)
280 anomaly_start.tv_sec = 0;
281 else
282 anomaly_start = curr;
283
284 return;
285
286 known_good_char:
287 status &= ~BI;
288 anomaly_start.tv_sec = 0;
289 }
290 }
291
292 if (status & BI) {
293 if (ANOMALY_05000363)
294 if (bfin_revid() < 5)
295 do_gettimeofday(&anomaly_start);
296 uart->port.icount.brk++;
297 if (uart_handle_break(&uart->port))
298 goto ignore_char;
299 status &= ~(PE | FE);
300 }
301 if (status & PE)
302 uart->port.icount.parity++;
303 if (status & OE)
304 uart->port.icount.overrun++;
305 if (status & FE)
306 uart->port.icount.frame++;
307
308 status &= uart->port.read_status_mask;
309
310 if (status & BI)
311 flg = TTY_BREAK;
312 else if (status & PE)
313 flg = TTY_PARITY;
314 else if (status & FE)
315 flg = TTY_FRAME;
316 else
317 flg = TTY_NORMAL;
318
319 if (uart_handle_sysrq_char(&uart->port, ch))
320 goto ignore_char;
321
322 uart_insert_char(&uart->port, status, OE, ch, flg);
323
324 ignore_char:
325 tty_flip_buffer_push(&uart->port.state->port);
326 }
327
328 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
329 {
330 struct circ_buf *xmit = &uart->port.state->xmit;
331
332 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
333 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
334 /* Clear TFI bit */
335 UART_PUT_LSR(uart, TFI);
336 #endif
337 /* Anomaly notes:
338 * 05000215 - we always clear ETBEI within last UART TX
339 * interrupt to end a string. It is always set
340 * when start a new tx.
341 */
342 UART_CLEAR_IER(uart, ETBEI);
343 return;
344 }
345
346 if (uart->port.x_char) {
347 UART_PUT_CHAR(uart, uart->port.x_char);
348 uart->port.icount.tx++;
349 uart->port.x_char = 0;
350 }
351
352 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
353 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
354 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
355 uart->port.icount.tx++;
356 }
357
358 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
359 uart_write_wakeup(&uart->port);
360 }
361
362 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
363 {
364 struct bfin_serial_port *uart = dev_id;
365
366 while (UART_GET_LSR(uart) & DR)
367 bfin_serial_rx_chars(uart);
368
369 return IRQ_HANDLED;
370 }
371
372 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
373 {
374 struct bfin_serial_port *uart = dev_id;
375
376 spin_lock(&uart->port.lock);
377 if (UART_GET_LSR(uart) & THRE)
378 bfin_serial_tx_chars(uart);
379 spin_unlock(&uart->port.lock);
380
381 return IRQ_HANDLED;
382 }
383 #endif
384
385 #ifdef CONFIG_SERIAL_BFIN_DMA
386 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
387 {
388 struct circ_buf *xmit = &uart->port.state->xmit;
389
390 uart->tx_done = 0;
391
392 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
393 uart->tx_count = 0;
394 uart->tx_done = 1;
395 return;
396 }
397
398 if (uart->port.x_char) {
399 UART_PUT_CHAR(uart, uart->port.x_char);
400 uart->port.icount.tx++;
401 uart->port.x_char = 0;
402 }
403
404 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
405 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
406 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
407 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
408 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
409 set_dma_config(uart->tx_dma_channel,
410 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
411 INTR_ON_BUF,
412 DIMENSION_LINEAR,
413 DATA_SIZE_8,
414 DMA_SYNC_RESTART));
415 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
416 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
417 set_dma_x_modify(uart->tx_dma_channel, 1);
418 SSYNC();
419 enable_dma(uart->tx_dma_channel);
420
421 UART_SET_IER(uart, ETBEI);
422 }
423
424 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
425 {
426 int i, flg, status;
427
428 status = UART_GET_LSR(uart);
429 UART_CLEAR_LSR(uart);
430
431 uart->port.icount.rx +=
432 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
433 UART_XMIT_SIZE);
434
435 if (status & BI) {
436 uart->port.icount.brk++;
437 if (uart_handle_break(&uart->port))
438 goto dma_ignore_char;
439 status &= ~(PE | FE);
440 }
441 if (status & PE)
442 uart->port.icount.parity++;
443 if (status & OE)
444 uart->port.icount.overrun++;
445 if (status & FE)
446 uart->port.icount.frame++;
447
448 status &= uart->port.read_status_mask;
449
450 if (status & BI)
451 flg = TTY_BREAK;
452 else if (status & PE)
453 flg = TTY_PARITY;
454 else if (status & FE)
455 flg = TTY_FRAME;
456 else
457 flg = TTY_NORMAL;
458
459 for (i = uart->rx_dma_buf.tail; ; i++) {
460 if (i >= UART_XMIT_SIZE)
461 i = 0;
462 if (i == uart->rx_dma_buf.head)
463 break;
464 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
465 uart_insert_char(&uart->port, status, OE,
466 uart->rx_dma_buf.buf[i], flg);
467 }
468
469 dma_ignore_char:
470 tty_flip_buffer_push(&uart->port.state->port);
471 }
472
473 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
474 {
475 int x_pos, pos;
476 unsigned long flags;
477
478 spin_lock_irqsave(&uart->rx_lock, flags);
479
480 /* 2D DMA RX buffer ring is used. Because curr_y_count and
481 * curr_x_count can't be read as an atomic operation,
482 * curr_y_count should be read before curr_x_count. When
483 * curr_x_count is read, curr_y_count may already indicate
484 * next buffer line. But, the position calculated here is
485 * still indicate the old line. The wrong position data may
486 * be smaller than current buffer tail, which cause garbages
487 * are received if it is not prohibit.
488 */
489 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
490 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
491 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
492 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
493 uart->rx_dma_nrows = 0;
494 x_pos = DMA_RX_XCOUNT - x_pos;
495 if (x_pos == DMA_RX_XCOUNT)
496 x_pos = 0;
497
498 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
499 /* Ignore receiving data if new position is in the same line of
500 * current buffer tail and small.
501 */
502 if (pos > uart->rx_dma_buf.tail ||
503 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
504 uart->rx_dma_buf.head = pos;
505 bfin_serial_dma_rx_chars(uart);
506 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
507 }
508
509 spin_unlock_irqrestore(&uart->rx_lock, flags);
510
511 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
512 }
513
514 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
515 {
516 struct bfin_serial_port *uart = dev_id;
517 struct circ_buf *xmit = &uart->port.state->xmit;
518
519 spin_lock(&uart->port.lock);
520 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
521 disable_dma(uart->tx_dma_channel);
522 clear_dma_irqstat(uart->tx_dma_channel);
523 /* Anomaly notes:
524 * 05000215 - we always clear ETBEI within last UART TX
525 * interrupt to end a string. It is always set
526 * when start a new tx.
527 */
528 UART_CLEAR_IER(uart, ETBEI);
529 uart->port.icount.tx += uart->tx_count;
530 if (!(xmit->tail == 0 && xmit->head == 0)) {
531 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
532
533 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
534 uart_write_wakeup(&uart->port);
535 }
536
537 bfin_serial_dma_tx_chars(uart);
538 }
539
540 spin_unlock(&uart->port.lock);
541 return IRQ_HANDLED;
542 }
543
544 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
545 {
546 struct bfin_serial_port *uart = dev_id;
547 unsigned int irqstat;
548 int x_pos, pos;
549
550 spin_lock(&uart->rx_lock);
551 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
552 clear_dma_irqstat(uart->rx_dma_channel);
553
554 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
555 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
556 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
557 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
558 uart->rx_dma_nrows = 0;
559
560 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
561 if (pos > uart->rx_dma_buf.tail ||
562 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
563 uart->rx_dma_buf.head = pos;
564 bfin_serial_dma_rx_chars(uart);
565 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
566 }
567
568 spin_unlock(&uart->rx_lock);
569
570 return IRQ_HANDLED;
571 }
572 #endif
573
574 /*
575 * Return TIOCSER_TEMT when transmitter is not busy.
576 */
577 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
578 {
579 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
580 unsigned int lsr;
581
582 lsr = UART_GET_LSR(uart);
583 if (lsr & TEMT)
584 return TIOCSER_TEMT;
585 else
586 return 0;
587 }
588
589 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
590 {
591 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
592 u32 lcr = UART_GET_LCR(uart);
593 if (break_state)
594 lcr |= SB;
595 else
596 lcr &= ~SB;
597 UART_PUT_LCR(uart, lcr);
598 SSYNC();
599 }
600
601 static int bfin_serial_startup(struct uart_port *port)
602 {
603 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
604
605 #ifdef CONFIG_SERIAL_BFIN_DMA
606 dma_addr_t dma_handle;
607
608 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
609 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
610 return -EBUSY;
611 }
612
613 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
614 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
615 free_dma(uart->rx_dma_channel);
616 return -EBUSY;
617 }
618
619 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
620 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
621
622 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
623 uart->rx_dma_buf.head = 0;
624 uart->rx_dma_buf.tail = 0;
625 uart->rx_dma_nrows = 0;
626
627 set_dma_config(uart->rx_dma_channel,
628 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
629 INTR_ON_ROW, DIMENSION_2D,
630 DATA_SIZE_8,
631 DMA_SYNC_RESTART));
632 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
633 set_dma_x_modify(uart->rx_dma_channel, 1);
634 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
635 set_dma_y_modify(uart->rx_dma_channel, 1);
636 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
637 enable_dma(uart->rx_dma_channel);
638
639 uart->rx_dma_timer.data = (unsigned long)(uart);
640 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
641 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
642 add_timer(&(uart->rx_dma_timer));
643 #else
644 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
645 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
646 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
647 kgdboc_break_enabled = 0;
648 else {
649 # endif
650 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
651 "BFIN_UART_RX", uart)) {
652 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
653 return -EBUSY;
654 }
655
656 if (request_irq
657 (uart->tx_irq, bfin_serial_tx_int, 0,
658 "BFIN_UART_TX", uart)) {
659 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
660 free_irq(uart->rx_irq, uart);
661 return -EBUSY;
662 }
663
664 # ifdef CONFIG_BF54x
665 {
666 /*
667 * UART2 and UART3 on BF548 share interrupt PINs and DMA
668 * controllers with SPORT2 and SPORT3. UART rx and tx
669 * interrupts are generated in PIO mode only when configure
670 * their peripheral mapping registers properly, which means
671 * request corresponding DMA channels in PIO mode as well.
672 */
673 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
674
675 switch (uart->rx_irq) {
676 case IRQ_UART3_RX:
677 uart_dma_ch_rx = CH_UART3_RX;
678 uart_dma_ch_tx = CH_UART3_TX;
679 break;
680 case IRQ_UART2_RX:
681 uart_dma_ch_rx = CH_UART2_RX;
682 uart_dma_ch_tx = CH_UART2_TX;
683 break;
684 default:
685 uart_dma_ch_rx = uart_dma_ch_tx = 0;
686 break;
687 };
688
689 if (uart_dma_ch_rx &&
690 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
691 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
692 free_irq(uart->rx_irq, uart);
693 free_irq(uart->tx_irq, uart);
694 return -EBUSY;
695 }
696 if (uart_dma_ch_tx &&
697 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
698 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
699 free_dma(uart_dma_ch_rx);
700 free_irq(uart->rx_irq, uart);
701 free_irq(uart->tx_irq, uart);
702 return -EBUSY;
703 }
704 }
705 # endif
706 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
707 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
708 }
709 # endif
710 #endif
711
712 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
713 if (uart->cts_pin >= 0) {
714 if (request_irq(gpio_to_irq(uart->cts_pin),
715 bfin_serial_mctrl_cts_int,
716 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
717 0, "BFIN_UART_CTS", uart)) {
718 uart->cts_pin = -1;
719 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
720 }
721 }
722 if (uart->rts_pin >= 0) {
723 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
724 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
725 uart->rts_pin = -1;
726 } else
727 gpio_direction_output(uart->rts_pin, 0);
728 }
729 #endif
730 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
731 if (uart->cts_pin >= 0) {
732 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
733 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
734 uart->cts_pin = -1;
735 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
736 }
737
738 /* CTS RTS PINs are negative assertive. */
739 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
740 UART_SET_IER(uart, EDSSI);
741 }
742 #endif
743
744 UART_SET_IER(uart, ERBFI);
745 return 0;
746 }
747
748 static void bfin_serial_shutdown(struct uart_port *port)
749 {
750 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
751
752 #ifdef CONFIG_SERIAL_BFIN_DMA
753 disable_dma(uart->tx_dma_channel);
754 free_dma(uart->tx_dma_channel);
755 disable_dma(uart->rx_dma_channel);
756 free_dma(uart->rx_dma_channel);
757 del_timer(&(uart->rx_dma_timer));
758 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
759 #else
760 #ifdef CONFIG_BF54x
761 switch (uart->port.irq) {
762 case IRQ_UART3_RX:
763 free_dma(CH_UART3_RX);
764 free_dma(CH_UART3_TX);
765 break;
766 case IRQ_UART2_RX:
767 free_dma(CH_UART2_RX);
768 free_dma(CH_UART2_TX);
769 break;
770 default:
771 break;
772 };
773 #endif
774 free_irq(uart->rx_irq, uart);
775 free_irq(uart->tx_irq, uart);
776 #endif
777
778 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
779 if (uart->cts_pin >= 0)
780 free_irq(gpio_to_irq(uart->cts_pin), uart);
781 if (uart->rts_pin >= 0)
782 gpio_free(uart->rts_pin);
783 #endif
784 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
785 if (uart->cts_pin >= 0)
786 free_irq(uart->status_irq, uart);
787 #endif
788 }
789
790 static void
791 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
792 struct ktermios *old)
793 {
794 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
795 unsigned long flags;
796 unsigned int baud, quot;
797 unsigned int ier, lcr = 0;
798 unsigned long timeout;
799
800 switch (termios->c_cflag & CSIZE) {
801 case CS8:
802 lcr = WLS(8);
803 break;
804 case CS7:
805 lcr = WLS(7);
806 break;
807 case CS6:
808 lcr = WLS(6);
809 break;
810 case CS5:
811 lcr = WLS(5);
812 break;
813 default:
814 printk(KERN_ERR "%s: word length not supported\n",
815 __func__);
816 }
817
818 /* Anomaly notes:
819 * 05000231 - STOP bit is always set to 1 whatever the user is set.
820 */
821 if (termios->c_cflag & CSTOPB) {
822 if (ANOMALY_05000231)
823 printk(KERN_WARNING "STOP bits other than 1 is not "
824 "supported in case of anomaly 05000231.\n");
825 else
826 lcr |= STB;
827 }
828 if (termios->c_cflag & PARENB)
829 lcr |= PEN;
830 if (!(termios->c_cflag & PARODD))
831 lcr |= EPS;
832 if (termios->c_cflag & CMSPAR)
833 lcr |= STP;
834
835 spin_lock_irqsave(&uart->port.lock, flags);
836
837 port->read_status_mask = OE;
838 if (termios->c_iflag & INPCK)
839 port->read_status_mask |= (FE | PE);
840 if (termios->c_iflag & (BRKINT | PARMRK))
841 port->read_status_mask |= BI;
842
843 /*
844 * Characters to ignore
845 */
846 port->ignore_status_mask = 0;
847 if (termios->c_iflag & IGNPAR)
848 port->ignore_status_mask |= FE | PE;
849 if (termios->c_iflag & IGNBRK) {
850 port->ignore_status_mask |= BI;
851 /*
852 * If we're ignoring parity and break indicators,
853 * ignore overruns too (for real raw support).
854 */
855 if (termios->c_iflag & IGNPAR)
856 port->ignore_status_mask |= OE;
857 }
858
859 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
860 quot = uart_get_divisor(port, baud);
861
862 /* If discipline is not IRDA, apply ANOMALY_05000230 */
863 if (termios->c_line != N_IRDA)
864 quot -= ANOMALY_05000230;
865
866 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
867
868 /* Wait till the transfer buffer is empty */
869 timeout = jiffies + msecs_to_jiffies(10);
870 while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
871 if (time_after(jiffies, timeout)) {
872 dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
873 break;
874 }
875
876 /* Disable UART */
877 ier = UART_GET_IER(uart);
878 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
879 UART_DISABLE_INTS(uart);
880
881 /* Set DLAB in LCR to Access CLK */
882 UART_SET_DLAB(uart);
883
884 UART_PUT_CLK(uart, quot);
885 SSYNC();
886
887 /* Clear DLAB in LCR to Access THR RBR IER */
888 UART_CLEAR_DLAB(uart);
889
890 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
891
892 /* Enable UART */
893 UART_ENABLE_INTS(uart, ier);
894 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
895
896 /* Port speed changed, update the per-port timeout. */
897 uart_update_timeout(port, termios->c_cflag, baud);
898
899 spin_unlock_irqrestore(&uart->port.lock, flags);
900 }
901
902 static const char *bfin_serial_type(struct uart_port *port)
903 {
904 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
905
906 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
907 }
908
909 /*
910 * Release the memory region(s) being used by 'port'.
911 */
912 static void bfin_serial_release_port(struct uart_port *port)
913 {
914 }
915
916 /*
917 * Request the memory region(s) being used by 'port'.
918 */
919 static int bfin_serial_request_port(struct uart_port *port)
920 {
921 return 0;
922 }
923
924 /*
925 * Configure/autoconfigure the port.
926 */
927 static void bfin_serial_config_port(struct uart_port *port, int flags)
928 {
929 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
930
931 if (flags & UART_CONFIG_TYPE &&
932 bfin_serial_request_port(&uart->port) == 0)
933 uart->port.type = PORT_BFIN;
934 }
935
936 /*
937 * Verify the new serial_struct (for TIOCSSERIAL).
938 * The only change we allow are to the flags and type, and
939 * even then only between PORT_BFIN and PORT_UNKNOWN
940 */
941 static int
942 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
943 {
944 return 0;
945 }
946
947 /*
948 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
949 * In other cases, disable IrDA function.
950 */
951 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
952 {
953 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
954 unsigned int val;
955
956 switch (ld) {
957 case N_IRDA:
958 val = UART_GET_GCTL(uart);
959 val |= (UMOD_IRDA | RPOLC);
960 UART_PUT_GCTL(uart, val);
961 break;
962 default:
963 val = UART_GET_GCTL(uart);
964 val &= ~(UMOD_MASK | RPOLC);
965 UART_PUT_GCTL(uart, val);
966 }
967 }
968
969 static void bfin_serial_reset_irda(struct uart_port *port)
970 {
971 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
972 unsigned int val;
973
974 val = UART_GET_GCTL(uart);
975 val &= ~(UMOD_MASK | RPOLC);
976 UART_PUT_GCTL(uart, val);
977 SSYNC();
978 val |= (UMOD_IRDA | RPOLC);
979 UART_PUT_GCTL(uart, val);
980 SSYNC();
981 }
982
983 #ifdef CONFIG_CONSOLE_POLL
984 /* Anomaly notes:
985 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
986 * losing other bits of UART_LSR is not a problem here.
987 */
988 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
989 {
990 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
991
992 while (!(UART_GET_LSR(uart) & THRE))
993 cpu_relax();
994
995 UART_CLEAR_DLAB(uart);
996 UART_PUT_CHAR(uart, (unsigned char)chr);
997 }
998
999 static int bfin_serial_poll_get_char(struct uart_port *port)
1000 {
1001 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1002 unsigned char chr;
1003
1004 while (!(UART_GET_LSR(uart) & DR))
1005 cpu_relax();
1006
1007 UART_CLEAR_DLAB(uart);
1008 chr = UART_GET_CHAR(uart);
1009
1010 return chr;
1011 }
1012 #endif
1013
1014 static struct uart_ops bfin_serial_pops = {
1015 .tx_empty = bfin_serial_tx_empty,
1016 .set_mctrl = bfin_serial_set_mctrl,
1017 .get_mctrl = bfin_serial_get_mctrl,
1018 .stop_tx = bfin_serial_stop_tx,
1019 .start_tx = bfin_serial_start_tx,
1020 .stop_rx = bfin_serial_stop_rx,
1021 .enable_ms = bfin_serial_enable_ms,
1022 .break_ctl = bfin_serial_break_ctl,
1023 .startup = bfin_serial_startup,
1024 .shutdown = bfin_serial_shutdown,
1025 .set_termios = bfin_serial_set_termios,
1026 .set_ldisc = bfin_serial_set_ldisc,
1027 .type = bfin_serial_type,
1028 .release_port = bfin_serial_release_port,
1029 .request_port = bfin_serial_request_port,
1030 .config_port = bfin_serial_config_port,
1031 .verify_port = bfin_serial_verify_port,
1032 #ifdef CONFIG_CONSOLE_POLL
1033 .poll_put_char = bfin_serial_poll_put_char,
1034 .poll_get_char = bfin_serial_poll_get_char,
1035 #endif
1036 };
1037
1038 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1039 /*
1040 * If the port was already initialised (eg, by a boot loader),
1041 * try to determine the current setup.
1042 */
1043 static void __init
1044 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1045 int *parity, int *bits)
1046 {
1047 unsigned int status;
1048
1049 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1050 if (status == (ERBFI | ETBEI)) {
1051 /* ok, the port was enabled */
1052 u32 lcr, clk;
1053
1054 lcr = UART_GET_LCR(uart);
1055
1056 *parity = 'n';
1057 if (lcr & PEN) {
1058 if (lcr & EPS)
1059 *parity = 'e';
1060 else
1061 *parity = 'o';
1062 }
1063 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1064
1065 /* Set DLAB in LCR to Access CLK */
1066 UART_SET_DLAB(uart);
1067
1068 clk = UART_GET_CLK(uart);
1069
1070 /* Clear DLAB in LCR to Access THR RBR IER */
1071 UART_CLEAR_DLAB(uart);
1072
1073 *baud = get_sclk() / (16*clk);
1074 }
1075 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1076 }
1077
1078 static struct uart_driver bfin_serial_reg;
1079
1080 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1081 {
1082 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1083 while (!(UART_GET_LSR(uart) & THRE))
1084 barrier();
1085 UART_PUT_CHAR(uart, ch);
1086 }
1087
1088 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1089 defined (CONFIG_EARLY_PRINTK) */
1090
1091 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1092 #define CLASS_BFIN_CONSOLE "bfin-console"
1093 /*
1094 * Interrupts are disabled on entering
1095 */
1096 static void
1097 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1098 {
1099 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1100 unsigned long flags;
1101
1102 spin_lock_irqsave(&uart->port.lock, flags);
1103 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1104 spin_unlock_irqrestore(&uart->port.lock, flags);
1105
1106 }
1107
1108 static int __init
1109 bfin_serial_console_setup(struct console *co, char *options)
1110 {
1111 struct bfin_serial_port *uart;
1112 int baud = 57600;
1113 int bits = 8;
1114 int parity = 'n';
1115 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1116 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1117 int flow = 'r';
1118 # else
1119 int flow = 'n';
1120 # endif
1121
1122 /*
1123 * Check whether an invalid uart number has been specified, and
1124 * if so, search for the first available port that does have
1125 * console support.
1126 */
1127 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1128 return -ENODEV;
1129
1130 uart = bfin_serial_ports[co->index];
1131 if (!uart)
1132 return -ENODEV;
1133
1134 if (options)
1135 uart_parse_options(options, &baud, &parity, &bits, &flow);
1136 else
1137 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1138
1139 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1140 }
1141
1142 static struct console bfin_serial_console = {
1143 .name = BFIN_SERIAL_DEV_NAME,
1144 .write = bfin_serial_console_write,
1145 .device = uart_console_device,
1146 .setup = bfin_serial_console_setup,
1147 .flags = CON_PRINTBUFFER,
1148 .index = -1,
1149 .data = &bfin_serial_reg,
1150 };
1151 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1152 #else
1153 #define BFIN_SERIAL_CONSOLE NULL
1154 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1155
1156 #ifdef CONFIG_EARLY_PRINTK
1157 static struct bfin_serial_port bfin_earlyprintk_port;
1158 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1159
1160 /*
1161 * Interrupts are disabled on entering
1162 */
1163 static void
1164 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1165 {
1166 unsigned long flags;
1167
1168 if (bfin_earlyprintk_port.port.line != co->index)
1169 return;
1170
1171 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1172 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1173 bfin_serial_console_putchar);
1174 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1175 }
1176
1177 /*
1178 * This should have a .setup or .early_setup in it, but then things get called
1179 * without the command line options, and the baud rate gets messed up - so
1180 * don't let the common infrastructure play with things. (see calls to setup
1181 * & earlysetup in ./kernel/printk.c:register_console()
1182 */
1183 static struct __initdata console bfin_early_serial_console = {
1184 .name = "early_BFuart",
1185 .write = bfin_earlyprintk_console_write,
1186 .device = uart_console_device,
1187 .flags = CON_PRINTBUFFER,
1188 .index = -1,
1189 .data = &bfin_serial_reg,
1190 };
1191 #endif
1192
1193 static struct uart_driver bfin_serial_reg = {
1194 .owner = THIS_MODULE,
1195 .driver_name = DRIVER_NAME,
1196 .dev_name = BFIN_SERIAL_DEV_NAME,
1197 .major = BFIN_SERIAL_MAJOR,
1198 .minor = BFIN_SERIAL_MINOR,
1199 .nr = BFIN_UART_NR_PORTS,
1200 .cons = BFIN_SERIAL_CONSOLE,
1201 };
1202
1203 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1204 {
1205 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1206
1207 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1208 }
1209
1210 static int bfin_serial_resume(struct platform_device *pdev)
1211 {
1212 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1213
1214 return uart_resume_port(&bfin_serial_reg, &uart->port);
1215 }
1216
1217 static int bfin_serial_probe(struct platform_device *pdev)
1218 {
1219 struct resource *res;
1220 struct bfin_serial_port *uart = NULL;
1221 int ret = 0;
1222
1223 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1224 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1225 return -ENOENT;
1226 }
1227
1228 if (bfin_serial_ports[pdev->id] == NULL) {
1229
1230 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1231 if (!uart) {
1232 dev_err(&pdev->dev,
1233 "fail to malloc bfin_serial_port\n");
1234 return -ENOMEM;
1235 }
1236 bfin_serial_ports[pdev->id] = uart;
1237
1238 #ifdef CONFIG_EARLY_PRINTK
1239 if (!(bfin_earlyprintk_port.port.membase
1240 && bfin_earlyprintk_port.port.line == pdev->id)) {
1241 /*
1242 * If the peripheral PINs of current port is allocated
1243 * in earlyprintk probe stage, don't do it again.
1244 */
1245 #endif
1246 ret = peripheral_request_list(
1247 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1248 if (ret) {
1249 dev_err(&pdev->dev,
1250 "fail to request bfin serial peripherals\n");
1251 goto out_error_free_mem;
1252 }
1253 #ifdef CONFIG_EARLY_PRINTK
1254 }
1255 #endif
1256
1257 spin_lock_init(&uart->port.lock);
1258 uart->port.uartclk = get_sclk();
1259 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1260 uart->port.ops = &bfin_serial_pops;
1261 uart->port.line = pdev->id;
1262 uart->port.iotype = UPIO_MEM;
1263 uart->port.flags = UPF_BOOT_AUTOCONF;
1264
1265 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1266 if (res == NULL) {
1267 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1268 ret = -ENOENT;
1269 goto out_error_free_peripherals;
1270 }
1271
1272 uart->port.membase = ioremap(res->start, resource_size(res));
1273 if (!uart->port.membase) {
1274 dev_err(&pdev->dev, "Cannot map uart IO\n");
1275 ret = -ENXIO;
1276 goto out_error_free_peripherals;
1277 }
1278 uart->port.mapbase = res->start;
1279
1280 uart->tx_irq = platform_get_irq(pdev, 0);
1281 if (uart->tx_irq < 0) {
1282 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1283 ret = -ENOENT;
1284 goto out_error_unmap;
1285 }
1286
1287 uart->rx_irq = platform_get_irq(pdev, 1);
1288 if (uart->rx_irq < 0) {
1289 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1290 ret = -ENOENT;
1291 goto out_error_unmap;
1292 }
1293 uart->port.irq = uart->rx_irq;
1294
1295 uart->status_irq = platform_get_irq(pdev, 2);
1296 if (uart->status_irq < 0) {
1297 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1298 ret = -ENOENT;
1299 goto out_error_unmap;
1300 }
1301
1302 #ifdef CONFIG_SERIAL_BFIN_DMA
1303 spin_lock_init(&uart->rx_lock);
1304 uart->tx_done = 1;
1305 uart->tx_count = 0;
1306
1307 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1308 if (res == NULL) {
1309 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1310 ret = -ENOENT;
1311 goto out_error_unmap;
1312 }
1313 uart->tx_dma_channel = res->start;
1314
1315 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1316 if (res == NULL) {
1317 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1318 ret = -ENOENT;
1319 goto out_error_unmap;
1320 }
1321 uart->rx_dma_channel = res->start;
1322
1323 init_timer(&(uart->rx_dma_timer));
1324 #endif
1325
1326 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1327 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1328 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1329 if (res == NULL)
1330 uart->cts_pin = -1;
1331 else {
1332 uart->cts_pin = res->start;
1333 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1334 uart->port.flags |= ASYNC_CTS_FLOW;
1335 #endif
1336 }
1337
1338 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1339 if (res == NULL)
1340 uart->rts_pin = -1;
1341 else
1342 uart->rts_pin = res->start;
1343 #endif
1344 }
1345
1346 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1347 if (!is_early_platform_device(pdev)) {
1348 #endif
1349 uart = bfin_serial_ports[pdev->id];
1350 uart->port.dev = &pdev->dev;
1351 dev_set_drvdata(&pdev->dev, uart);
1352 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1353 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1354 }
1355 #endif
1356
1357 if (!ret)
1358 return 0;
1359
1360 if (uart) {
1361 out_error_unmap:
1362 iounmap(uart->port.membase);
1363 out_error_free_peripherals:
1364 peripheral_free_list(
1365 (unsigned short *)pdev->dev.platform_data);
1366 out_error_free_mem:
1367 kfree(uart);
1368 bfin_serial_ports[pdev->id] = NULL;
1369 }
1370
1371 return ret;
1372 }
1373
1374 static int bfin_serial_remove(struct platform_device *pdev)
1375 {
1376 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1377
1378 dev_set_drvdata(&pdev->dev, NULL);
1379
1380 if (uart) {
1381 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1382 iounmap(uart->port.membase);
1383 peripheral_free_list(
1384 (unsigned short *)pdev->dev.platform_data);
1385 kfree(uart);
1386 bfin_serial_ports[pdev->id] = NULL;
1387 }
1388
1389 return 0;
1390 }
1391
1392 static struct platform_driver bfin_serial_driver = {
1393 .probe = bfin_serial_probe,
1394 .remove = bfin_serial_remove,
1395 .suspend = bfin_serial_suspend,
1396 .resume = bfin_serial_resume,
1397 .driver = {
1398 .name = DRIVER_NAME,
1399 .owner = THIS_MODULE,
1400 },
1401 };
1402
1403 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1404 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1405 .class_str = CLASS_BFIN_CONSOLE,
1406 .pdrv = &bfin_serial_driver,
1407 .requested_id = EARLY_PLATFORM_ID_UNSET,
1408 };
1409
1410 static int __init bfin_serial_rs_console_init(void)
1411 {
1412 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1413
1414 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1415
1416 register_console(&bfin_serial_console);
1417
1418 return 0;
1419 }
1420 console_initcall(bfin_serial_rs_console_init);
1421 #endif
1422
1423 #ifdef CONFIG_EARLY_PRINTK
1424 /*
1425 * Memory can't be allocated dynamically during earlyprink init stage.
1426 * So, do individual probe for earlyprink with a static uart port variable.
1427 */
1428 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1429 {
1430 struct resource *res;
1431 int ret;
1432
1433 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1434 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1435 return -ENOENT;
1436 }
1437
1438 ret = peripheral_request_list(
1439 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1440 if (ret) {
1441 dev_err(&pdev->dev,
1442 "fail to request bfin serial peripherals\n");
1443 return ret;
1444 }
1445
1446 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1447 if (res == NULL) {
1448 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1449 ret = -ENOENT;
1450 goto out_error_free_peripherals;
1451 }
1452
1453 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1454 resource_size(res));
1455 if (!bfin_earlyprintk_port.port.membase) {
1456 dev_err(&pdev->dev, "Cannot map uart IO\n");
1457 ret = -ENXIO;
1458 goto out_error_free_peripherals;
1459 }
1460 bfin_earlyprintk_port.port.mapbase = res->start;
1461 bfin_earlyprintk_port.port.line = pdev->id;
1462 bfin_earlyprintk_port.port.uartclk = get_sclk();
1463 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1464 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1465
1466 return 0;
1467
1468 out_error_free_peripherals:
1469 peripheral_free_list(
1470 (unsigned short *)pdev->dev.platform_data);
1471
1472 return ret;
1473 }
1474
1475 static struct platform_driver bfin_earlyprintk_driver = {
1476 .probe = bfin_earlyprintk_probe,
1477 .driver = {
1478 .name = DRIVER_NAME,
1479 .owner = THIS_MODULE,
1480 },
1481 };
1482
1483 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1484 .class_str = CLASS_BFIN_EARLYPRINTK,
1485 .pdrv = &bfin_earlyprintk_driver,
1486 .requested_id = EARLY_PLATFORM_ID_UNSET,
1487 };
1488
1489 struct console __init *bfin_earlyserial_init(unsigned int port,
1490 unsigned int cflag)
1491 {
1492 struct ktermios t;
1493 char port_name[20];
1494
1495 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1496 return NULL;
1497
1498 /*
1499 * Only probe resource of the given port in earlyprintk boot arg.
1500 * The expected port id should be indicated in port name string.
1501 */
1502 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1503 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1504 port_name);
1505 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1506
1507 if (!bfin_earlyprintk_port.port.membase)
1508 return NULL;
1509
1510 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1511 /*
1512 * If we are using early serial, don't let the normal console rewind
1513 * log buffer, since that causes things to be printed multiple times
1514 */
1515 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1516 #endif
1517
1518 bfin_early_serial_console.index = port;
1519 t.c_cflag = cflag;
1520 t.c_iflag = 0;
1521 t.c_oflag = 0;
1522 t.c_lflag = ICANON;
1523 t.c_line = port;
1524 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1525
1526 return &bfin_early_serial_console;
1527 }
1528 #endif /* CONFIG_EARLY_PRINTK */
1529
1530 static int __init bfin_serial_init(void)
1531 {
1532 int ret;
1533
1534 pr_info("Blackfin serial driver\n");
1535
1536 ret = uart_register_driver(&bfin_serial_reg);
1537 if (ret) {
1538 pr_err("failed to register %s:%d\n",
1539 bfin_serial_reg.driver_name, ret);
1540 }
1541
1542 ret = platform_driver_register(&bfin_serial_driver);
1543 if (ret) {
1544 pr_err("fail to register bfin uart\n");
1545 uart_unregister_driver(&bfin_serial_reg);
1546 }
1547
1548 return ret;
1549 }
1550
1551 static void __exit bfin_serial_exit(void)
1552 {
1553 platform_driver_unregister(&bfin_serial_driver);
1554 uart_unregister_driver(&bfin_serial_reg);
1555 }
1556
1557
1558 module_init(bfin_serial_init);
1559 module_exit(bfin_serial_exit);
1560
1561 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1562 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1563 MODULE_LICENSE("GPL");
1564 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1565 MODULE_ALIAS("platform:bfin-uart");
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