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Linux 3.11-rc3
[cris-mirror.git] / drivers / tty / serial / pxa.c
blob05f504e0c27144b04b3b56b075256e6a20f5d4b9
1 /*
2 * Based on drivers/serial/8250.c by Russell King.
3 *
4 * Author: Nicolas Pitre
5 * Created: Feb 20, 2003
6 * Copyright: (C) 2003 Monta Vista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * Note 1: This driver is made separate from the already too overloaded
14 * 8250.c because it needs some kirks of its own and that'll make it
15 * easier to add DMA support.
16 *
17 * Note 2: I'm too sick of device allocation policies for serial ports.
18 * If someone else wants to request an "official" allocation of major/minor
19 * for this driver please be my guest. And don't forget that new hardware
20 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
21 * hope for a better port registration and dynamic device allocation scheme
22 * with the serial core maintainer satisfaction to appear soon.
23 */
24
25
26 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #define SUPPORT_SYSRQ
28 #endif
29
30 #include <linux/module.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/console.h>
34 #include <linux/sysrq.h>
35 #include <linux/serial_reg.h>
36 #include <linux/circ_buf.h>
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/of.h>
40 #include <linux/platform_device.h>
41 #include <linux/tty.h>
42 #include <linux/tty_flip.h>
43 #include <linux/serial_core.h>
44 #include <linux/clk.h>
45 #include <linux/io.h>
46 #include <linux/slab.h>
47
48 #define PXA_NAME_LEN 8
49
50 struct uart_pxa_port {
51 struct uart_port port;
52 unsigned char ier;
53 unsigned char lcr;
54 unsigned char mcr;
55 unsigned int lsr_break_flag;
56 struct clk *clk;
57 char name[PXA_NAME_LEN];
58 };
59
60 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
61 {
62 offset <<= 2;
63 return readl(up->port.membase + offset);
64 }
65
66 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
67 {
68 offset <<= 2;
69 writel(value, up->port.membase + offset);
70 }
71
72 static void serial_pxa_enable_ms(struct uart_port *port)
73 {
74 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
75
76 up->ier |= UART_IER_MSI;
77 serial_out(up, UART_IER, up->ier);
78 }
79
80 static void serial_pxa_stop_tx(struct uart_port *port)
81 {
82 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
83
84 if (up->ier & UART_IER_THRI) {
85 up->ier &= ~UART_IER_THRI;
86 serial_out(up, UART_IER, up->ier);
87 }
88 }
89
90 static void serial_pxa_stop_rx(struct uart_port *port)
91 {
92 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
93
94 up->ier &= ~UART_IER_RLSI;
95 up->port.read_status_mask &= ~UART_LSR_DR;
96 serial_out(up, UART_IER, up->ier);
97 }
98
99 static inline void receive_chars(struct uart_pxa_port *up, int *status)
100 {
101 unsigned int ch, flag;
102 int max_count = 256;
103
104 do {
105 /* work around Errata #20 according to
106 * Intel(R) PXA27x Processor Family
107 * Specification Update (May 2005)
108 *
109 * Step 2
110 * Disable the Reciever Time Out Interrupt via IER[RTOEI]
111 */
112 up->ier &= ~UART_IER_RTOIE;
113 serial_out(up, UART_IER, up->ier);
114
115 ch = serial_in(up, UART_RX);
116 flag = TTY_NORMAL;
117 up->port.icount.rx++;
118
119 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
120 UART_LSR_FE | UART_LSR_OE))) {
121 /*
122 * For statistics only
123 */
124 if (*status & UART_LSR_BI) {
125 *status &= ~(UART_LSR_FE | UART_LSR_PE);
126 up->port.icount.brk++;
127 /*
128 * We do the SysRQ and SAK checking
129 * here because otherwise the break
130 * may get masked by ignore_status_mask
131 * or read_status_mask.
132 */
133 if (uart_handle_break(&up->port))
134 goto ignore_char;
135 } else if (*status & UART_LSR_PE)
136 up->port.icount.parity++;
137 else if (*status & UART_LSR_FE)
138 up->port.icount.frame++;
139 if (*status & UART_LSR_OE)
140 up->port.icount.overrun++;
141
142 /*
143 * Mask off conditions which should be ignored.
144 */
145 *status &= up->port.read_status_mask;
146
147 #ifdef CONFIG_SERIAL_PXA_CONSOLE
148 if (up->port.line == up->port.cons->index) {
149 /* Recover the break flag from console xmit */
150 *status |= up->lsr_break_flag;
151 up->lsr_break_flag = 0;
152 }
153 #endif
154 if (*status & UART_LSR_BI) {
155 flag = TTY_BREAK;
156 } else if (*status & UART_LSR_PE)
157 flag = TTY_PARITY;
158 else if (*status & UART_LSR_FE)
159 flag = TTY_FRAME;
160 }
161
162 if (uart_handle_sysrq_char(&up->port, ch))
163 goto ignore_char;
164
165 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
166
167 ignore_char:
168 *status = serial_in(up, UART_LSR);
169 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
170 tty_flip_buffer_push(&up->port.state->port);
171
172 /* work around Errata #20 according to
173 * Intel(R) PXA27x Processor Family
174 * Specification Update (May 2005)
175 *
176 * Step 6:
177 * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
178 */
179 up->ier |= UART_IER_RTOIE;
180 serial_out(up, UART_IER, up->ier);
181 }
182
183 static void transmit_chars(struct uart_pxa_port *up)
184 {
185 struct circ_buf *xmit = &up->port.state->xmit;
186 int count;
187
188 if (up->port.x_char) {
189 serial_out(up, UART_TX, up->port.x_char);
190 up->port.icount.tx++;
191 up->port.x_char = 0;
192 return;
193 }
194 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
195 serial_pxa_stop_tx(&up->port);
196 return;
197 }
198
199 count = up->port.fifosize / 2;
200 do {
201 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
202 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
203 up->port.icount.tx++;
204 if (uart_circ_empty(xmit))
205 break;
206 } while (--count > 0);
207
208 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
209 uart_write_wakeup(&up->port);
210
211
212 if (uart_circ_empty(xmit))
213 serial_pxa_stop_tx(&up->port);
214 }
215
216 static void serial_pxa_start_tx(struct uart_port *port)
217 {
218 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
219
220 if (!(up->ier & UART_IER_THRI)) {
221 up->ier |= UART_IER_THRI;
222 serial_out(up, UART_IER, up->ier);
223 }
224 }
225
226 static inline void check_modem_status(struct uart_pxa_port *up)
227 {
228 int status;
229
230 status = serial_in(up, UART_MSR);
231
232 if ((status & UART_MSR_ANY_DELTA) == 0)
233 return;
234
235 if (status & UART_MSR_TERI)
236 up->port.icount.rng++;
237 if (status & UART_MSR_DDSR)
238 up->port.icount.dsr++;
239 if (status & UART_MSR_DDCD)
240 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
241 if (status & UART_MSR_DCTS)
242 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
243
244 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
245 }
246
247 /*
248 * This handles the interrupt from one port.
249 */
250 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
251 {
252 struct uart_pxa_port *up = dev_id;
253 unsigned int iir, lsr;
254
255 iir = serial_in(up, UART_IIR);
256 if (iir & UART_IIR_NO_INT)
257 return IRQ_NONE;
258 lsr = serial_in(up, UART_LSR);
259 if (lsr & UART_LSR_DR)
260 receive_chars(up, &lsr);
261 check_modem_status(up);
262 if (lsr & UART_LSR_THRE)
263 transmit_chars(up);
264 return IRQ_HANDLED;
265 }
266
267 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
268 {
269 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
270 unsigned long flags;
271 unsigned int ret;
272
273 spin_lock_irqsave(&up->port.lock, flags);
274 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
275 spin_unlock_irqrestore(&up->port.lock, flags);
276
277 return ret;
278 }
279
280 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
281 {
282 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
283 unsigned char status;
284 unsigned int ret;
285
286 status = serial_in(up, UART_MSR);
287
288 ret = 0;
289 if (status & UART_MSR_DCD)
290 ret |= TIOCM_CAR;
291 if (status & UART_MSR_RI)
292 ret |= TIOCM_RNG;
293 if (status & UART_MSR_DSR)
294 ret |= TIOCM_DSR;
295 if (status & UART_MSR_CTS)
296 ret |= TIOCM_CTS;
297 return ret;
298 }
299
300 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
301 {
302 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
303 unsigned char mcr = 0;
304
305 if (mctrl & TIOCM_RTS)
306 mcr |= UART_MCR_RTS;
307 if (mctrl & TIOCM_DTR)
308 mcr |= UART_MCR_DTR;
309 if (mctrl & TIOCM_OUT1)
310 mcr |= UART_MCR_OUT1;
311 if (mctrl & TIOCM_OUT2)
312 mcr |= UART_MCR_OUT2;
313 if (mctrl & TIOCM_LOOP)
314 mcr |= UART_MCR_LOOP;
315
316 mcr |= up->mcr;
317
318 serial_out(up, UART_MCR, mcr);
319 }
320
321 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
322 {
323 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
324 unsigned long flags;
325
326 spin_lock_irqsave(&up->port.lock, flags);
327 if (break_state == -1)
328 up->lcr |= UART_LCR_SBC;
329 else
330 up->lcr &= ~UART_LCR_SBC;
331 serial_out(up, UART_LCR, up->lcr);
332 spin_unlock_irqrestore(&up->port.lock, flags);
333 }
334
335 #if 0
336 static void serial_pxa_dma_init(struct pxa_uart *up)
337 {
338 up->rxdma =
339 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
340 if (up->rxdma < 0)
341 goto out;
342 up->txdma =
343 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
344 if (up->txdma < 0)
345 goto err_txdma;
346 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
347 if (!up->dmadesc)
348 goto err_alloc;
349
350 /* ... */
351 err_alloc:
352 pxa_free_dma(up->txdma);
353 err_rxdma:
354 pxa_free_dma(up->rxdma);
355 out:
356 return;
357 }
358 #endif
359
360 static int serial_pxa_startup(struct uart_port *port)
361 {
362 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
363 unsigned long flags;
364 int retval;
365
366 if (port->line == 3) /* HWUART */
367 up->mcr |= UART_MCR_AFE;
368 else
369 up->mcr = 0;
370
371 up->port.uartclk = clk_get_rate(up->clk);
372
373 /*
374 * Allocate the IRQ
375 */
376 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
377 if (retval)
378 return retval;
379
380 /*
381 * Clear the FIFO buffers and disable them.
382 * (they will be reenabled in set_termios())
383 */
384 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
385 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
386 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
387 serial_out(up, UART_FCR, 0);
388
389 /*
390 * Clear the interrupt registers.
391 */
392 (void) serial_in(up, UART_LSR);
393 (void) serial_in(up, UART_RX);
394 (void) serial_in(up, UART_IIR);
395 (void) serial_in(up, UART_MSR);
396
397 /*
398 * Now, initialize the UART
399 */
400 serial_out(up, UART_LCR, UART_LCR_WLEN8);
401
402 spin_lock_irqsave(&up->port.lock, flags);
403 up->port.mctrl |= TIOCM_OUT2;
404 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
405 spin_unlock_irqrestore(&up->port.lock, flags);
406
407 /*
408 * Finally, enable interrupts. Note: Modem status interrupts
409 * are set via set_termios(), which will be occurring imminently
410 * anyway, so we don't enable them here.
411 */
412 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
413 serial_out(up, UART_IER, up->ier);
414
415 /*
416 * And clear the interrupt registers again for luck.
417 */
418 (void) serial_in(up, UART_LSR);
419 (void) serial_in(up, UART_RX);
420 (void) serial_in(up, UART_IIR);
421 (void) serial_in(up, UART_MSR);
422
423 return 0;
424 }
425
426 static void serial_pxa_shutdown(struct uart_port *port)
427 {
428 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
429 unsigned long flags;
430
431 free_irq(up->port.irq, up);
432
433 /*
434 * Disable interrupts from this port
435 */
436 up->ier = 0;
437 serial_out(up, UART_IER, 0);
438
439 spin_lock_irqsave(&up->port.lock, flags);
440 up->port.mctrl &= ~TIOCM_OUT2;
441 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
442 spin_unlock_irqrestore(&up->port.lock, flags);
443
444 /*
445 * Disable break condition and FIFOs
446 */
447 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
448 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
449 UART_FCR_CLEAR_RCVR |
450 UART_FCR_CLEAR_XMIT);
451 serial_out(up, UART_FCR, 0);
452 }
453
454 static void
455 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
456 struct ktermios *old)
457 {
458 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
459 unsigned char cval, fcr = 0;
460 unsigned long flags;
461 unsigned int baud, quot;
462 unsigned int dll;
463
464 switch (termios->c_cflag & CSIZE) {
465 case CS5:
466 cval = UART_LCR_WLEN5;
467 break;
468 case CS6:
469 cval = UART_LCR_WLEN6;
470 break;
471 case CS7:
472 cval = UART_LCR_WLEN7;
473 break;
474 default:
475 case CS8:
476 cval = UART_LCR_WLEN8;
477 break;
478 }
479
480 if (termios->c_cflag & CSTOPB)
481 cval |= UART_LCR_STOP;
482 if (termios->c_cflag & PARENB)
483 cval |= UART_LCR_PARITY;
484 if (!(termios->c_cflag & PARODD))
485 cval |= UART_LCR_EPAR;
486
487 /*
488 * Ask the core to calculate the divisor for us.
489 */
490 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
491 quot = uart_get_divisor(port, baud);
492
493 if ((up->port.uartclk / quot) < (2400 * 16))
494 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
495 else if ((up->port.uartclk / quot) < (230400 * 16))
496 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
497 else
498 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
499
500 /*
501 * Ok, we're now changing the port state. Do it with
502 * interrupts disabled.
503 */
504 spin_lock_irqsave(&up->port.lock, flags);
505
506 /*
507 * Ensure the port will be enabled.
508 * This is required especially for serial console.
509 */
510 up->ier |= UART_IER_UUE;
511
512 /*
513 * Update the per-port timeout.
514 */
515 uart_update_timeout(port, termios->c_cflag, baud);
516
517 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
518 if (termios->c_iflag & INPCK)
519 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
520 if (termios->c_iflag & (BRKINT | PARMRK))
521 up->port.read_status_mask |= UART_LSR_BI;
522
523 /*
524 * Characters to ignore
525 */
526 up->port.ignore_status_mask = 0;
527 if (termios->c_iflag & IGNPAR)
528 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
529 if (termios->c_iflag & IGNBRK) {
530 up->port.ignore_status_mask |= UART_LSR_BI;
531 /*
532 * If we're ignoring parity and break indicators,
533 * ignore overruns too (for real raw support).
534 */
535 if (termios->c_iflag & IGNPAR)
536 up->port.ignore_status_mask |= UART_LSR_OE;
537 }
538
539 /*
540 * ignore all characters if CREAD is not set
541 */
542 if ((termios->c_cflag & CREAD) == 0)
543 up->port.ignore_status_mask |= UART_LSR_DR;
544
545 /*
546 * CTS flow control flag and modem status interrupts
547 */
548 up->ier &= ~UART_IER_MSI;
549 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
550 up->ier |= UART_IER_MSI;
551
552 serial_out(up, UART_IER, up->ier);
553
554 if (termios->c_cflag & CRTSCTS)
555 up->mcr |= UART_MCR_AFE;
556 else
557 up->mcr &= ~UART_MCR_AFE;
558
559 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
560 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
561
562 /*
563 * work around Errata #75 according to Intel(R) PXA27x Processor Family
564 * Specification Update (Nov 2005)
565 */
566 dll = serial_in(up, UART_DLL);
567 WARN_ON(dll != (quot & 0xff));
568
569 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
570 serial_out(up, UART_LCR, cval); /* reset DLAB */
571 up->lcr = cval; /* Save LCR */
572 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
573 serial_out(up, UART_FCR, fcr);
574 spin_unlock_irqrestore(&up->port.lock, flags);
575 }
576
577 static void
578 serial_pxa_pm(struct uart_port *port, unsigned int state,
579 unsigned int oldstate)
580 {
581 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
582
583 if (!state)
584 clk_prepare_enable(up->clk);
585 else
586 clk_disable_unprepare(up->clk);
587 }
588
589 static void serial_pxa_release_port(struct uart_port *port)
590 {
591 }
592
593 static int serial_pxa_request_port(struct uart_port *port)
594 {
595 return 0;
596 }
597
598 static void serial_pxa_config_port(struct uart_port *port, int flags)
599 {
600 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
601 up->port.type = PORT_PXA;
602 }
603
604 static int
605 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
606 {
607 /* we don't want the core code to modify any port params */
608 return -EINVAL;
609 }
610
611 static const char *
612 serial_pxa_type(struct uart_port *port)
613 {
614 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
615 return up->name;
616 }
617
618 static struct uart_pxa_port *serial_pxa_ports[4];
619 static struct uart_driver serial_pxa_reg;
620
621 #ifdef CONFIG_SERIAL_PXA_CONSOLE
622
623 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
624
625 /*
626 * Wait for transmitter & holding register to empty
627 */
628 static inline void wait_for_xmitr(struct uart_pxa_port *up)
629 {
630 unsigned int status, tmout = 10000;
631
632 /* Wait up to 10ms for the character(s) to be sent. */
633 do {
634 status = serial_in(up, UART_LSR);
635
636 if (status & UART_LSR_BI)
637 up->lsr_break_flag = UART_LSR_BI;
638
639 if (--tmout == 0)
640 break;
641 udelay(1);
642 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
643
644 /* Wait up to 1s for flow control if necessary */
645 if (up->port.flags & UPF_CONS_FLOW) {
646 tmout = 1000000;
647 while (--tmout &&
648 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
649 udelay(1);
650 }
651 }
652
653 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
654 {
655 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
656
657 wait_for_xmitr(up);
658 serial_out(up, UART_TX, ch);
659 }
660
661 /*
662 * Print a string to the serial port trying not to disturb
663 * any possible real use of the port...
664 *
665 * The console_lock must be held when we get here.
666 */
667 static void
668 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
669 {
670 struct uart_pxa_port *up = serial_pxa_ports[co->index];
671 unsigned int ier;
672 unsigned long flags;
673 int locked = 1;
674
675 clk_enable(up->clk);
676 local_irq_save(flags);
677 if (up->port.sysrq)
678 locked = 0;
679 else if (oops_in_progress)
680 locked = spin_trylock(&up->port.lock);
681 else
682 spin_lock(&up->port.lock);
683
684 /*
685 * First save the IER then disable the interrupts
686 */
687 ier = serial_in(up, UART_IER);
688 serial_out(up, UART_IER, UART_IER_UUE);
689
690 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
691
692 /*
693 * Finally, wait for transmitter to become empty
694 * and restore the IER
695 */
696 wait_for_xmitr(up);
697 serial_out(up, UART_IER, ier);
698
699 if (locked)
700 spin_unlock(&up->port.lock);
701 local_irq_restore(flags);
702 clk_disable(up->clk);
703
704 }
705
706 #ifdef CONFIG_CONSOLE_POLL
707 /*
708 * Console polling routines for writing and reading from the uart while
709 * in an interrupt or debug context.
710 */
711
712 static int serial_pxa_get_poll_char(struct uart_port *port)
713 {
714 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
715 unsigned char lsr = serial_in(up, UART_LSR);
716
717 while (!(lsr & UART_LSR_DR))
718 lsr = serial_in(up, UART_LSR);
719
720 return serial_in(up, UART_RX);
721 }
722
723
724 static void serial_pxa_put_poll_char(struct uart_port *port,
725 unsigned char c)
726 {
727 unsigned int ier;
728 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
729
730 /*
731 * First save the IER then disable the interrupts
732 */
733 ier = serial_in(up, UART_IER);
734 serial_out(up, UART_IER, UART_IER_UUE);
735
736 wait_for_xmitr(up);
737 /*
738 * Send the character out.
739 * If a LF, also do CR...
740 */
741 serial_out(up, UART_TX, c);
742 if (c == 10) {
743 wait_for_xmitr(up);
744 serial_out(up, UART_TX, 13);
745 }
746
747 /*
748 * Finally, wait for transmitter to become empty
749 * and restore the IER
750 */
751 wait_for_xmitr(up);
752 serial_out(up, UART_IER, ier);
753 }
754
755 #endif /* CONFIG_CONSOLE_POLL */
756
757 static int __init
758 serial_pxa_console_setup(struct console *co, char *options)
759 {
760 struct uart_pxa_port *up;
761 int baud = 9600;
762 int bits = 8;
763 int parity = 'n';
764 int flow = 'n';
765
766 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
767 co->index = 0;
768 up = serial_pxa_ports[co->index];
769 if (!up)
770 return -ENODEV;
771
772 if (options)
773 uart_parse_options(options, &baud, &parity, &bits, &flow);
774
775 return uart_set_options(&up->port, co, baud, parity, bits, flow);
776 }
777
778 static struct console serial_pxa_console = {
779 .name = "ttyS",
780 .write = serial_pxa_console_write,
781 .device = uart_console_device,
782 .setup = serial_pxa_console_setup,
783 .flags = CON_PRINTBUFFER,
784 .index = -1,
785 .data = &serial_pxa_reg,
786 };
787
788 #define PXA_CONSOLE &serial_pxa_console
789 #else
790 #define PXA_CONSOLE NULL
791 #endif
792
793 struct uart_ops serial_pxa_pops = {
794 .tx_empty = serial_pxa_tx_empty,
795 .set_mctrl = serial_pxa_set_mctrl,
796 .get_mctrl = serial_pxa_get_mctrl,
797 .stop_tx = serial_pxa_stop_tx,
798 .start_tx = serial_pxa_start_tx,
799 .stop_rx = serial_pxa_stop_rx,
800 .enable_ms = serial_pxa_enable_ms,
801 .break_ctl = serial_pxa_break_ctl,
802 .startup = serial_pxa_startup,
803 .shutdown = serial_pxa_shutdown,
804 .set_termios = serial_pxa_set_termios,
805 .pm = serial_pxa_pm,
806 .type = serial_pxa_type,
807 .release_port = serial_pxa_release_port,
808 .request_port = serial_pxa_request_port,
809 .config_port = serial_pxa_config_port,
810 .verify_port = serial_pxa_verify_port,
811 #ifdef CONFIG_CONSOLE_POLL
812 .poll_get_char = serial_pxa_get_poll_char,
813 .poll_put_char = serial_pxa_put_poll_char,
814 #endif
815 };
816
817 static struct uart_driver serial_pxa_reg = {
818 .owner = THIS_MODULE,
819 .driver_name = "PXA serial",
820 .dev_name = "ttyS",
821 .major = TTY_MAJOR,
822 .minor = 64,
823 .nr = 4,
824 .cons = PXA_CONSOLE,
825 };
826
827 #ifdef CONFIG_PM
828 static int serial_pxa_suspend(struct device *dev)
829 {
830 struct uart_pxa_port *sport = dev_get_drvdata(dev);
831
832 if (sport)
833 uart_suspend_port(&serial_pxa_reg, &sport->port);
834
835 return 0;
836 }
837
838 static int serial_pxa_resume(struct device *dev)
839 {
840 struct uart_pxa_port *sport = dev_get_drvdata(dev);
841
842 if (sport)
843 uart_resume_port(&serial_pxa_reg, &sport->port);
844
845 return 0;
846 }
847
848 static const struct dev_pm_ops serial_pxa_pm_ops = {
849 .suspend = serial_pxa_suspend,
850 .resume = serial_pxa_resume,
851 };
852 #endif
853
854 static struct of_device_id serial_pxa_dt_ids[] = {
855 { .compatible = "mrvl,pxa-uart", },
856 { .compatible = "mrvl,mmp-uart", },
857 {}
858 };
859 MODULE_DEVICE_TABLE(of, serial_pxa_dt_ids);
860
861 static int serial_pxa_probe_dt(struct platform_device *pdev,
862 struct uart_pxa_port *sport)
863 {
864 struct device_node *np = pdev->dev.of_node;
865 int ret;
866
867 if (!np)
868 return 1;
869
870 ret = of_alias_get_id(np, "serial");
871 if (ret < 0) {
872 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
873 return ret;
874 }
875 sport->port.line = ret;
876 return 0;
877 }
878
879 static int serial_pxa_probe(struct platform_device *dev)
880 {
881 struct uart_pxa_port *sport;
882 struct resource *mmres, *irqres;
883 int ret;
884
885 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
886 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
887 if (!mmres || !irqres)
888 return -ENODEV;
889
890 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
891 if (!sport)
892 return -ENOMEM;
893
894 sport->clk = clk_get(&dev->dev, NULL);
895 if (IS_ERR(sport->clk)) {
896 ret = PTR_ERR(sport->clk);
897 goto err_free;
898 }
899
900 ret = clk_prepare(sport->clk);
901 if (ret) {
902 clk_put(sport->clk);
903 goto err_free;
904 }
905
906 sport->port.type = PORT_PXA;
907 sport->port.iotype = UPIO_MEM;
908 sport->port.mapbase = mmres->start;
909 sport->port.irq = irqres->start;
910 sport->port.fifosize = 64;
911 sport->port.ops = &serial_pxa_pops;
912 sport->port.dev = &dev->dev;
913 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
914 sport->port.uartclk = clk_get_rate(sport->clk);
915
916 ret = serial_pxa_probe_dt(dev, sport);
917 if (ret > 0)
918 sport->port.line = dev->id;
919 else if (ret < 0)
920 goto err_clk;
921 snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
922
923 sport->port.membase = ioremap(mmres->start, resource_size(mmres));
924 if (!sport->port.membase) {
925 ret = -ENOMEM;
926 goto err_clk;
927 }
928
929 serial_pxa_ports[sport->port.line] = sport;
930
931 uart_add_one_port(&serial_pxa_reg, &sport->port);
932 platform_set_drvdata(dev, sport);
933
934 return 0;
935
936 err_clk:
937 clk_unprepare(sport->clk);
938 clk_put(sport->clk);
939 err_free:
940 kfree(sport);
941 return ret;
942 }
943
944 static int serial_pxa_remove(struct platform_device *dev)
945 {
946 struct uart_pxa_port *sport = platform_get_drvdata(dev);
947
948 platform_set_drvdata(dev, NULL);
949
950 uart_remove_one_port(&serial_pxa_reg, &sport->port);
951
952 clk_unprepare(sport->clk);
953 clk_put(sport->clk);
954 kfree(sport);
955
956 return 0;
957 }
958
959 static struct platform_driver serial_pxa_driver = {
960 .probe = serial_pxa_probe,
961 .remove = serial_pxa_remove,
962
963 .driver = {
964 .name = "pxa2xx-uart",
965 .owner = THIS_MODULE,
966 #ifdef CONFIG_PM
967 .pm = &serial_pxa_pm_ops,
968 #endif
969 .of_match_table = serial_pxa_dt_ids,
970 },
971 };
972
973 int __init serial_pxa_init(void)
974 {
975 int ret;
976
977 ret = uart_register_driver(&serial_pxa_reg);
978 if (ret != 0)
979 return ret;
980
981 ret = platform_driver_register(&serial_pxa_driver);
982 if (ret != 0)
983 uart_unregister_driver(&serial_pxa_reg);
984
985 return ret;
986 }
987
988 void __exit serial_pxa_exit(void)
989 {
990 platform_driver_unregister(&serial_pxa_driver);
991 uart_unregister_driver(&serial_pxa_reg);
992 }
993
994 module_init(serial_pxa_init);
995 module_exit(serial_pxa_exit);
996
997 MODULE_LICENSE("GPL");
998 MODULE_ALIAS("platform:pxa2xx-uart");
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