Linux 3.11-rc3
[cris-mirror.git] / drivers / tty / serial / vt8500_serial.c
blob48af43de34677d17343cc7e95b99f54cb5d821a9
1 /*
2 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
4 * Based on msm_serial.c, which is:
5 * Copyright (C) 2007 Google, Inc.
6 * Author: Robert Love <rlove@google.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
19 # define SUPPORT_SYSRQ
20 #endif
22 #include <linux/hrtimer.h>
23 #include <linux/delay.h>
24 #include <linux/module.h>
25 #include <linux/io.h>
26 #include <linux/ioport.h>
27 #include <linux/irq.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial_core.h>
33 #include <linux/serial.h>
34 #include <linux/slab.h>
35 #include <linux/clk.h>
36 #include <linux/platform_device.h>
37 #include <linux/of.h>
38 #include <linux/err.h>
41 * UART Register offsets
44 #define VT8500_URTDR 0x0000 /* Transmit data */
45 #define VT8500_URRDR 0x0004 /* Receive data */
46 #define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */
47 #define VT8500_URLCR 0x000C /* Line control */
48 #define VT8500_URICR 0x0010 /* IrDA control */
49 #define VT8500_URIER 0x0014 /* Interrupt enable */
50 #define VT8500_URISR 0x0018 /* Interrupt status */
51 #define VT8500_URUSR 0x001c /* UART status */
52 #define VT8500_URFCR 0x0020 /* FIFO control */
53 #define VT8500_URFIDX 0x0024 /* FIFO index */
54 #define VT8500_URBKR 0x0028 /* Break signal count */
55 #define VT8500_URTOD 0x002c /* Time out divisor */
56 #define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */
57 #define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */
60 * Interrupt enable and status bits
63 #define TXDE (1 << 0) /* Tx Data empty */
64 #define RXDF (1 << 1) /* Rx Data full */
65 #define TXFAE (1 << 2) /* Tx FIFO almost empty */
66 #define TXFE (1 << 3) /* Tx FIFO empty */
67 #define RXFAF (1 << 4) /* Rx FIFO almost full */
68 #define RXFF (1 << 5) /* Rx FIFO full */
69 #define TXUDR (1 << 6) /* Tx underrun */
70 #define RXOVER (1 << 7) /* Rx overrun */
71 #define PER (1 << 8) /* Parity error */
72 #define FER (1 << 9) /* Frame error */
73 #define TCTS (1 << 10) /* Toggle of CTS */
74 #define RXTOUT (1 << 11) /* Rx timeout */
75 #define BKDONE (1 << 12) /* Break signal done */
76 #define ERR (1 << 13) /* AHB error response */
78 #define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
79 #define TX_FIFO_INTS (TXFAE | TXFE | TXUDR)
81 #define VT8500_MAX_PORTS 6
83 struct vt8500_port {
84 struct uart_port uart;
85 char name[16];
86 struct clk *clk;
87 unsigned int ier;
91 * we use this variable to keep track of which ports
92 * have been allocated as we can't use pdev->id in
93 * devicetree
95 static unsigned long vt8500_ports_in_use;
97 static inline void vt8500_write(struct uart_port *port, unsigned int val,
98 unsigned int off)
100 writel(val, port->membase + off);
103 static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off)
105 return readl(port->membase + off);
108 static void vt8500_stop_tx(struct uart_port *port)
110 struct vt8500_port *vt8500_port = container_of(port,
111 struct vt8500_port,
112 uart);
114 vt8500_port->ier &= ~TX_FIFO_INTS;
115 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
118 static void vt8500_stop_rx(struct uart_port *port)
120 struct vt8500_port *vt8500_port = container_of(port,
121 struct vt8500_port,
122 uart);
124 vt8500_port->ier &= ~RX_FIFO_INTS;
125 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
128 static void vt8500_enable_ms(struct uart_port *port)
130 struct vt8500_port *vt8500_port = container_of(port,
131 struct vt8500_port,
132 uart);
134 vt8500_port->ier |= TCTS;
135 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
138 static void handle_rx(struct uart_port *port)
140 struct tty_port *tport = &port->state->port;
143 * Handle overrun
145 if ((vt8500_read(port, VT8500_URISR) & RXOVER)) {
146 port->icount.overrun++;
147 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
150 /* and now the main RX loop */
151 while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) {
152 unsigned int c;
153 char flag = TTY_NORMAL;
155 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;
157 /* Mask conditions we're ignorning. */
158 c &= ~port->read_status_mask;
160 if (c & FER) {
161 port->icount.frame++;
162 flag = TTY_FRAME;
163 } else if (c & PER) {
164 port->icount.parity++;
165 flag = TTY_PARITY;
167 port->icount.rx++;
169 if (!uart_handle_sysrq_char(port, c))
170 tty_insert_flip_char(tport, c, flag);
173 tty_flip_buffer_push(tport);
176 static void handle_tx(struct uart_port *port)
178 struct circ_buf *xmit = &port->state->xmit;
180 if (port->x_char) {
181 writeb(port->x_char, port->membase + VT8500_TXFIFO);
182 port->icount.tx++;
183 port->x_char = 0;
185 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
186 vt8500_stop_tx(port);
187 return;
190 while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) {
191 if (uart_circ_empty(xmit))
192 break;
194 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
196 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
197 port->icount.tx++;
200 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
201 uart_write_wakeup(port);
203 if (uart_circ_empty(xmit))
204 vt8500_stop_tx(port);
207 static void vt8500_start_tx(struct uart_port *port)
209 struct vt8500_port *vt8500_port = container_of(port,
210 struct vt8500_port,
211 uart);
213 vt8500_port->ier &= ~TX_FIFO_INTS;
214 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
215 handle_tx(port);
216 vt8500_port->ier |= TX_FIFO_INTS;
217 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
220 static void handle_delta_cts(struct uart_port *port)
222 port->icount.cts++;
223 wake_up_interruptible(&port->state->port.delta_msr_wait);
226 static irqreturn_t vt8500_irq(int irq, void *dev_id)
228 struct uart_port *port = dev_id;
229 unsigned long isr;
231 spin_lock(&port->lock);
232 isr = vt8500_read(port, VT8500_URISR);
234 /* Acknowledge active status bits */
235 vt8500_write(port, isr, VT8500_URISR);
237 if (isr & RX_FIFO_INTS)
238 handle_rx(port);
239 if (isr & TX_FIFO_INTS)
240 handle_tx(port);
241 if (isr & TCTS)
242 handle_delta_cts(port);
244 spin_unlock(&port->lock);
246 return IRQ_HANDLED;
249 static unsigned int vt8500_tx_empty(struct uart_port *port)
251 return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ?
252 TIOCSER_TEMT : 0;
255 static unsigned int vt8500_get_mctrl(struct uart_port *port)
257 unsigned int usr;
259 usr = vt8500_read(port, VT8500_URUSR);
260 if (usr & (1 << 4))
261 return TIOCM_CTS;
262 else
263 return 0;
266 static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl)
270 static void vt8500_break_ctl(struct uart_port *port, int break_ctl)
272 if (break_ctl)
273 vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9),
274 VT8500_URLCR);
277 static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud)
279 unsigned long div;
280 unsigned int loops = 1000;
282 div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff);
284 if (unlikely((baud < 900) || (baud > 921600)))
285 div |= 7;
286 else
287 div |= (921600 / baud) - 1;
289 while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops)
290 cpu_relax();
291 vt8500_write(port, div, VT8500_URDIV);
293 return baud;
296 static int vt8500_startup(struct uart_port *port)
298 struct vt8500_port *vt8500_port =
299 container_of(port, struct vt8500_port, uart);
300 int ret;
302 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
303 "vt8500_serial%d", port->line);
305 ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH,
306 vt8500_port->name, port);
307 if (unlikely(ret))
308 return ret;
310 vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */
312 return 0;
315 static void vt8500_shutdown(struct uart_port *port)
317 struct vt8500_port *vt8500_port =
318 container_of(port, struct vt8500_port, uart);
320 vt8500_port->ier = 0;
322 /* disable interrupts and FIFOs */
323 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
324 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
325 free_irq(port->irq, port);
328 static void vt8500_set_termios(struct uart_port *port,
329 struct ktermios *termios,
330 struct ktermios *old)
332 struct vt8500_port *vt8500_port =
333 container_of(port, struct vt8500_port, uart);
334 unsigned long flags;
335 unsigned int baud, lcr;
336 unsigned int loops = 1000;
338 spin_lock_irqsave(&port->lock, flags);
340 /* calculate and set baud rate */
341 baud = uart_get_baud_rate(port, termios, old, 900, 921600);
342 baud = vt8500_set_baud_rate(port, baud);
343 if (tty_termios_baud_rate(termios))
344 tty_termios_encode_baud_rate(termios, baud, baud);
346 /* calculate parity */
347 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
348 lcr &= ~((1 << 5) | (1 << 4));
349 if (termios->c_cflag & PARENB) {
350 lcr |= (1 << 4);
351 termios->c_cflag &= ~CMSPAR;
352 if (termios->c_cflag & PARODD)
353 lcr |= (1 << 5);
356 /* calculate bits per char */
357 lcr &= ~(1 << 2);
358 switch (termios->c_cflag & CSIZE) {
359 case CS7:
360 break;
361 case CS8:
362 default:
363 lcr |= (1 << 2);
364 termios->c_cflag &= ~CSIZE;
365 termios->c_cflag |= CS8;
366 break;
369 /* calculate stop bits */
370 lcr &= ~(1 << 3);
371 if (termios->c_cflag & CSTOPB)
372 lcr |= (1 << 3);
374 /* set parity, bits per char, and stop bit */
375 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
377 /* Configure status bits to ignore based on termio flags. */
378 port->read_status_mask = 0;
379 if (termios->c_iflag & IGNPAR)
380 port->read_status_mask = FER | PER;
382 uart_update_timeout(port, termios->c_cflag, baud);
384 /* Reset FIFOs */
385 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
386 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
387 && --loops)
388 cpu_relax();
390 /* Every possible FIFO-related interrupt */
391 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
394 * CTS flow control
396 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
397 vt8500_port->ier |= TCTS;
399 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
400 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
402 spin_unlock_irqrestore(&port->lock, flags);
405 static const char *vt8500_type(struct uart_port *port)
407 struct vt8500_port *vt8500_port =
408 container_of(port, struct vt8500_port, uart);
409 return vt8500_port->name;
412 static void vt8500_release_port(struct uart_port *port)
416 static int vt8500_request_port(struct uart_port *port)
418 return 0;
421 static void vt8500_config_port(struct uart_port *port, int flags)
423 port->type = PORT_VT8500;
426 static int vt8500_verify_port(struct uart_port *port,
427 struct serial_struct *ser)
429 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500))
430 return -EINVAL;
431 if (unlikely(port->irq != ser->irq))
432 return -EINVAL;
433 return 0;
436 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
437 static struct uart_driver vt8500_uart_driver;
439 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
441 static inline void wait_for_xmitr(struct uart_port *port)
443 unsigned int status, tmout = 10000;
445 /* Wait up to 10ms for the character(s) to be sent. */
446 do {
447 status = vt8500_read(port, VT8500_URFIDX);
449 if (--tmout == 0)
450 break;
451 udelay(1);
452 } while (status & 0x10);
455 static void vt8500_console_putchar(struct uart_port *port, int c)
457 wait_for_xmitr(port);
458 writeb(c, port->membase + VT8500_TXFIFO);
461 static void vt8500_console_write(struct console *co, const char *s,
462 unsigned int count)
464 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
465 unsigned long ier;
467 BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr);
469 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
470 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
472 uart_console_write(&vt8500_port->uart, s, count,
473 vt8500_console_putchar);
476 * Finally, wait for transmitter to become empty
477 * and switch back to FIFO
479 wait_for_xmitr(&vt8500_port->uart);
480 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
483 static int __init vt8500_console_setup(struct console *co, char *options)
485 struct vt8500_port *vt8500_port;
486 int baud = 9600;
487 int bits = 8;
488 int parity = 'n';
489 int flow = 'n';
491 if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0))
492 return -ENXIO;
494 vt8500_port = vt8500_uart_ports[co->index];
496 if (!vt8500_port)
497 return -ENODEV;
499 if (options)
500 uart_parse_options(options, &baud, &parity, &bits, &flow);
502 return uart_set_options(&vt8500_port->uart,
503 co, baud, parity, bits, flow);
506 static struct console vt8500_console = {
507 .name = "ttyWMT",
508 .write = vt8500_console_write,
509 .device = uart_console_device,
510 .setup = vt8500_console_setup,
511 .flags = CON_PRINTBUFFER,
512 .index = -1,
513 .data = &vt8500_uart_driver,
516 #define VT8500_CONSOLE (&vt8500_console)
518 #else
519 #define VT8500_CONSOLE NULL
520 #endif
522 static struct uart_ops vt8500_uart_pops = {
523 .tx_empty = vt8500_tx_empty,
524 .set_mctrl = vt8500_set_mctrl,
525 .get_mctrl = vt8500_get_mctrl,
526 .stop_tx = vt8500_stop_tx,
527 .start_tx = vt8500_start_tx,
528 .stop_rx = vt8500_stop_rx,
529 .enable_ms = vt8500_enable_ms,
530 .break_ctl = vt8500_break_ctl,
531 .startup = vt8500_startup,
532 .shutdown = vt8500_shutdown,
533 .set_termios = vt8500_set_termios,
534 .type = vt8500_type,
535 .release_port = vt8500_release_port,
536 .request_port = vt8500_request_port,
537 .config_port = vt8500_config_port,
538 .verify_port = vt8500_verify_port,
541 static struct uart_driver vt8500_uart_driver = {
542 .owner = THIS_MODULE,
543 .driver_name = "vt8500_serial",
544 .dev_name = "ttyWMT",
545 .nr = 6,
546 .cons = VT8500_CONSOLE,
549 static int vt8500_serial_probe(struct platform_device *pdev)
551 struct vt8500_port *vt8500_port;
552 struct resource *mmres, *irqres;
553 struct device_node *np = pdev->dev.of_node;
554 int ret;
555 int port;
557 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
558 irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
559 if (!mmres || !irqres)
560 return -ENODEV;
562 if (np)
563 port = of_alias_get_id(np, "serial");
564 if (port >= VT8500_MAX_PORTS)
565 port = -1;
566 else
567 port = -1;
569 if (port < 0) {
570 /* calculate the port id */
571 port = find_first_zero_bit(&vt8500_ports_in_use,
572 sizeof(vt8500_ports_in_use));
575 if (port >= VT8500_MAX_PORTS)
576 return -ENODEV;
578 /* reserve the port id */
579 if (test_and_set_bit(port, &vt8500_ports_in_use)) {
580 /* port already in use - shouldn't really happen */
581 return -EBUSY;
584 vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
585 GFP_KERNEL);
586 if (!vt8500_port)
587 return -ENOMEM;
589 vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres);
590 if (IS_ERR(vt8500_port->uart.membase))
591 return PTR_ERR(vt8500_port->uart.membase);
593 vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
594 if (IS_ERR(vt8500_port->clk)) {
595 dev_err(&pdev->dev, "failed to get clock\n");
596 return -EINVAL;
599 ret = clk_prepare_enable(vt8500_port->clk);
600 if (ret) {
601 dev_err(&pdev->dev, "failed to enable clock\n");
602 return ret;
605 vt8500_port->uart.type = PORT_VT8500;
606 vt8500_port->uart.iotype = UPIO_MEM;
607 vt8500_port->uart.mapbase = mmres->start;
608 vt8500_port->uart.irq = irqres->start;
609 vt8500_port->uart.fifosize = 16;
610 vt8500_port->uart.ops = &vt8500_uart_pops;
611 vt8500_port->uart.line = port;
612 vt8500_port->uart.dev = &pdev->dev;
613 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
615 vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk);
617 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
618 "VT8500 UART%d", pdev->id);
620 vt8500_uart_ports[port] = vt8500_port;
622 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
624 platform_set_drvdata(pdev, vt8500_port);
626 return 0;
629 static int vt8500_serial_remove(struct platform_device *pdev)
631 struct vt8500_port *vt8500_port = platform_get_drvdata(pdev);
633 platform_set_drvdata(pdev, NULL);
634 clk_disable_unprepare(vt8500_port->clk);
635 uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart);
637 return 0;
640 static const struct of_device_id wmt_dt_ids[] = {
641 { .compatible = "via,vt8500-uart", },
645 static struct platform_driver vt8500_platform_driver = {
646 .probe = vt8500_serial_probe,
647 .remove = vt8500_serial_remove,
648 .driver = {
649 .name = "vt8500_serial",
650 .owner = THIS_MODULE,
651 .of_match_table = wmt_dt_ids,
655 static int __init vt8500_serial_init(void)
657 int ret;
659 ret = uart_register_driver(&vt8500_uart_driver);
660 if (unlikely(ret))
661 return ret;
663 ret = platform_driver_register(&vt8500_platform_driver);
665 if (unlikely(ret))
666 uart_unregister_driver(&vt8500_uart_driver);
668 return ret;
671 static void __exit vt8500_serial_exit(void)
673 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
674 unregister_console(&vt8500_console);
675 #endif
676 platform_driver_unregister(&vt8500_platform_driver);
677 uart_unregister_driver(&vt8500_uart_driver);
680 module_init(vt8500_serial_init);
681 module_exit(vt8500_serial_exit);
683 MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
684 MODULE_DESCRIPTION("Driver for vt8500 serial device");
685 MODULE_LICENSE("GPL v2");