2 * Low-Level PCI Support for PC
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/sched.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12 #include <linux/slab.h>
14 #include <asm-generic/pci-bridge.h>
16 #include <asm/segment.h>
19 #include <asm/pci_x86.h>
20 #include <asm/setup.h>
22 unsigned int pci_probe
= PCI_PROBE_BIOS
| PCI_PROBE_CONF1
| PCI_PROBE_CONF2
|
25 unsigned int pci_early_dump_regs
;
26 static int pci_bf_sort
;
27 static int smbios_type_b1_flag
;
30 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
31 int noioapicreroute
= 0;
33 int noioapicreroute
= 1;
35 int pcibios_last_bus
= -1;
36 unsigned long pirq_table_addr
;
37 struct pci_bus
*pci_root_bus
;
38 const struct pci_raw_ops
*__read_mostly raw_pci_ops
;
39 const struct pci_raw_ops
*__read_mostly raw_pci_ext_ops
;
41 int raw_pci_read(unsigned int domain
, unsigned int bus
, unsigned int devfn
,
42 int reg
, int len
, u32
*val
)
44 if (domain
== 0 && reg
< 256 && raw_pci_ops
)
45 return raw_pci_ops
->read(domain
, bus
, devfn
, reg
, len
, val
);
47 return raw_pci_ext_ops
->read(domain
, bus
, devfn
, reg
, len
, val
);
51 int raw_pci_write(unsigned int domain
, unsigned int bus
, unsigned int devfn
,
52 int reg
, int len
, u32 val
)
54 if (domain
== 0 && reg
< 256 && raw_pci_ops
)
55 return raw_pci_ops
->write(domain
, bus
, devfn
, reg
, len
, val
);
57 return raw_pci_ext_ops
->write(domain
, bus
, devfn
, reg
, len
, val
);
61 static int pci_read(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32
*value
)
63 return raw_pci_read(pci_domain_nr(bus
), bus
->number
,
64 devfn
, where
, size
, value
);
67 static int pci_write(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32 value
)
69 return raw_pci_write(pci_domain_nr(bus
), bus
->number
,
70 devfn
, where
, size
, value
);
73 struct pci_ops pci_root_ops
= {
79 * This interrupt-safe spinlock protects all accesses to PCI
80 * configuration space.
82 DEFINE_RAW_SPINLOCK(pci_config_lock
);
84 static int can_skip_ioresource_align(const struct dmi_system_id
*d
)
86 pci_probe
|= PCI_CAN_SKIP_ISA_ALIGN
;
87 printk(KERN_INFO
"PCI: %s detected, can skip ISA alignment\n", d
->ident
);
91 static const struct dmi_system_id can_skip_pciprobe_dmi_table
[] = {
93 * Systems where PCI IO resource ISA alignment can be skipped
94 * when the ISA enable bit in the bridge control is not set
97 .callback
= can_skip_ioresource_align
,
98 .ident
= "IBM System x3800",
100 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
101 DMI_MATCH(DMI_PRODUCT_NAME
, "x3800"),
105 .callback
= can_skip_ioresource_align
,
106 .ident
= "IBM System x3850",
108 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
109 DMI_MATCH(DMI_PRODUCT_NAME
, "x3850"),
113 .callback
= can_skip_ioresource_align
,
114 .ident
= "IBM System x3950",
116 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
117 DMI_MATCH(DMI_PRODUCT_NAME
, "x3950"),
123 void __init
dmi_check_skip_isa_align(void)
125 dmi_check_system(can_skip_pciprobe_dmi_table
);
128 static void pcibios_fixup_device_resources(struct pci_dev
*dev
)
130 struct resource
*rom_r
= &dev
->resource
[PCI_ROM_RESOURCE
];
131 struct resource
*bar_r
;
134 if (pci_probe
& PCI_NOASSIGN_BARS
) {
136 * If the BIOS did not assign the BAR, zero out the
137 * resource so the kernel doesn't attmept to assign
138 * it later on in pci_assign_unassigned_resources
140 for (bar
= 0; bar
<= PCI_STD_RESOURCE_END
; bar
++) {
141 bar_r
= &dev
->resource
[bar
];
142 if (bar_r
->start
== 0 && bar_r
->end
!= 0) {
149 if (pci_probe
& PCI_NOASSIGN_ROMS
) {
153 /* we deal with BIOS assigned ROM later */
156 rom_r
->start
= rom_r
->end
= rom_r
->flags
= 0;
161 * Called after each bus is probed, but before its children
165 void pcibios_fixup_bus(struct pci_bus
*b
)
169 pci_read_bridge_bases(b
);
170 list_for_each_entry(dev
, &b
->devices
, bus_list
)
171 pcibios_fixup_device_resources(dev
);
175 * Only use DMI information to set this if nothing was passed
176 * on the kernel command line (which was parsed earlier).
179 static int set_bf_sort(const struct dmi_system_id
*d
)
181 if (pci_bf_sort
== pci_bf_sort_default
) {
182 pci_bf_sort
= pci_dmi_bf
;
183 printk(KERN_INFO
"PCI: %s detected, enabling pci=bfsort.\n", d
->ident
);
188 static void read_dmi_type_b1(const struct dmi_header
*dm
,
191 u8
*d
= (u8
*)dm
+ 4;
193 if (dm
->type
!= 0xB1)
195 switch (((*(u32
*)d
) >> 9) & 0x03) {
197 printk(KERN_INFO
"dmi type 0xB1 record - unknown flag\n");
199 case 0x01: /* set pci=bfsort */
200 smbios_type_b1_flag
= 1;
202 case 0x02: /* do not set pci=bfsort */
203 smbios_type_b1_flag
= 2;
210 static int find_sort_method(const struct dmi_system_id
*d
)
212 dmi_walk(read_dmi_type_b1
, NULL
);
214 if (smbios_type_b1_flag
== 1) {
222 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
225 static int assign_all_busses(const struct dmi_system_id
*d
)
227 pci_probe
|= PCI_ASSIGN_ALL_BUSSES
;
228 printk(KERN_INFO
"%s detected: enabling PCI bus# renumbering"
229 " (pci=assign-busses)\n", d
->ident
);
234 static int set_scan_all(const struct dmi_system_id
*d
)
236 printk(KERN_INFO
"PCI: %s detected, enabling pci=pcie_scan_all\n",
238 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS
);
242 static const struct dmi_system_id pciprobe_dmi_table
[] = {
245 * Laptops which need pci=assign-busses to see Cardbus cards
248 .callback
= assign_all_busses
,
249 .ident
= "Samsung X20 Laptop",
251 DMI_MATCH(DMI_SYS_VENDOR
, "Samsung Electronics"),
252 DMI_MATCH(DMI_PRODUCT_NAME
, "SX20S"),
255 #endif /* __i386__ */
257 .callback
= set_bf_sort
,
258 .ident
= "Dell PowerEdge 1950",
260 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
261 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 1950"),
265 .callback
= set_bf_sort
,
266 .ident
= "Dell PowerEdge 1955",
268 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
269 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 1955"),
273 .callback
= set_bf_sort
,
274 .ident
= "Dell PowerEdge 2900",
276 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
277 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 2900"),
281 .callback
= set_bf_sort
,
282 .ident
= "Dell PowerEdge 2950",
284 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
285 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 2950"),
289 .callback
= set_bf_sort
,
290 .ident
= "Dell PowerEdge R900",
292 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
293 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge R900"),
297 .callback
= find_sort_method
,
298 .ident
= "Dell System",
300 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc"),
304 .callback
= set_bf_sort
,
305 .ident
= "HP ProLiant BL20p G3",
307 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
308 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL20p G3"),
312 .callback
= set_bf_sort
,
313 .ident
= "HP ProLiant BL20p G4",
315 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
316 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL20p G4"),
320 .callback
= set_bf_sort
,
321 .ident
= "HP ProLiant BL30p G1",
323 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
324 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL30p G1"),
328 .callback
= set_bf_sort
,
329 .ident
= "HP ProLiant BL25p G1",
331 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
332 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL25p G1"),
336 .callback
= set_bf_sort
,
337 .ident
= "HP ProLiant BL35p G1",
339 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
340 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL35p G1"),
344 .callback
= set_bf_sort
,
345 .ident
= "HP ProLiant BL45p G1",
347 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
348 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL45p G1"),
352 .callback
= set_bf_sort
,
353 .ident
= "HP ProLiant BL45p G2",
355 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
356 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL45p G2"),
360 .callback
= set_bf_sort
,
361 .ident
= "HP ProLiant BL460c G1",
363 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
364 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL460c G1"),
368 .callback
= set_bf_sort
,
369 .ident
= "HP ProLiant BL465c G1",
371 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
372 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL465c G1"),
376 .callback
= set_bf_sort
,
377 .ident
= "HP ProLiant BL480c G1",
379 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
380 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL480c G1"),
384 .callback
= set_bf_sort
,
385 .ident
= "HP ProLiant BL685c G1",
387 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
388 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL685c G1"),
392 .callback
= set_bf_sort
,
393 .ident
= "HP ProLiant DL360",
395 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
396 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL360"),
400 .callback
= set_bf_sort
,
401 .ident
= "HP ProLiant DL380",
403 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
404 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL380"),
409 .callback
= assign_all_busses
,
410 .ident
= "Compaq EVO N800c",
412 DMI_MATCH(DMI_SYS_VENDOR
, "Compaq"),
413 DMI_MATCH(DMI_PRODUCT_NAME
, "EVO N800c"),
418 .callback
= set_bf_sort
,
419 .ident
= "HP ProLiant DL385 G2",
421 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
422 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL385 G2"),
426 .callback
= set_bf_sort
,
427 .ident
= "HP ProLiant DL585 G2",
429 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
430 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL585 G2"),
434 .callback
= set_scan_all
,
435 .ident
= "Stratus/NEC ftServer",
437 DMI_MATCH(DMI_SYS_VENDOR
, "Stratus"),
438 DMI_MATCH(DMI_PRODUCT_NAME
, "ftServer"),
444 void __init
dmi_check_pciprobe(void)
446 dmi_check_system(pciprobe_dmi_table
);
449 struct pci_bus
*pcibios_scan_root(int busnum
)
451 struct pci_bus
*bus
= NULL
;
453 while ((bus
= pci_find_next_bus(bus
)) != NULL
) {
454 if (bus
->number
== busnum
) {
455 /* Already scanned */
460 return pci_scan_bus_on_node(busnum
, &pci_root_ops
,
461 get_mp_bus_to_node(busnum
));
464 void __init
pcibios_set_cache_line_size(void)
466 struct cpuinfo_x86
*c
= &boot_cpu_data
;
469 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
470 * (For older CPUs that don't support cpuid, we se it to 32 bytes
471 * It's also good for 386/486s (which actually have 16)
472 * as quite a few PCI devices do not support smaller values.
474 if (c
->x86_clflush_size
> 0) {
475 pci_dfl_cache_line_size
= c
->x86_clflush_size
>> 2;
476 printk(KERN_DEBUG
"PCI: pci_cache_line_size set to %d bytes\n",
477 pci_dfl_cache_line_size
<< 2);
479 pci_dfl_cache_line_size
= 32 >> 2;
480 printk(KERN_DEBUG
"PCI: Unknown cacheline size. Setting to 32 bytes\n");
484 int __init
pcibios_init(void)
487 printk(KERN_WARNING
"PCI: System does not support PCI\n");
491 pcibios_set_cache_line_size();
492 pcibios_resource_survey();
494 if (pci_bf_sort
>= pci_force_bf
)
495 pci_sort_breadthfirst();
499 char * __init
pcibios_setup(char *str
)
501 if (!strcmp(str
, "off")) {
504 } else if (!strcmp(str
, "bfsort")) {
505 pci_bf_sort
= pci_force_bf
;
507 } else if (!strcmp(str
, "nobfsort")) {
508 pci_bf_sort
= pci_force_nobf
;
511 #ifdef CONFIG_PCI_BIOS
512 else if (!strcmp(str
, "bios")) {
513 pci_probe
= PCI_PROBE_BIOS
;
515 } else if (!strcmp(str
, "nobios")) {
516 pci_probe
&= ~PCI_PROBE_BIOS
;
518 } else if (!strcmp(str
, "biosirq")) {
519 pci_probe
|= PCI_BIOS_IRQ_SCAN
;
521 } else if (!strncmp(str
, "pirqaddr=", 9)) {
522 pirq_table_addr
= simple_strtoul(str
+9, NULL
, 0);
526 #ifdef CONFIG_PCI_DIRECT
527 else if (!strcmp(str
, "conf1")) {
528 pci_probe
= PCI_PROBE_CONF1
| PCI_NO_CHECKS
;
531 else if (!strcmp(str
, "conf2")) {
532 pci_probe
= PCI_PROBE_CONF2
| PCI_NO_CHECKS
;
536 #ifdef CONFIG_PCI_MMCONFIG
537 else if (!strcmp(str
, "nommconf")) {
538 pci_probe
&= ~PCI_PROBE_MMCONF
;
541 else if (!strcmp(str
, "check_enable_amd_mmconf")) {
542 pci_probe
|= PCI_CHECK_ENABLE_AMD_MMCONF
;
546 else if (!strcmp(str
, "noacpi")) {
550 else if (!strcmp(str
, "noearly")) {
551 pci_probe
|= PCI_PROBE_NOEARLY
;
554 #ifndef CONFIG_X86_VISWS
555 else if (!strcmp(str
, "usepirqmask")) {
556 pci_probe
|= PCI_USE_PIRQ_MASK
;
558 } else if (!strncmp(str
, "irqmask=", 8)) {
559 pcibios_irq_mask
= simple_strtol(str
+8, NULL
, 0);
561 } else if (!strncmp(str
, "lastbus=", 8)) {
562 pcibios_last_bus
= simple_strtol(str
+8, NULL
, 0);
566 else if (!strcmp(str
, "rom")) {
567 pci_probe
|= PCI_ASSIGN_ROMS
;
569 } else if (!strcmp(str
, "norom")) {
570 pci_probe
|= PCI_NOASSIGN_ROMS
;
572 } else if (!strcmp(str
, "nobar")) {
573 pci_probe
|= PCI_NOASSIGN_BARS
;
575 } else if (!strcmp(str
, "assign-busses")) {
576 pci_probe
|= PCI_ASSIGN_ALL_BUSSES
;
578 } else if (!strcmp(str
, "use_crs")) {
579 pci_probe
|= PCI_USE__CRS
;
581 } else if (!strcmp(str
, "nocrs")) {
582 pci_probe
|= PCI_ROOT_NO_CRS
;
584 } else if (!strcmp(str
, "earlydump")) {
585 pci_early_dump_regs
= 1;
587 } else if (!strcmp(str
, "routeirq")) {
590 } else if (!strcmp(str
, "skip_isa_align")) {
591 pci_probe
|= PCI_CAN_SKIP_ISA_ALIGN
;
593 } else if (!strcmp(str
, "noioapicquirk")) {
596 } else if (!strcmp(str
, "ioapicreroute")) {
597 if (noioapicreroute
!= -1)
600 } else if (!strcmp(str
, "noioapicreroute")) {
601 if (noioapicreroute
!= -1)
608 unsigned int pcibios_assign_all_busses(void)
610 return (pci_probe
& PCI_ASSIGN_ALL_BUSSES
) ? 1 : 0;
613 int pcibios_add_device(struct pci_dev
*dev
)
615 struct setup_data
*data
;
616 struct pci_setup_rom
*rom
;
619 pa_data
= boot_params
.hdr
.setup_data
;
621 data
= phys_to_virt(pa_data
);
623 if (data
->type
== SETUP_PCI
) {
624 rom
= (struct pci_setup_rom
*)data
;
626 if ((pci_domain_nr(dev
->bus
) == rom
->segment
) &&
627 (dev
->bus
->number
== rom
->bus
) &&
628 (PCI_SLOT(dev
->devfn
) == rom
->device
) &&
629 (PCI_FUNC(dev
->devfn
) == rom
->function
) &&
630 (dev
->vendor
== rom
->vendor
) &&
631 (dev
->device
== rom
->devid
)) {
633 offsetof(struct pci_setup_rom
, romdata
);
634 dev
->romlen
= rom
->pcilen
;
637 pa_data
= data
->next
;
642 int pcibios_enable_device(struct pci_dev
*dev
, int mask
)
646 if ((err
= pci_enable_resources(dev
, mask
)) < 0)
649 if (!pci_dev_msi_enabled(dev
))
650 return pcibios_enable_irq(dev
);
654 void pcibios_disable_device (struct pci_dev
*dev
)
656 if (!pci_dev_msi_enabled(dev
) && pcibios_disable_irq
)
657 pcibios_disable_irq(dev
);
660 int pci_ext_cfg_avail(void)
668 struct pci_bus
*pci_scan_bus_on_node(int busno
, struct pci_ops
*ops
, int node
)
670 LIST_HEAD(resources
);
671 struct pci_bus
*bus
= NULL
;
672 struct pci_sysdata
*sd
;
675 * Allocate per-root-bus (not per bus) arch-specific data.
676 * TODO: leak; this memory is never freed.
677 * It's arguable whether it's worth the trouble to care.
679 sd
= kzalloc(sizeof(*sd
), GFP_KERNEL
);
681 printk(KERN_ERR
"PCI: OOM, skipping PCI bus %02x\n", busno
);
685 x86_pci_root_bus_resources(busno
, &resources
);
686 printk(KERN_DEBUG
"PCI: Probing PCI hardware (bus %02x)\n", busno
);
687 bus
= pci_scan_root_bus(NULL
, busno
, ops
, sd
, &resources
);
689 pci_free_resource_list(&resources
);
696 struct pci_bus
*pci_scan_bus_with_sysdata(int busno
)
698 return pci_scan_bus_on_node(busno
, &pci_root_ops
, -1);
702 * NUMA info for PCI busses
704 * Early arch code is responsible for filling in reasonable values here.
705 * A node id of "-1" means "use current node". In other words, if a bus
706 * has a -1 node id, it's not tightly coupled to any particular chunk
707 * of memory (as is the case on some Nehalem systems).
715 static int mp_bus_to_node
[BUS_NR
] = {
716 [0 ... BUS_NR
- 1] = -1
719 void set_mp_bus_to_node(int busnum
, int node
)
721 if (busnum
>= 0 && busnum
< BUS_NR
)
722 mp_bus_to_node
[busnum
] = node
;
725 int get_mp_bus_to_node(int busnum
)
729 if (busnum
< 0 || busnum
> (BUS_NR
- 1))
732 node
= mp_bus_to_node
[busnum
];
735 * let numa_node_id to decide it later in dma_alloc_pages
736 * if there is no ram on that node
738 if (node
!= -1 && !node_online(node
))
744 #else /* CONFIG_X86_32 */
746 static int mp_bus_to_node
[BUS_NR
] = {
747 [0 ... BUS_NR
- 1] = -1
750 void set_mp_bus_to_node(int busnum
, int node
)
752 if (busnum
>= 0 && busnum
< BUS_NR
)
753 mp_bus_to_node
[busnum
] = (unsigned char) node
;
756 int get_mp_bus_to_node(int busnum
)
760 if (busnum
< 0 || busnum
> (BUS_NR
- 1))
762 node
= mp_bus_to_node
[busnum
];
766 #endif /* CONFIG_X86_32 */
768 #endif /* CONFIG_NUMA */