arch/xtensa/kernel/setup.c

   1 /*
   2  * arch/xtensa/kernel/setup.c
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1995  Linus Torvalds
   9  * Copyright (C) 2001 - 2005  Tensilica Inc.
  10  *
  11  * Chris Zankel <chris@zankel.net>
  12  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
  13  * Kevin Chea
  14  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
  15  */
  16
  17 #include <linux/errno.h>
  18 #include <linux/init.h>
  19 #include <linux/mm.h>
  20 #include <linux/proc_fs.h>
  21 #include <linux/screen_info.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/kernel.h>
  24
  25 #ifdef CONFIG_OF
  26 #include <linux/of_fdt.h>
  27 #include <linux/of_platform.h>
  28 #endif
  29
  30 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  31 # include <linux/console.h>
  32 #endif
  33
  34 #ifdef CONFIG_RTC
  35 # include <linux/timex.h>
  36 #endif
  37
  38 #ifdef CONFIG_PROC_FS
  39 # include <linux/seq_file.h>
  40 #endif
  41
  42 #include <asm/bootparam.h>
  43 #include <asm/pgtable.h>
  44 #include <asm/processor.h>
  45 #include <asm/timex.h>
  46 #include <asm/platform.h>
  47 #include <asm/page.h>
  48 #include <asm/setup.h>
  49 #include <asm/param.h>
  50 #include <asm/traps.h>
  51
  52 #include <platform/hardware.h>
  53
  54 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  55 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
  56 #endif
  57
  58 #ifdef CONFIG_BLK_DEV_FD
  59 extern struct fd_ops no_fd_ops;
  60 struct fd_ops *fd_ops;
  61 #endif
  62
  63 extern struct rtc_ops no_rtc_ops;
  64 struct rtc_ops *rtc_ops;
  65
  66 #ifdef CONFIG_BLK_DEV_INITRD
  67 extern void *initrd_start;
  68 extern void *initrd_end;
  69 int initrd_is_mapped = 0;
  70 extern int initrd_below_start_ok;
  71 #endif
  72
  73 #ifdef CONFIG_OF
  74 extern u32 __dtb_start[];
  75 void *dtb_start = __dtb_start;
  76 #endif
  77
  78 unsigned char aux_device_present;
  79 extern unsigned long loops_per_jiffy;
  80
  81 /* Command line specified as configuration option. */
  82
  83 static char __initdata command_line[COMMAND_LINE_SIZE];
  84
  85 #ifdef CONFIG_CMDLINE_BOOL
  86 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  87 #endif
  88
  89 sysmem_info_t __initdata sysmem;
  90
  91 #ifdef CONFIG_MMU
  92 extern void init_mmu(void);
  93 #else
  94 static inline void init_mmu(void) { }
  95 #endif
  96
  97 extern int mem_reserve(unsigned long, unsigned long, int);
  98 extern void bootmem_init(void);
  99 extern void zones_init(void);
 100
 101 /*
 102  * Boot parameter parsing.
 103  *
 104  * The Xtensa port uses a list of variable-sized tags to pass data to
 105  * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
 106  * to be recognised. The list is terminated with a zero-sized
 107  * BP_TAG_LAST tag.
 108  */
 109
 110 typedef struct tagtable {
 111         u32 tag;
 112         int (*parse)(const bp_tag_t*);
 113 } tagtable_t;
 114
 115 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn           \
 116         __attribute__((used, section(".taglist"))) = { tag, fn }
 117
 118 /* parse current tag */
 119
 120 static int __init add_sysmem_bank(unsigned long type, unsigned long start,
 121                 unsigned long end)
 122 {
 123         if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
 124                 printk(KERN_WARNING
 125                                 "Ignoring memory bank 0x%08lx size %ldKB\n",
 126                                 start, end - start);
 127                 return -EINVAL;
 128         }
 129         sysmem.bank[sysmem.nr_banks].type  = type;
 130         sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(start);
 131         sysmem.bank[sysmem.nr_banks].end   = end & PAGE_MASK;
 132         sysmem.nr_banks++;
 133
 134         return 0;
 135 }
 136
 137 static int __init parse_tag_mem(const bp_tag_t *tag)
 138 {
 139         meminfo_t *mi = (meminfo_t *)(tag->data);
 140
 141         if (mi->type != MEMORY_TYPE_CONVENTIONAL)
 142                 return -1;
 143
 144         return add_sysmem_bank(mi->type, mi->start, mi->end);
 145 }
 146
 147 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
 148
 149 #ifdef CONFIG_BLK_DEV_INITRD
 150
 151 static int __init parse_tag_initrd(const bp_tag_t* tag)
 152 {
 153         meminfo_t* mi;
 154         mi = (meminfo_t*)(tag->data);
 155         initrd_start = (void*)(mi->start);
 156         initrd_end = (void*)(mi->end);
 157
 158         return 0;
 159 }
 160
 161 __tagtable(BP_TAG_INITRD, parse_tag_initrd);
 162
 163 #ifdef CONFIG_OF
 164
 165 static int __init parse_tag_fdt(const bp_tag_t *tag)
 166 {
 167         dtb_start = (void *)(tag->data[0]);
 168         return 0;
 169 }
 170
 171 __tagtable(BP_TAG_FDT, parse_tag_fdt);
 172
 173 void __init early_init_dt_setup_initrd_arch(unsigned long start,
 174                 unsigned long end)
 175 {
 176         initrd_start = (void *)__va(start);
 177         initrd_end = (void *)__va(end);
 178         initrd_below_start_ok = 1;
 179 }
 180
 181 #endif /* CONFIG_OF */
 182
 183 #endif /* CONFIG_BLK_DEV_INITRD */
 184
 185 static int __init parse_tag_cmdline(const bp_tag_t* tag)
 186 {
 187         strlcpy(command_line, (char *)(tag->data), COMMAND_LINE_SIZE);
 188         return 0;
 189 }
 190
 191 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
 192
 193 static int __init parse_bootparam(const bp_tag_t* tag)
 194 {
 195         extern tagtable_t __tagtable_begin, __tagtable_end;
 196         tagtable_t *t;
 197
 198         /* Boot parameters must start with a BP_TAG_FIRST tag. */
 199
 200         if (tag->id != BP_TAG_FIRST) {
 201                 printk(KERN_WARNING "Invalid boot parameters!\n");
 202                 return 0;
 203         }
 204
 205         tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
 206
 207         /* Parse all tags. */
 208
 209         while (tag != NULL && tag->id != BP_TAG_LAST) {
 210                 for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
 211                         if (tag->id == t->tag) {
 212                                 t->parse(tag);
 213                                 break;
 214                         }
 215                 }
 216                 if (t == &__tagtable_end)
 217                         printk(KERN_WARNING "Ignoring tag "
 218                                "0x%08x\n", tag->id);
 219                 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
 220         }
 221
 222         return 0;
 223 }
 224
 225 #ifdef CONFIG_OF
 226
 227 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 228 {
 229         size &= PAGE_MASK;
 230         add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size);
 231 }
 232
 233 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 234 {
 235         return __alloc_bootmem(size, align, 0);
 236 }
 237
 238 void __init early_init_devtree(void *params)
 239 {
 240         /* Setup flat device-tree pointer */
 241         initial_boot_params = params;
 242
 243         /* Retrieve various informations from the /chosen node of the
 244          * device-tree, including the platform type, initrd location and
 245          * size, TCE reserve, and more ...
 246          */
 247         if (!command_line[0])
 248                 of_scan_flat_dt(early_init_dt_scan_chosen, command_line);
 249
 250         /* Scan memory nodes and rebuild MEMBLOCKs */
 251         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 252         if (sysmem.nr_banks == 0)
 253                 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 254 }
 255
 256 static void __init copy_devtree(void)
 257 {
 258         void *alloc = early_init_dt_alloc_memory_arch(
 259                         be32_to_cpu(initial_boot_params->totalsize), 0);
 260         if (alloc) {
 261                 memcpy(alloc, initial_boot_params,
 262                                 be32_to_cpu(initial_boot_params->totalsize));
 263                 initial_boot_params = alloc;
 264         }
 265 }
 266
 267 static int __init xtensa_device_probe(void)
 268 {
 269         of_platform_populate(NULL, NULL, NULL, NULL);
 270         return 0;
 271 }
 272
 273 device_initcall(xtensa_device_probe);
 274
 275 #endif /* CONFIG_OF */
 276
 277 /*
 278  * Initialize architecture. (Early stage)
 279  */
 280
 281 void __init init_arch(bp_tag_t *bp_start)
 282 {
 283         sysmem.nr_banks = 0;
 284
 285         /* Parse boot parameters */
 286
 287         if (bp_start)
 288                 parse_bootparam(bp_start);
 289
 290 #ifdef CONFIG_OF
 291         early_init_devtree(dtb_start);
 292 #endif
 293
 294         if (sysmem.nr_banks == 0) {
 295                 sysmem.nr_banks = 1;
 296                 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
 297                 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
 298                                      + PLATFORM_DEFAULT_MEM_SIZE;
 299         }
 300
 301 #ifdef CONFIG_CMDLINE_BOOL
 302         if (!command_line[0])
 303                 strlcpy(command_line, default_command_line, COMMAND_LINE_SIZE);
 304 #endif
 305
 306         /* Early hook for platforms */
 307
 308         platform_init(bp_start);
 309
 310         /* Initialize MMU. */
 311
 312         init_mmu();
 313 }
 314
 315 /*
 316  * Initialize system. Setup memory and reserve regions.
 317  */
 318
 319 extern char _end;
 320 extern char _stext;
 321 extern char _WindowVectors_text_start;
 322 extern char _WindowVectors_text_end;
 323 extern char _DebugInterruptVector_literal_start;
 324 extern char _DebugInterruptVector_text_end;
 325 extern char _KernelExceptionVector_literal_start;
 326 extern char _KernelExceptionVector_text_end;
 327 extern char _UserExceptionVector_literal_start;
 328 extern char _UserExceptionVector_text_end;
 329 extern char _DoubleExceptionVector_literal_start;
 330 extern char _DoubleExceptionVector_text_end;
 331
 332
 333 #ifdef CONFIG_S32C1I_SELFTEST
 334 #if XCHAL_HAVE_S32C1I
 335
 336 static int __initdata rcw_word, rcw_probe_pc, rcw_exc;
 337
 338 /*
 339  * Basic atomic compare-and-swap, that records PC of S32C1I for probing.
 340  *
 341  * If *v == cmp, set *v = set.  Return previous *v.
 342  */
 343 static inline int probed_compare_swap(int *v, int cmp, int set)
 344 {
 345         int tmp;
 346
 347         __asm__ __volatile__(
 348                         "       movi    %1, 1f\n"
 349                         "       s32i    %1, %4, 0\n"
 350                         "       wsr     %2, scompare1\n"
 351                         "1:     s32c1i  %0, %3, 0\n"
 352                         : "=a" (set), "=&a" (tmp)
 353                         : "a" (cmp), "a" (v), "a" (&rcw_probe_pc), "0" (set)
 354                         : "memory"
 355                         );
 356         return set;
 357 }
 358
 359 /* Handle probed exception */
 360
 361 void __init do_probed_exception(struct pt_regs *regs, unsigned long exccause)
 362 {
 363         if (regs->pc == rcw_probe_pc) { /* exception on s32c1i ? */
 364                 regs->pc += 3;          /* skip the s32c1i instruction */
 365                 rcw_exc = exccause;
 366         } else {
 367                 do_unhandled(regs, exccause);
 368         }
 369 }
 370
 371 /* Simple test of S32C1I (soc bringup assist) */
 372
 373 void __init check_s32c1i(void)
 374 {
 375         int n, cause1, cause2;
 376         void *handbus, *handdata, *handaddr; /* temporarily saved handlers */
 377
 378         rcw_probe_pc = 0;
 379         handbus  = trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR,
 380                         do_probed_exception);
 381         handdata = trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR,
 382                         do_probed_exception);
 383         handaddr = trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR,
 384                         do_probed_exception);
 385
 386         /* First try an S32C1I that does not store: */
 387         rcw_exc = 0;
 388         rcw_word = 1;
 389         n = probed_compare_swap(&rcw_word, 0, 2);
 390         cause1 = rcw_exc;
 391
 392         /* took exception? */
 393         if (cause1 != 0) {
 394                 /* unclean exception? */
 395                 if (n != 2 || rcw_word != 1)
 396                         panic("S32C1I exception error");
 397         } else if (rcw_word != 1 || n != 1) {
 398                 panic("S32C1I compare error");
 399         }
 400
 401         /* Then an S32C1I that stores: */
 402         rcw_exc = 0;
 403         rcw_word = 0x1234567;
 404         n = probed_compare_swap(&rcw_word, 0x1234567, 0xabcde);
 405         cause2 = rcw_exc;
 406
 407         if (cause2 != 0) {
 408                 /* unclean exception? */
 409                 if (n != 0xabcde || rcw_word != 0x1234567)
 410                         panic("S32C1I exception error (b)");
 411         } else if (rcw_word != 0xabcde || n != 0x1234567) {
 412                 panic("S32C1I store error");
 413         }
 414
 415         /* Verify consistency of exceptions: */
 416         if (cause1 || cause2) {
 417                 pr_warn("S32C1I took exception %d, %d\n", cause1, cause2);
 418                 /* If emulation of S32C1I upon bus error gets implemented,
 419                    we can get rid of this panic for single core (not SMP) */
 420                 panic("S32C1I exceptions not currently supported");
 421         }
 422         if (cause1 != cause2)
 423                 panic("inconsistent S32C1I exceptions");
 424
 425         trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR, handbus);
 426         trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR, handdata);
 427         trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR, handaddr);
 428 }
 429
 430 #else /* XCHAL_HAVE_S32C1I */
 431
 432 /* This condition should not occur with a commercially deployed processor.
 433    Display reminder for early engr test or demo chips / FPGA bitstreams */
 434 void __init check_s32c1i(void)
 435 {
 436         pr_warn("Processor configuration lacks atomic compare-and-swap support!\n");
 437 }
 438
 439 #endif /* XCHAL_HAVE_S32C1I */
 440 #else /* CONFIG_S32C1I_SELFTEST */
 441
 442 void __init check_s32c1i(void)
 443 {
 444 }
 445
 446 #endif /* CONFIG_S32C1I_SELFTEST */
 447
 448
 449 void __init setup_arch(char **cmdline_p)
 450 {
 451         strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 452         *cmdline_p = command_line;
 453
 454         check_s32c1i();
 455
 456         /* Reserve some memory regions */
 457
 458 #ifdef CONFIG_BLK_DEV_INITRD
 459         if (initrd_start < initrd_end) {
 460                 initrd_is_mapped = mem_reserve(__pa(initrd_start),
 461                                                __pa(initrd_end), 0);
 462                 initrd_below_start_ok = 1;
 463         } else {
 464                 initrd_start = 0;
 465         }
 466 #endif
 467
 468         mem_reserve(__pa(&_stext),__pa(&_end), 1);
 469
 470         mem_reserve(__pa(&_WindowVectors_text_start),
 471                     __pa(&_WindowVectors_text_end), 0);
 472
 473         mem_reserve(__pa(&_DebugInterruptVector_literal_start),
 474                     __pa(&_DebugInterruptVector_text_end), 0);
 475
 476         mem_reserve(__pa(&_KernelExceptionVector_literal_start),
 477                     __pa(&_KernelExceptionVector_text_end), 0);
 478
 479         mem_reserve(__pa(&_UserExceptionVector_literal_start),
 480                     __pa(&_UserExceptionVector_text_end), 0);
 481
 482         mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
 483                     __pa(&_DoubleExceptionVector_text_end), 0);
 484
 485         bootmem_init();
 486
 487 #ifdef CONFIG_OF
 488         copy_devtree();
 489         unflatten_device_tree();
 490 #endif
 491
 492         platform_setup(cmdline_p);
 493
 494         paging_init();
 495         zones_init();
 496
 497 #ifdef CONFIG_VT
 498 # if defined(CONFIG_VGA_CONSOLE)
 499         conswitchp = &vga_con;
 500 # elif defined(CONFIG_DUMMY_CONSOLE)
 501         conswitchp = &dummy_con;
 502 # endif
 503 #endif
 504
 505 #ifdef CONFIG_PCI
 506         platform_pcibios_init();
 507 #endif
 508 }
 509
 510 void machine_restart(char * cmd)
 511 {
 512         platform_restart();
 513 }
 514
 515 void machine_halt(void)
 516 {
 517         platform_halt();
 518         while (1);
 519 }
 520
 521 void machine_power_off(void)
 522 {
 523         platform_power_off();
 524         while (1);
 525 }
 526 #ifdef CONFIG_PROC_FS
 527
 528 /*
 529  * Display some core information through /proc/cpuinfo.
 530  */
 531
 532 static int
 533 c_show(struct seq_file *f, void *slot)
 534 {
 535         /* high-level stuff */
 536         seq_printf(f,"processor\t: 0\n"
 537                      "vendor_id\t: Tensilica\n"
 538                      "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
 539                      "core ID\t\t: " XCHAL_CORE_ID "\n"
 540                      "build ID\t: 0x%x\n"
 541                      "byte order\t: %s\n"
 542                      "cpu MHz\t\t: %lu.%02lu\n"
 543                      "bogomips\t: %lu.%02lu\n",
 544                      XCHAL_BUILD_UNIQUE_ID,
 545                      XCHAL_HAVE_BE ?  "big" : "little",
 546                      CCOUNT_PER_JIFFY/(1000000/HZ),
 547                      (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
 548                      loops_per_jiffy/(500000/HZ),
 549                      (loops_per_jiffy/(5000/HZ)) % 100);
 550
 551         seq_printf(f,"flags\t\t: "
 552 #if XCHAL_HAVE_NMI
 553                      "nmi "
 554 #endif
 555 #if XCHAL_HAVE_DEBUG
 556                      "debug "
 557 # if XCHAL_HAVE_OCD
 558                      "ocd "
 559 # endif
 560 #endif
 561 #if XCHAL_HAVE_DENSITY
 562                      "density "
 563 #endif
 564 #if XCHAL_HAVE_BOOLEANS
 565                      "boolean "
 566 #endif
 567 #if XCHAL_HAVE_LOOPS
 568                      "loop "
 569 #endif
 570 #if XCHAL_HAVE_NSA
 571                      "nsa "
 572 #endif
 573 #if XCHAL_HAVE_MINMAX
 574                      "minmax "
 575 #endif
 576 #if XCHAL_HAVE_SEXT
 577                      "sext "
 578 #endif
 579 #if XCHAL_HAVE_CLAMPS
 580                      "clamps "
 581 #endif
 582 #if XCHAL_HAVE_MAC16
 583                      "mac16 "
 584 #endif
 585 #if XCHAL_HAVE_MUL16
 586                      "mul16 "
 587 #endif
 588 #if XCHAL_HAVE_MUL32
 589                      "mul32 "
 590 #endif
 591 #if XCHAL_HAVE_MUL32_HIGH
 592                      "mul32h "
 593 #endif
 594 #if XCHAL_HAVE_FP
 595                      "fpu "
 596 #endif
 597 #if XCHAL_HAVE_S32C1I
 598                      "s32c1i "
 599 #endif
 600                      "\n");
 601
 602         /* Registers. */
 603         seq_printf(f,"physical aregs\t: %d\n"
 604                      "misc regs\t: %d\n"
 605                      "ibreak\t\t: %d\n"
 606                      "dbreak\t\t: %d\n",
 607                      XCHAL_NUM_AREGS,
 608                      XCHAL_NUM_MISC_REGS,
 609                      XCHAL_NUM_IBREAK,
 610                      XCHAL_NUM_DBREAK);
 611
 612
 613         /* Interrupt. */
 614         seq_printf(f,"num ints\t: %d\n"
 615                      "ext ints\t: %d\n"
 616                      "int levels\t: %d\n"
 617                      "timers\t\t: %d\n"
 618                      "debug level\t: %d\n",
 619                      XCHAL_NUM_INTERRUPTS,
 620                      XCHAL_NUM_EXTINTERRUPTS,
 621                      XCHAL_NUM_INTLEVELS,
 622                      XCHAL_NUM_TIMERS,
 623                      XCHAL_DEBUGLEVEL);
 624
 625         /* Cache */
 626         seq_printf(f,"icache line size: %d\n"
 627                      "icache ways\t: %d\n"
 628                      "icache size\t: %d\n"
 629                      "icache flags\t: "
 630 #if XCHAL_ICACHE_LINE_LOCKABLE
 631                      "lock "
 632 #endif
 633                      "\n"
 634                      "dcache line size: %d\n"
 635                      "dcache ways\t: %d\n"
 636                      "dcache size\t: %d\n"
 637                      "dcache flags\t: "
 638 #if XCHAL_DCACHE_IS_WRITEBACK
 639                      "writeback "
 640 #endif
 641 #if XCHAL_DCACHE_LINE_LOCKABLE
 642                      "lock "
 643 #endif
 644                      "\n",
 645                      XCHAL_ICACHE_LINESIZE,
 646                      XCHAL_ICACHE_WAYS,
 647                      XCHAL_ICACHE_SIZE,
 648                      XCHAL_DCACHE_LINESIZE,
 649                      XCHAL_DCACHE_WAYS,
 650                      XCHAL_DCACHE_SIZE);
 651
 652         return 0;
 653 }
 654
 655 /*
 656  * We show only CPU #0 info.
 657  */
 658 static void *
 659 c_start(struct seq_file *f, loff_t *pos)
 660 {
 661         return (void *) ((*pos == 0) ? (void *)1 : NULL);
 662 }
 663
 664 static void *
 665 c_next(struct seq_file *f, void *v, loff_t *pos)
 666 {
 667         return NULL;
 668 }
 669
 670 static void
 671 c_stop(struct seq_file *f, void *v)
 672 {
 673 }
 674
 675 const struct seq_operations cpuinfo_op =
 676 {
 677         start:  c_start,
 678         next:   c_next,
 679         stop:   c_stop,
 680         show:   c_show
 681 };
 682
 683 #endif /* CONFIG_PROC_FS */