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Linux 3.8-rc7
[cris-mirror.git] / sound / pci / nm256 / nm256.c
blob563a193e36a3d84d65998c45fb0fb0b5279eb532
1 /*
2 * Driver for NeoMagic 256AV and 256ZX chipsets.
3 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
4 *
5 * Based on nm256_audio.c OSS driver in linux kernel.
6 * The original author of OSS nm256 driver wishes to remain anonymous,
7 * so I just put my acknoledgment to him/her here.
8 * The original author's web page is found at
9 * http://www.uglx.org/sony.html
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <asm/io.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/slab.h>
33 #include <linux/module.h>
34 #include <linux/mutex.h>
35
36 #include <sound/core.h>
37 #include <sound/info.h>
38 #include <sound/control.h>
39 #include <sound/pcm.h>
40 #include <sound/ac97_codec.h>
41 #include <sound/initval.h>
42
43 #define CARD_NAME "NeoMagic 256AV/ZX"
44 #define DRIVER_NAME "NM256"
45
46 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
47 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
48 MODULE_LICENSE("GPL");
49 MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
50 "{NeoMagic,NM256ZX}}");
51
52 /*
53 * some compile conditions.
54 */
55
56 static int index = SNDRV_DEFAULT_IDX1; /* Index */
57 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
58 static int playback_bufsize = 16;
59 static int capture_bufsize = 16;
60 static bool force_ac97; /* disabled as default */
61 static int buffer_top; /* not specified */
62 static bool use_cache; /* disabled */
63 static bool vaio_hack; /* disabled */
64 static bool reset_workaround;
65 static bool reset_workaround_2;
66
67 module_param(index, int, 0444);
68 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
69 module_param(id, charp, 0444);
70 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
71 module_param(playback_bufsize, int, 0444);
72 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
73 module_param(capture_bufsize, int, 0444);
74 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
75 module_param(force_ac97, bool, 0444);
76 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
77 module_param(buffer_top, int, 0444);
78 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
79 module_param(use_cache, bool, 0444);
80 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
81 module_param(vaio_hack, bool, 0444);
82 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
83 module_param(reset_workaround, bool, 0444);
84 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
85 module_param(reset_workaround_2, bool, 0444);
86 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
87
88 /* just for backward compatibility */
89 static bool enable;
90 module_param(enable, bool, 0444);
91
92
93
94 /*
95 * hw definitions
96 */
97
98 /* The BIOS signature. */
99 #define NM_SIGNATURE 0x4e4d0000
100 /* Signature mask. */
101 #define NM_SIG_MASK 0xffff0000
102
103 /* Size of the second memory area. */
104 #define NM_PORT2_SIZE 4096
105
106 /* The base offset of the mixer in the second memory area. */
107 #define NM_MIXER_OFFSET 0x600
108
109 /* The maximum size of a coefficient entry. */
110 #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
111 #define NM_MAX_RECORD_COEF_SIZE 0x1260
112
113 /* The interrupt register. */
114 #define NM_INT_REG 0xa04
115 /* And its bits. */
116 #define NM_PLAYBACK_INT 0x40
117 #define NM_RECORD_INT 0x100
118 #define NM_MISC_INT_1 0x4000
119 #define NM_MISC_INT_2 0x1
120 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
121
122 /* The AV's "mixer ready" status bit and location. */
123 #define NM_MIXER_STATUS_OFFSET 0xa04
124 #define NM_MIXER_READY_MASK 0x0800
125 #define NM_MIXER_PRESENCE 0xa06
126 #define NM_PRESENCE_MASK 0x0050
127 #define NM_PRESENCE_VALUE 0x0040
128
129 /*
130 * For the ZX. It uses the same interrupt register, but it holds 32
131 * bits instead of 16.
132 */
133 #define NM2_PLAYBACK_INT 0x10000
134 #define NM2_RECORD_INT 0x80000
135 #define NM2_MISC_INT_1 0x8
136 #define NM2_MISC_INT_2 0x2
137 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
138
139 /* The ZX's "mixer ready" status bit and location. */
140 #define NM2_MIXER_STATUS_OFFSET 0xa06
141 #define NM2_MIXER_READY_MASK 0x0800
142
143 /* The playback registers start from here. */
144 #define NM_PLAYBACK_REG_OFFSET 0x0
145 /* The record registers start from here. */
146 #define NM_RECORD_REG_OFFSET 0x200
147
148 /* The rate register is located 2 bytes from the start of the register area. */
149 #define NM_RATE_REG_OFFSET 2
150
151 /* Mono/stereo flag, number of bits on playback, and rate mask. */
152 #define NM_RATE_STEREO 1
153 #define NM_RATE_BITS_16 2
154 #define NM_RATE_MASK 0xf0
155
156 /* Playback enable register. */
157 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
158 #define NM_PLAYBACK_ENABLE_FLAG 1
159 #define NM_PLAYBACK_ONESHOT 2
160 #define NM_PLAYBACK_FREERUN 4
161
162 /* Mutes the audio output. */
163 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
164 #define NM_AUDIO_MUTE_LEFT 0x8000
165 #define NM_AUDIO_MUTE_RIGHT 0x0080
166
167 /* Recording enable register. */
168 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
169 #define NM_RECORD_ENABLE_FLAG 1
170 #define NM_RECORD_FREERUN 2
171
172 /* coefficient buffer pointer */
173 #define NM_COEFF_START_OFFSET 0x1c
174 #define NM_COEFF_END_OFFSET 0x20
175
176 /* DMA buffer offsets */
177 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
178 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
179 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
180 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
181
182 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
183 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
184 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
185 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
186
187 struct nm256_stream {
188
189 struct nm256 *chip;
190 struct snd_pcm_substream *substream;
191 int running;
192 int suspended;
193
194 u32 buf; /* offset from chip->buffer */
195 int bufsize; /* buffer size in bytes */
196 void __iomem *bufptr; /* mapped pointer */
197 unsigned long bufptr_addr; /* physical address of the mapped pointer */
198
199 int dma_size; /* buffer size of the substream in bytes */
200 int period_size; /* period size in bytes */
201 int periods; /* # of periods */
202 int shift; /* bit shifts */
203 int cur_period; /* current period # */
204
205 };
206
207 struct nm256 {
208
209 struct snd_card *card;
210
211 void __iomem *cport; /* control port */
212 struct resource *res_cport; /* its resource */
213 unsigned long cport_addr; /* physical address */
214
215 void __iomem *buffer; /* buffer */
216 struct resource *res_buffer; /* its resource */
217 unsigned long buffer_addr; /* buffer phyiscal address */
218
219 u32 buffer_start; /* start offset from pci resource 0 */
220 u32 buffer_end; /* end offset */
221 u32 buffer_size; /* total buffer size */
222
223 u32 all_coeff_buf; /* coefficient buffer */
224 u32 coeff_buf[2]; /* coefficient buffer for each stream */
225
226 unsigned int coeffs_current: 1; /* coeff. table is loaded? */
227 unsigned int use_cache: 1; /* use one big coef. table */
228 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
229 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
230 unsigned int in_resume: 1;
231
232 int mixer_base; /* register offset of ac97 mixer */
233 int mixer_status_offset; /* offset of mixer status reg. */
234 int mixer_status_mask; /* bit mask to test the mixer status */
235
236 int irq;
237 int irq_acks;
238 irq_handler_t interrupt;
239 int badintrcount; /* counter to check bogus interrupts */
240 struct mutex irq_mutex;
241
242 struct nm256_stream streams[2];
243
244 struct snd_ac97 *ac97;
245 unsigned short *ac97_regs; /* register caches, only for valid regs */
246
247 struct snd_pcm *pcm;
248
249 struct pci_dev *pci;
250
251 spinlock_t reg_lock;
252
253 };
254
255
256 /*
257 * include coefficient table
258 */
259 #include "nm256_coef.c"
260
261
262 /*
263 * PCI ids
264 */
265 static DEFINE_PCI_DEVICE_TABLE(snd_nm256_ids) = {
266 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
267 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
268 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
269 {0,},
270 };
271
272 MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
273
274
275 /*
276 * lowlvel stuffs
277 */
278
279 static inline u8
280 snd_nm256_readb(struct nm256 *chip, int offset)
281 {
282 return readb(chip->cport + offset);
283 }
284
285 static inline u16
286 snd_nm256_readw(struct nm256 *chip, int offset)
287 {
288 return readw(chip->cport + offset);
289 }
290
291 static inline u32
292 snd_nm256_readl(struct nm256 *chip, int offset)
293 {
294 return readl(chip->cport + offset);
295 }
296
297 static inline void
298 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
299 {
300 writeb(val, chip->cport + offset);
301 }
302
303 static inline void
304 snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
305 {
306 writew(val, chip->cport + offset);
307 }
308
309 static inline void
310 snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
311 {
312 writel(val, chip->cport + offset);
313 }
314
315 static inline void
316 snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
317 {
318 offset -= chip->buffer_start;
319 #ifdef CONFIG_SND_DEBUG
320 if (offset < 0 || offset >= chip->buffer_size) {
321 snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
322 offset, size);
323 return;
324 }
325 #endif
326 memcpy_toio(chip->buffer + offset, src, size);
327 }
328
329 /*
330 * coefficient handlers -- what a magic!
331 */
332
333 static u16
334 snd_nm256_get_start_offset(int which)
335 {
336 u16 offset = 0;
337 while (which-- > 0)
338 offset += coefficient_sizes[which];
339 return offset;
340 }
341
342 static void
343 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
344 {
345 u32 coeff_buf = chip->coeff_buf[stream];
346 u16 offset = snd_nm256_get_start_offset(which);
347 u16 size = coefficient_sizes[which];
348
349 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
350 snd_nm256_writel(chip, port, coeff_buf);
351 /* ??? Record seems to behave differently than playback. */
352 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
353 size--;
354 snd_nm256_writel(chip, port + 4, coeff_buf + size);
355 }
356
357 static void
358 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
359 {
360 /* The enable register for the specified engine. */
361 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
362 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
363 u32 addr = NM_COEFF_START_OFFSET;
364
365 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
366 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
367
368 if (snd_nm256_readb(chip, poffset) & 1) {
369 snd_printd("NM256: Engine was enabled while loading coefficients!\n");
370 return;
371 }
372
373 /* The recording engine uses coefficient values 8-15. */
374 number &= 7;
375 if (stream == SNDRV_PCM_STREAM_CAPTURE)
376 number += 8;
377
378 if (! chip->use_cache) {
379 snd_nm256_load_one_coefficient(chip, stream, addr, number);
380 return;
381 }
382 if (! chip->coeffs_current) {
383 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
384 NM_TOTAL_COEFF_COUNT * 4);
385 chip->coeffs_current = 1;
386 } else {
387 u32 base = chip->all_coeff_buf;
388 u32 offset = snd_nm256_get_start_offset(number);
389 u32 end_offset = offset + coefficient_sizes[number];
390 snd_nm256_writel(chip, addr, base + offset);
391 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
392 end_offset--;
393 snd_nm256_writel(chip, addr + 4, base + end_offset);
394 }
395 }
396
397
398 /* The actual rates supported by the card. */
399 static unsigned int samplerates[8] = {
400 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
401 };
402 static struct snd_pcm_hw_constraint_list constraints_rates = {
403 .count = ARRAY_SIZE(samplerates),
404 .list = samplerates,
405 .mask = 0,
406 };
407
408 /*
409 * return the index of the target rate
410 */
411 static int
412 snd_nm256_fixed_rate(unsigned int rate)
413 {
414 unsigned int i;
415 for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
416 if (rate == samplerates[i])
417 return i;
418 }
419 snd_BUG();
420 return 0;
421 }
422
423 /*
424 * set sample rate and format
425 */
426 static void
427 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
428 struct snd_pcm_substream *substream)
429 {
430 struct snd_pcm_runtime *runtime = substream->runtime;
431 int rate_index = snd_nm256_fixed_rate(runtime->rate);
432 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
433
434 s->shift = 0;
435 if (snd_pcm_format_width(runtime->format) == 16) {
436 ratebits |= NM_RATE_BITS_16;
437 s->shift++;
438 }
439 if (runtime->channels > 1) {
440 ratebits |= NM_RATE_STEREO;
441 s->shift++;
442 }
443
444 runtime->rate = samplerates[rate_index];
445
446 switch (substream->stream) {
447 case SNDRV_PCM_STREAM_PLAYBACK:
448 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
449 snd_nm256_writeb(chip,
450 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
451 ratebits);
452 break;
453 case SNDRV_PCM_STREAM_CAPTURE:
454 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
455 snd_nm256_writeb(chip,
456 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
457 ratebits);
458 break;
459 }
460 }
461
462 /* acquire interrupt */
463 static int snd_nm256_acquire_irq(struct nm256 *chip)
464 {
465 mutex_lock(&chip->irq_mutex);
466 if (chip->irq < 0) {
467 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
468 KBUILD_MODNAME, chip)) {
469 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
470 mutex_unlock(&chip->irq_mutex);
471 return -EBUSY;
472 }
473 chip->irq = chip->pci->irq;
474 }
475 chip->irq_acks++;
476 mutex_unlock(&chip->irq_mutex);
477 return 0;
478 }
479
480 /* release interrupt */
481 static void snd_nm256_release_irq(struct nm256 *chip)
482 {
483 mutex_lock(&chip->irq_mutex);
484 if (chip->irq_acks > 0)
485 chip->irq_acks--;
486 if (chip->irq_acks == 0 && chip->irq >= 0) {
487 free_irq(chip->irq, chip);
488 chip->irq = -1;
489 }
490 mutex_unlock(&chip->irq_mutex);
491 }
492
493 /*
494 * start / stop
495 */
496
497 /* update the watermark (current period) */
498 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
499 {
500 s->cur_period++;
501 s->cur_period %= s->periods;
502 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
503 }
504
505 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
506 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
507
508 static void
509 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
510 struct snd_pcm_substream *substream)
511 {
512 /* program buffer pointers */
513 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
514 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
515 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
516 snd_nm256_playback_mark(chip, s);
517
518 /* Enable playback engine and interrupts. */
519 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
520 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
521 /* Enable both channels. */
522 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
523 }
524
525 static void
526 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
527 struct snd_pcm_substream *substream)
528 {
529 /* program buffer pointers */
530 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
531 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
532 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
533 snd_nm256_capture_mark(chip, s);
534
535 /* Enable playback engine and interrupts. */
536 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
537 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
538 }
539
540 /* Stop the play engine. */
541 static void
542 snd_nm256_playback_stop(struct nm256 *chip)
543 {
544 /* Shut off sound from both channels. */
545 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
546 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
547 /* Disable play engine. */
548 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
549 }
550
551 static void
552 snd_nm256_capture_stop(struct nm256 *chip)
553 {
554 /* Disable recording engine. */
555 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
556 }
557
558 static int
559 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
560 {
561 struct nm256 *chip = snd_pcm_substream_chip(substream);
562 struct nm256_stream *s = substream->runtime->private_data;
563 int err = 0;
564
565 if (snd_BUG_ON(!s))
566 return -ENXIO;
567
568 spin_lock(&chip->reg_lock);
569 switch (cmd) {
570 case SNDRV_PCM_TRIGGER_RESUME:
571 s->suspended = 0;
572 /* fallthru */
573 case SNDRV_PCM_TRIGGER_START:
574 if (! s->running) {
575 snd_nm256_playback_start(chip, s, substream);
576 s->running = 1;
577 }
578 break;
579 case SNDRV_PCM_TRIGGER_SUSPEND:
580 s->suspended = 1;
581 /* fallthru */
582 case SNDRV_PCM_TRIGGER_STOP:
583 if (s->running) {
584 snd_nm256_playback_stop(chip);
585 s->running = 0;
586 }
587 break;
588 default:
589 err = -EINVAL;
590 break;
591 }
592 spin_unlock(&chip->reg_lock);
593 return err;
594 }
595
596 static int
597 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
598 {
599 struct nm256 *chip = snd_pcm_substream_chip(substream);
600 struct nm256_stream *s = substream->runtime->private_data;
601 int err = 0;
602
603 if (snd_BUG_ON(!s))
604 return -ENXIO;
605
606 spin_lock(&chip->reg_lock);
607 switch (cmd) {
608 case SNDRV_PCM_TRIGGER_START:
609 case SNDRV_PCM_TRIGGER_RESUME:
610 if (! s->running) {
611 snd_nm256_capture_start(chip, s, substream);
612 s->running = 1;
613 }
614 break;
615 case SNDRV_PCM_TRIGGER_STOP:
616 case SNDRV_PCM_TRIGGER_SUSPEND:
617 if (s->running) {
618 snd_nm256_capture_stop(chip);
619 s->running = 0;
620 }
621 break;
622 default:
623 err = -EINVAL;
624 break;
625 }
626 spin_unlock(&chip->reg_lock);
627 return err;
628 }
629
630
631 /*
632 * prepare playback/capture channel
633 */
634 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
635 {
636 struct nm256 *chip = snd_pcm_substream_chip(substream);
637 struct snd_pcm_runtime *runtime = substream->runtime;
638 struct nm256_stream *s = runtime->private_data;
639
640 if (snd_BUG_ON(!s))
641 return -ENXIO;
642 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
643 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
644 s->periods = substream->runtime->periods;
645 s->cur_period = 0;
646
647 spin_lock_irq(&chip->reg_lock);
648 s->running = 0;
649 snd_nm256_set_format(chip, s, substream);
650 spin_unlock_irq(&chip->reg_lock);
651
652 return 0;
653 }
654
655
656 /*
657 * get the current pointer
658 */
659 static snd_pcm_uframes_t
660 snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
661 {
662 struct nm256 *chip = snd_pcm_substream_chip(substream);
663 struct nm256_stream *s = substream->runtime->private_data;
664 unsigned long curp;
665
666 if (snd_BUG_ON(!s))
667 return 0;
668 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
669 curp %= s->dma_size;
670 return bytes_to_frames(substream->runtime, curp);
671 }
672
673 static snd_pcm_uframes_t
674 snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
675 {
676 struct nm256 *chip = snd_pcm_substream_chip(substream);
677 struct nm256_stream *s = substream->runtime->private_data;
678 unsigned long curp;
679
680 if (snd_BUG_ON(!s))
681 return 0;
682 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
683 curp %= s->dma_size;
684 return bytes_to_frames(substream->runtime, curp);
685 }
686
687 /* Remapped I/O space can be accessible as pointer on i386 */
688 /* This might be changed in the future */
689 #ifndef __i386__
690 /*
691 * silence / copy for playback
692 */
693 static int
694 snd_nm256_playback_silence(struct snd_pcm_substream *substream,
695 int channel, /* not used (interleaved data) */
696 snd_pcm_uframes_t pos,
697 snd_pcm_uframes_t count)
698 {
699 struct snd_pcm_runtime *runtime = substream->runtime;
700 struct nm256_stream *s = runtime->private_data;
701 count = frames_to_bytes(runtime, count);
702 pos = frames_to_bytes(runtime, pos);
703 memset_io(s->bufptr + pos, 0, count);
704 return 0;
705 }
706
707 static int
708 snd_nm256_playback_copy(struct snd_pcm_substream *substream,
709 int channel, /* not used (interleaved data) */
710 snd_pcm_uframes_t pos,
711 void __user *src,
712 snd_pcm_uframes_t count)
713 {
714 struct snd_pcm_runtime *runtime = substream->runtime;
715 struct nm256_stream *s = runtime->private_data;
716 count = frames_to_bytes(runtime, count);
717 pos = frames_to_bytes(runtime, pos);
718 if (copy_from_user_toio(s->bufptr + pos, src, count))
719 return -EFAULT;
720 return 0;
721 }
722
723 /*
724 * copy to user
725 */
726 static int
727 snd_nm256_capture_copy(struct snd_pcm_substream *substream,
728 int channel, /* not used (interleaved data) */
729 snd_pcm_uframes_t pos,
730 void __user *dst,
731 snd_pcm_uframes_t count)
732 {
733 struct snd_pcm_runtime *runtime = substream->runtime;
734 struct nm256_stream *s = runtime->private_data;
735 count = frames_to_bytes(runtime, count);
736 pos = frames_to_bytes(runtime, pos);
737 if (copy_to_user_fromio(dst, s->bufptr + pos, count))
738 return -EFAULT;
739 return 0;
740 }
741
742 #endif /* !__i386__ */
743
744
745 /*
746 * update playback/capture watermarks
747 */
748
749 /* spinlock held! */
750 static void
751 snd_nm256_playback_update(struct nm256 *chip)
752 {
753 struct nm256_stream *s;
754
755 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
756 if (s->running && s->substream) {
757 spin_unlock(&chip->reg_lock);
758 snd_pcm_period_elapsed(s->substream);
759 spin_lock(&chip->reg_lock);
760 snd_nm256_playback_mark(chip, s);
761 }
762 }
763
764 /* spinlock held! */
765 static void
766 snd_nm256_capture_update(struct nm256 *chip)
767 {
768 struct nm256_stream *s;
769
770 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
771 if (s->running && s->substream) {
772 spin_unlock(&chip->reg_lock);
773 snd_pcm_period_elapsed(s->substream);
774 spin_lock(&chip->reg_lock);
775 snd_nm256_capture_mark(chip, s);
776 }
777 }
778
779 /*
780 * hardware info
781 */
782 static struct snd_pcm_hardware snd_nm256_playback =
783 {
784 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
785 SNDRV_PCM_INFO_INTERLEAVED |
786 /*SNDRV_PCM_INFO_PAUSE |*/
787 SNDRV_PCM_INFO_RESUME,
788 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
789 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
790 .rate_min = 8000,
791 .rate_max = 48000,
792 .channels_min = 1,
793 .channels_max = 2,
794 .periods_min = 2,
795 .periods_max = 1024,
796 .buffer_bytes_max = 128 * 1024,
797 .period_bytes_min = 256,
798 .period_bytes_max = 128 * 1024,
799 };
800
801 static struct snd_pcm_hardware snd_nm256_capture =
802 {
803 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
804 SNDRV_PCM_INFO_INTERLEAVED |
805 /*SNDRV_PCM_INFO_PAUSE |*/
806 SNDRV_PCM_INFO_RESUME,
807 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
808 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
809 .rate_min = 8000,
810 .rate_max = 48000,
811 .channels_min = 1,
812 .channels_max = 2,
813 .periods_min = 2,
814 .periods_max = 1024,
815 .buffer_bytes_max = 128 * 1024,
816 .period_bytes_min = 256,
817 .period_bytes_max = 128 * 1024,
818 };
819
820
821 /* set dma transfer size */
822 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
823 struct snd_pcm_hw_params *hw_params)
824 {
825 /* area and addr are already set and unchanged */
826 substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
827 return 0;
828 }
829
830 /*
831 * open
832 */
833 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
834 struct snd_pcm_substream *substream,
835 struct snd_pcm_hardware *hw_ptr)
836 {
837 struct snd_pcm_runtime *runtime = substream->runtime;
838
839 s->running = 0;
840 runtime->hw = *hw_ptr;
841 runtime->hw.buffer_bytes_max = s->bufsize;
842 runtime->hw.period_bytes_max = s->bufsize / 2;
843 runtime->dma_area = (void __force *) s->bufptr;
844 runtime->dma_addr = s->bufptr_addr;
845 runtime->dma_bytes = s->bufsize;
846 runtime->private_data = s;
847 s->substream = substream;
848
849 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
850 &constraints_rates);
851 }
852
853 static int
854 snd_nm256_playback_open(struct snd_pcm_substream *substream)
855 {
856 struct nm256 *chip = snd_pcm_substream_chip(substream);
857
858 if (snd_nm256_acquire_irq(chip) < 0)
859 return -EBUSY;
860 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
861 substream, &snd_nm256_playback);
862 return 0;
863 }
864
865 static int
866 snd_nm256_capture_open(struct snd_pcm_substream *substream)
867 {
868 struct nm256 *chip = snd_pcm_substream_chip(substream);
869
870 if (snd_nm256_acquire_irq(chip) < 0)
871 return -EBUSY;
872 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
873 substream, &snd_nm256_capture);
874 return 0;
875 }
876
877 /*
878 * close - we don't have to do special..
879 */
880 static int
881 snd_nm256_playback_close(struct snd_pcm_substream *substream)
882 {
883 struct nm256 *chip = snd_pcm_substream_chip(substream);
884
885 snd_nm256_release_irq(chip);
886 return 0;
887 }
888
889
890 static int
891 snd_nm256_capture_close(struct snd_pcm_substream *substream)
892 {
893 struct nm256 *chip = snd_pcm_substream_chip(substream);
894
895 snd_nm256_release_irq(chip);
896 return 0;
897 }
898
899 /*
900 * create a pcm instance
901 */
902 static struct snd_pcm_ops snd_nm256_playback_ops = {
903 .open = snd_nm256_playback_open,
904 .close = snd_nm256_playback_close,
905 .ioctl = snd_pcm_lib_ioctl,
906 .hw_params = snd_nm256_pcm_hw_params,
907 .prepare = snd_nm256_pcm_prepare,
908 .trigger = snd_nm256_playback_trigger,
909 .pointer = snd_nm256_playback_pointer,
910 #ifndef __i386__
911 .copy = snd_nm256_playback_copy,
912 .silence = snd_nm256_playback_silence,
913 #endif
914 .mmap = snd_pcm_lib_mmap_iomem,
915 };
916
917 static struct snd_pcm_ops snd_nm256_capture_ops = {
918 .open = snd_nm256_capture_open,
919 .close = snd_nm256_capture_close,
920 .ioctl = snd_pcm_lib_ioctl,
921 .hw_params = snd_nm256_pcm_hw_params,
922 .prepare = snd_nm256_pcm_prepare,
923 .trigger = snd_nm256_capture_trigger,
924 .pointer = snd_nm256_capture_pointer,
925 #ifndef __i386__
926 .copy = snd_nm256_capture_copy,
927 #endif
928 .mmap = snd_pcm_lib_mmap_iomem,
929 };
930
931 static int
932 snd_nm256_pcm(struct nm256 *chip, int device)
933 {
934 struct snd_pcm *pcm;
935 int i, err;
936
937 for (i = 0; i < 2; i++) {
938 struct nm256_stream *s = &chip->streams[i];
939 s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
940 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
941 }
942
943 err = snd_pcm_new(chip->card, chip->card->driver, device,
944 1, 1, &pcm);
945 if (err < 0)
946 return err;
947
948 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
949 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
950
951 pcm->private_data = chip;
952 pcm->info_flags = 0;
953 chip->pcm = pcm;
954
955 return 0;
956 }
957
958
959 /*
960 * Initialize the hardware.
961 */
962 static void
963 snd_nm256_init_chip(struct nm256 *chip)
964 {
965 /* Reset everything. */
966 snd_nm256_writeb(chip, 0x0, 0x11);
967 snd_nm256_writew(chip, 0x214, 0);
968 /* stop sounds.. */
969 //snd_nm256_playback_stop(chip);
970 //snd_nm256_capture_stop(chip);
971 }
972
973
974 static irqreturn_t
975 snd_nm256_intr_check(struct nm256 *chip)
976 {
977 if (chip->badintrcount++ > 1000) {
978 /*
979 * I'm not sure if the best thing is to stop the card from
980 * playing or just release the interrupt (after all, we're in
981 * a bad situation, so doing fancy stuff may not be such a good
982 * idea).
983 *
984 * I worry about the card engine continuing to play noise
985 * over and over, however--that could become a very
986 * obnoxious problem. And we know that when this usually
987 * happens things are fairly safe, it just means the user's
988 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
989 */
990 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
991 snd_nm256_playback_stop(chip);
992 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
993 snd_nm256_capture_stop(chip);
994 chip->badintrcount = 0;
995 return IRQ_HANDLED;
996 }
997 return IRQ_NONE;
998 }
999
1000 /*
1001 * Handle a potential interrupt for the device referred to by DEV_ID.
1002 *
1003 * I don't like the cut-n-paste job here either between the two routines,
1004 * but there are sufficient differences between the two interrupt handlers
1005 * that parameterizing it isn't all that great either. (Could use a macro,
1006 * I suppose...yucky bleah.)
1007 */
1008
1009 static irqreturn_t
1010 snd_nm256_interrupt(int irq, void *dev_id)
1011 {
1012 struct nm256 *chip = dev_id;
1013 u16 status;
1014 u8 cbyte;
1015
1016 status = snd_nm256_readw(chip, NM_INT_REG);
1017
1018 /* Not ours. */
1019 if (status == 0)
1020 return snd_nm256_intr_check(chip);
1021
1022 chip->badintrcount = 0;
1023
1024 /* Rather boring; check for individual interrupts and process them. */
1025
1026 spin_lock(&chip->reg_lock);
1027 if (status & NM_PLAYBACK_INT) {
1028 status &= ~NM_PLAYBACK_INT;
1029 NM_ACK_INT(chip, NM_PLAYBACK_INT);
1030 snd_nm256_playback_update(chip);
1031 }
1032
1033 if (status & NM_RECORD_INT) {
1034 status &= ~NM_RECORD_INT;
1035 NM_ACK_INT(chip, NM_RECORD_INT);
1036 snd_nm256_capture_update(chip);
1037 }
1038
1039 if (status & NM_MISC_INT_1) {
1040 status &= ~NM_MISC_INT_1;
1041 NM_ACK_INT(chip, NM_MISC_INT_1);
1042 snd_printd("NM256: Got misc interrupt #1\n");
1043 snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1044 cbyte = snd_nm256_readb(chip, 0x400);
1045 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1046 }
1047
1048 if (status & NM_MISC_INT_2) {
1049 status &= ~NM_MISC_INT_2;
1050 NM_ACK_INT(chip, NM_MISC_INT_2);
1051 snd_printd("NM256: Got misc interrupt #2\n");
1052 cbyte = snd_nm256_readb(chip, 0x400);
1053 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1054 }
1055
1056 /* Unknown interrupt. */
1057 if (status) {
1058 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1059 status);
1060 /* Pray. */
1061 NM_ACK_INT(chip, status);
1062 }
1063
1064 spin_unlock(&chip->reg_lock);
1065 return IRQ_HANDLED;
1066 }
1067
1068 /*
1069 * Handle a potential interrupt for the device referred to by DEV_ID.
1070 * This handler is for the 256ZX, and is very similar to the non-ZX
1071 * routine.
1072 */
1073
1074 static irqreturn_t
1075 snd_nm256_interrupt_zx(int irq, void *dev_id)
1076 {
1077 struct nm256 *chip = dev_id;
1078 u32 status;
1079 u8 cbyte;
1080
1081 status = snd_nm256_readl(chip, NM_INT_REG);
1082
1083 /* Not ours. */
1084 if (status == 0)
1085 return snd_nm256_intr_check(chip);
1086
1087 chip->badintrcount = 0;
1088
1089 /* Rather boring; check for individual interrupts and process them. */
1090
1091 spin_lock(&chip->reg_lock);
1092 if (status & NM2_PLAYBACK_INT) {
1093 status &= ~NM2_PLAYBACK_INT;
1094 NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1095 snd_nm256_playback_update(chip);
1096 }
1097
1098 if (status & NM2_RECORD_INT) {
1099 status &= ~NM2_RECORD_INT;
1100 NM2_ACK_INT(chip, NM2_RECORD_INT);
1101 snd_nm256_capture_update(chip);
1102 }
1103
1104 if (status & NM2_MISC_INT_1) {
1105 status &= ~NM2_MISC_INT_1;
1106 NM2_ACK_INT(chip, NM2_MISC_INT_1);
1107 snd_printd("NM256: Got misc interrupt #1\n");
1108 cbyte = snd_nm256_readb(chip, 0x400);
1109 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1110 }
1111
1112 if (status & NM2_MISC_INT_2) {
1113 status &= ~NM2_MISC_INT_2;
1114 NM2_ACK_INT(chip, NM2_MISC_INT_2);
1115 snd_printd("NM256: Got misc interrupt #2\n");
1116 cbyte = snd_nm256_readb(chip, 0x400);
1117 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1118 }
1119
1120 /* Unknown interrupt. */
1121 if (status) {
1122 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1123 status);
1124 /* Pray. */
1125 NM2_ACK_INT(chip, status);
1126 }
1127
1128 spin_unlock(&chip->reg_lock);
1129 return IRQ_HANDLED;
1130 }
1131
1132 /*
1133 * AC97 interface
1134 */
1135
1136 /*
1137 * Waits for the mixer to become ready to be written; returns a zero value
1138 * if it timed out.
1139 */
1140 static int
1141 snd_nm256_ac97_ready(struct nm256 *chip)
1142 {
1143 int timeout = 10;
1144 u32 testaddr;
1145 u16 testb;
1146
1147 testaddr = chip->mixer_status_offset;
1148 testb = chip->mixer_status_mask;
1149
1150 /*
1151 * Loop around waiting for the mixer to become ready.
1152 */
1153 while (timeout-- > 0) {
1154 if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1155 return 1;
1156 udelay(100);
1157 }
1158 return 0;
1159 }
1160
1161 /*
1162 * Initial register values to be written to the AC97 mixer.
1163 * While most of these are identical to the reset values, we do this
1164 * so that we have most of the register contents cached--this avoids
1165 * reading from the mixer directly (which seems to be problematic,
1166 * probably due to ignorance).
1167 */
1168
1169 struct initialValues {
1170 unsigned short reg;
1171 unsigned short value;
1172 };
1173
1174 static struct initialValues nm256_ac97_init_val[] =
1175 {
1176 { AC97_MASTER, 0x8000 },
1177 { AC97_HEADPHONE, 0x8000 },
1178 { AC97_MASTER_MONO, 0x8000 },
1179 { AC97_PC_BEEP, 0x8000 },
1180 { AC97_PHONE, 0x8008 },
1181 { AC97_MIC, 0x8000 },
1182 { AC97_LINE, 0x8808 },
1183 { AC97_CD, 0x8808 },
1184 { AC97_VIDEO, 0x8808 },
1185 { AC97_AUX, 0x8808 },
1186 { AC97_PCM, 0x8808 },
1187 { AC97_REC_SEL, 0x0000 },
1188 { AC97_REC_GAIN, 0x0B0B },
1189 { AC97_GENERAL_PURPOSE, 0x0000 },
1190 { AC97_3D_CONTROL, 0x8000 },
1191 { AC97_VENDOR_ID1, 0x8384 },
1192 { AC97_VENDOR_ID2, 0x7609 },
1193 };
1194
1195 static int nm256_ac97_idx(unsigned short reg)
1196 {
1197 int i;
1198 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1199 if (nm256_ac97_init_val[i].reg == reg)
1200 return i;
1201 return -1;
1202 }
1203
1204 /*
1205 * some nm256 easily crash when reading from mixer registers
1206 * thus we're treating it as a write-only mixer and cache the
1207 * written values
1208 */
1209 static unsigned short
1210 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1211 {
1212 struct nm256 *chip = ac97->private_data;
1213 int idx = nm256_ac97_idx(reg);
1214
1215 if (idx < 0)
1216 return 0;
1217 return chip->ac97_regs[idx];
1218 }
1219
1220 /*
1221 */
1222 static void
1223 snd_nm256_ac97_write(struct snd_ac97 *ac97,
1224 unsigned short reg, unsigned short val)
1225 {
1226 struct nm256 *chip = ac97->private_data;
1227 int tries = 2;
1228 int idx = nm256_ac97_idx(reg);
1229 u32 base;
1230
1231 if (idx < 0)
1232 return;
1233
1234 base = chip->mixer_base;
1235
1236 snd_nm256_ac97_ready(chip);
1237
1238 /* Wait for the write to take, too. */
1239 while (tries-- > 0) {
1240 snd_nm256_writew(chip, base + reg, val);
1241 msleep(1); /* a little delay here seems better.. */
1242 if (snd_nm256_ac97_ready(chip)) {
1243 /* successful write: set cache */
1244 chip->ac97_regs[idx] = val;
1245 return;
1246 }
1247 }
1248 snd_printd("nm256: ac97 codec not ready..\n");
1249 }
1250
1251 /* static resolution table */
1252 static struct snd_ac97_res_table nm256_res_table[] = {
1253 { AC97_MASTER, 0x1f1f },
1254 { AC97_HEADPHONE, 0x1f1f },
1255 { AC97_MASTER_MONO, 0x001f },
1256 { AC97_PC_BEEP, 0x001f },
1257 { AC97_PHONE, 0x001f },
1258 { AC97_MIC, 0x001f },
1259 { AC97_LINE, 0x1f1f },
1260 { AC97_CD, 0x1f1f },
1261 { AC97_VIDEO, 0x1f1f },
1262 { AC97_AUX, 0x1f1f },
1263 { AC97_PCM, 0x1f1f },
1264 { AC97_REC_GAIN, 0x0f0f },
1265 { } /* terminator */
1266 };
1267
1268 /* initialize the ac97 into a known state */
1269 static void
1270 snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1271 {
1272 struct nm256 *chip = ac97->private_data;
1273
1274 /* Reset the mixer. 'Tis magic! */
1275 snd_nm256_writeb(chip, 0x6c0, 1);
1276 if (! chip->reset_workaround) {
1277 /* Dell latitude LS will lock up by this */
1278 snd_nm256_writeb(chip, 0x6cc, 0x87);
1279 }
1280 if (! chip->reset_workaround_2) {
1281 /* Dell latitude CSx will lock up by this */
1282 snd_nm256_writeb(chip, 0x6cc, 0x80);
1283 snd_nm256_writeb(chip, 0x6cc, 0x0);
1284 }
1285 if (! chip->in_resume) {
1286 int i;
1287 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1288 /* preload the cache, so as to avoid even a single
1289 * read of the mixer regs
1290 */
1291 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1292 nm256_ac97_init_val[i].value);
1293 }
1294 }
1295 }
1296
1297 /* create an ac97 mixer interface */
1298 static int
1299 snd_nm256_mixer(struct nm256 *chip)
1300 {
1301 struct snd_ac97_bus *pbus;
1302 struct snd_ac97_template ac97;
1303 int err;
1304 static struct snd_ac97_bus_ops ops = {
1305 .reset = snd_nm256_ac97_reset,
1306 .write = snd_nm256_ac97_write,
1307 .read = snd_nm256_ac97_read,
1308 };
1309
1310 chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val),
1311 sizeof(short), GFP_KERNEL);
1312 if (! chip->ac97_regs)
1313 return -ENOMEM;
1314
1315 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1316 return err;
1317
1318 memset(&ac97, 0, sizeof(ac97));
1319 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1320 ac97.private_data = chip;
1321 ac97.res_table = nm256_res_table;
1322 pbus->no_vra = 1;
1323 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1324 if (err < 0)
1325 return err;
1326 if (! (chip->ac97->id & (0xf0000000))) {
1327 /* looks like an invalid id */
1328 sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1329 }
1330 return 0;
1331 }
1332
1333 /*
1334 * See if the signature left by the NM256 BIOS is intact; if so, we use
1335 * the associated address as the end of our audio buffer in the video
1336 * RAM.
1337 */
1338
1339 static int
1340 snd_nm256_peek_for_sig(struct nm256 *chip)
1341 {
1342 /* The signature is located 1K below the end of video RAM. */
1343 void __iomem *temp;
1344 /* Default buffer end is 5120 bytes below the top of RAM. */
1345 unsigned long pointer_found = chip->buffer_end - 0x1400;
1346 u32 sig;
1347
1348 temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1349 if (temp == NULL) {
1350 snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
1351 return -EBUSY;
1352 }
1353
1354 sig = readl(temp);
1355 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1356 u32 pointer = readl(temp + 4);
1357
1358 /*
1359 * If it's obviously invalid, don't use it
1360 */
1361 if (pointer == 0xffffffff ||
1362 pointer < chip->buffer_size ||
1363 pointer > chip->buffer_end) {
1364 snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
1365 iounmap(temp);
1366 return -ENODEV;
1367 } else {
1368 pointer_found = pointer;
1369 printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
1370 pointer);
1371 }
1372 }
1373
1374 iounmap(temp);
1375 chip->buffer_end = pointer_found;
1376
1377 return 0;
1378 }
1379
1380 #ifdef CONFIG_PM_SLEEP
1381 /*
1382 * APM event handler, so the card is properly reinitialized after a power
1383 * event.
1384 */
1385 static int nm256_suspend(struct device *dev)
1386 {
1387 struct pci_dev *pci = to_pci_dev(dev);
1388 struct snd_card *card = dev_get_drvdata(dev);
1389 struct nm256 *chip = card->private_data;
1390
1391 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1392 snd_pcm_suspend_all(chip->pcm);
1393 snd_ac97_suspend(chip->ac97);
1394 chip->coeffs_current = 0;
1395 pci_disable_device(pci);
1396 pci_save_state(pci);
1397 pci_set_power_state(pci, PCI_D3hot);
1398 return 0;
1399 }
1400
1401 static int nm256_resume(struct device *dev)
1402 {
1403 struct pci_dev *pci = to_pci_dev(dev);
1404 struct snd_card *card = dev_get_drvdata(dev);
1405 struct nm256 *chip = card->private_data;
1406 int i;
1407
1408 /* Perform a full reset on the hardware */
1409 chip->in_resume = 1;
1410
1411 pci_set_power_state(pci, PCI_D0);
1412 pci_restore_state(pci);
1413 if (pci_enable_device(pci) < 0) {
1414 printk(KERN_ERR "nm256: pci_enable_device failed, "
1415 "disabling device\n");
1416 snd_card_disconnect(card);
1417 return -EIO;
1418 }
1419 pci_set_master(pci);
1420
1421 snd_nm256_init_chip(chip);
1422
1423 /* restore ac97 */
1424 snd_ac97_resume(chip->ac97);
1425
1426 for (i = 0; i < 2; i++) {
1427 struct nm256_stream *s = &chip->streams[i];
1428 if (s->substream && s->suspended) {
1429 spin_lock_irq(&chip->reg_lock);
1430 snd_nm256_set_format(chip, s, s->substream);
1431 spin_unlock_irq(&chip->reg_lock);
1432 }
1433 }
1434
1435 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1436 chip->in_resume = 0;
1437 return 0;
1438 }
1439
1440 static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);
1441 #define NM256_PM_OPS &nm256_pm
1442 #else
1443 #define NM256_PM_OPS NULL
1444 #endif /* CONFIG_PM_SLEEP */
1445
1446 static int snd_nm256_free(struct nm256 *chip)
1447 {
1448 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1449 snd_nm256_playback_stop(chip);
1450 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1451 snd_nm256_capture_stop(chip);
1452
1453 if (chip->irq >= 0)
1454 free_irq(chip->irq, chip);
1455
1456 if (chip->cport)
1457 iounmap(chip->cport);
1458 if (chip->buffer)
1459 iounmap(chip->buffer);
1460 release_and_free_resource(chip->res_cport);
1461 release_and_free_resource(chip->res_buffer);
1462
1463 pci_disable_device(chip->pci);
1464 kfree(chip->ac97_regs);
1465 kfree(chip);
1466 return 0;
1467 }
1468
1469 static int snd_nm256_dev_free(struct snd_device *device)
1470 {
1471 struct nm256 *chip = device->device_data;
1472 return snd_nm256_free(chip);
1473 }
1474
1475 static int
1476 snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
1477 struct nm256 **chip_ret)
1478 {
1479 struct nm256 *chip;
1480 int err, pval;
1481 static struct snd_device_ops ops = {
1482 .dev_free = snd_nm256_dev_free,
1483 };
1484 u32 addr;
1485
1486 *chip_ret = NULL;
1487
1488 if ((err = pci_enable_device(pci)) < 0)
1489 return err;
1490
1491 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1492 if (chip == NULL) {
1493 pci_disable_device(pci);
1494 return -ENOMEM;
1495 }
1496
1497 chip->card = card;
1498 chip->pci = pci;
1499 chip->use_cache = use_cache;
1500 spin_lock_init(&chip->reg_lock);
1501 chip->irq = -1;
1502 mutex_init(&chip->irq_mutex);
1503
1504 /* store buffer sizes in bytes */
1505 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1506 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1507
1508 /*
1509 * The NM256 has two memory ports. The first port is nothing
1510 * more than a chunk of video RAM, which is used as the I/O ring
1511 * buffer. The second port has the actual juicy stuff (like the
1512 * mixer and the playback engine control registers).
1513 */
1514
1515 chip->buffer_addr = pci_resource_start(pci, 0);
1516 chip->cport_addr = pci_resource_start(pci, 1);
1517
1518 /* Init the memory port info. */
1519 /* remap control port (#2) */
1520 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
1521 card->driver);
1522 if (chip->res_cport == NULL) {
1523 snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
1524 chip->cport_addr, NM_PORT2_SIZE);
1525 err = -EBUSY;
1526 goto __error;
1527 }
1528 chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
1529 if (chip->cport == NULL) {
1530 snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
1531 err = -ENOMEM;
1532 goto __error;
1533 }
1534
1535 if (!strcmp(card->driver, "NM256AV")) {
1536 /* Ok, try to see if this is a non-AC97 version of the hardware. */
1537 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1538 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1539 if (! force_ac97) {
1540 printk(KERN_ERR "nm256: no ac97 is found!\n");
1541 printk(KERN_ERR " force the driver to load by "
1542 "passing in the module parameter\n");
1543 printk(KERN_ERR " force_ac97=1\n");
1544 printk(KERN_ERR " or try sb16, opl3sa2, or "
1545 "cs423x drivers instead.\n");
1546 err = -ENXIO;
1547 goto __error;
1548 }
1549 }
1550 chip->buffer_end = 2560 * 1024;
1551 chip->interrupt = snd_nm256_interrupt;
1552 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1553 chip->mixer_status_mask = NM_MIXER_READY_MASK;
1554 } else {
1555 /* Not sure if there is any relevant detect for the ZX or not. */
1556 if (snd_nm256_readb(chip, 0xa0b) != 0)
1557 chip->buffer_end = 6144 * 1024;
1558 else
1559 chip->buffer_end = 4096 * 1024;
1560
1561 chip->interrupt = snd_nm256_interrupt_zx;
1562 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1563 chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1564 }
1565
1566 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1567 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1568 if (chip->use_cache)
1569 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1570 else
1571 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1572
1573 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1574 chip->buffer_end = buffer_top;
1575 else {
1576 /* get buffer end pointer from signature */
1577 if ((err = snd_nm256_peek_for_sig(chip)) < 0)
1578 goto __error;
1579 }
1580
1581 chip->buffer_start = chip->buffer_end - chip->buffer_size;
1582 chip->buffer_addr += chip->buffer_start;
1583
1584 printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
1585 chip->buffer_start, chip->buffer_end);
1586
1587 chip->res_buffer = request_mem_region(chip->buffer_addr,
1588 chip->buffer_size,
1589 card->driver);
1590 if (chip->res_buffer == NULL) {
1591 snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
1592 chip->buffer_addr, chip->buffer_size);
1593 err = -EBUSY;
1594 goto __error;
1595 }
1596 chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
1597 if (chip->buffer == NULL) {
1598 err = -ENOMEM;
1599 snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
1600 goto __error;
1601 }
1602
1603 /* set offsets */
1604 addr = chip->buffer_start;
1605 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1606 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1607 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1608 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1609 if (chip->use_cache) {
1610 chip->all_coeff_buf = addr;
1611 } else {
1612 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1613 addr += NM_MAX_PLAYBACK_COEF_SIZE;
1614 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1615 }
1616
1617 /* Fixed setting. */
1618 chip->mixer_base = NM_MIXER_OFFSET;
1619
1620 chip->coeffs_current = 0;
1621
1622 snd_nm256_init_chip(chip);
1623
1624 // pci_set_master(pci); /* needed? */
1625
1626 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
1627 goto __error;
1628
1629 snd_card_set_dev(card, &pci->dev);
1630
1631 *chip_ret = chip;
1632 return 0;
1633
1634 __error:
1635 snd_nm256_free(chip);
1636 return err;
1637 }
1638
1639
1640 enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1641
1642 static struct snd_pci_quirk nm256_quirks[] = {
1643 /* HP omnibook 4150 has cs4232 codec internally */
1644 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED),
1645 /* Reset workarounds to avoid lock-ups */
1646 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1647 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1648 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1649 { } /* terminator */
1650 };
1651
1652
1653 static int snd_nm256_probe(struct pci_dev *pci,
1654 const struct pci_device_id *pci_id)
1655 {
1656 struct snd_card *card;
1657 struct nm256 *chip;
1658 int err;
1659 const struct snd_pci_quirk *q;
1660
1661 q = snd_pci_quirk_lookup(pci, nm256_quirks);
1662 if (q) {
1663 snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name);
1664 switch (q->value) {
1665 case NM_BLACKLISTED:
1666 printk(KERN_INFO "nm256: The device is blacklisted. "
1667 "Loading stopped\n");
1668 return -ENODEV;
1669 case NM_RESET_WORKAROUND_2:
1670 reset_workaround_2 = 1;
1671 /* Fall-through */
1672 case NM_RESET_WORKAROUND:
1673 reset_workaround = 1;
1674 break;
1675 }
1676 }
1677
1678 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
1679 if (err < 0)
1680 return err;
1681
1682 switch (pci->device) {
1683 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1684 strcpy(card->driver, "NM256AV");
1685 break;
1686 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1687 strcpy(card->driver, "NM256ZX");
1688 break;
1689 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1690 strcpy(card->driver, "NM256XL+");
1691 break;
1692 default:
1693 snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
1694 snd_card_free(card);
1695 return -EINVAL;
1696 }
1697
1698 if (vaio_hack)
1699 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
1700
1701 if (playback_bufsize < 4)
1702 playback_bufsize = 4;
1703 if (playback_bufsize > 128)
1704 playback_bufsize = 128;
1705 if (capture_bufsize < 4)
1706 capture_bufsize = 4;
1707 if (capture_bufsize > 128)
1708 capture_bufsize = 128;
1709 if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
1710 snd_card_free(card);
1711 return err;
1712 }
1713 card->private_data = chip;
1714
1715 if (reset_workaround) {
1716 snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
1717 chip->reset_workaround = 1;
1718 }
1719
1720 if (reset_workaround_2) {
1721 snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
1722 chip->reset_workaround_2 = 1;
1723 }
1724
1725 if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
1726 (err = snd_nm256_mixer(chip)) < 0) {
1727 snd_card_free(card);
1728 return err;
1729 }
1730
1731 sprintf(card->shortname, "NeoMagic %s", card->driver);
1732 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1733 card->shortname,
1734 chip->buffer_addr, chip->cport_addr, chip->irq);
1735
1736 if ((err = snd_card_register(card)) < 0) {
1737 snd_card_free(card);
1738 return err;
1739 }
1740
1741 pci_set_drvdata(pci, card);
1742 return 0;
1743 }
1744
1745 static void snd_nm256_remove(struct pci_dev *pci)
1746 {
1747 snd_card_free(pci_get_drvdata(pci));
1748 pci_set_drvdata(pci, NULL);
1749 }
1750
1751
1752 static struct pci_driver nm256_driver = {
1753 .name = KBUILD_MODNAME,
1754 .id_table = snd_nm256_ids,
1755 .probe = snd_nm256_probe,
1756 .remove = snd_nm256_remove,
1757 .driver = {
1758 .pm = NM256_PM_OPS,
1759 },
1760 };
1761
1762 module_pci_driver(nm256_driver);
CRIS linux kernel tree