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Linux 3.8-rc7
[cris-mirror.git] / sound / pci / ymfpci / ymfpci_main.c
blob22056c50fe39fde10184856c33e14d20bf1743a1
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21 #include <linux/delay.h>
22 #include <linux/firmware.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <linux/mutex.h>
29 #include <linux/module.h>
30
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/tlv.h>
35 #include "ymfpci.h"
36 #include <sound/asoundef.h>
37 #include <sound/mpu401.h>
38
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41
42 /*
43 * common I/O routines
44 */
45
46 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
47
48 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
49 {
50 return readb(chip->reg_area_virt + offset);
51 }
52
53 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
54 {
55 writeb(val, chip->reg_area_virt + offset);
56 }
57
58 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
59 {
60 return readw(chip->reg_area_virt + offset);
61 }
62
63 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
64 {
65 writew(val, chip->reg_area_virt + offset);
66 }
67
68 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
69 {
70 return readl(chip->reg_area_virt + offset);
71 }
72
73 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
74 {
75 writel(val, chip->reg_area_virt + offset);
76 }
77
78 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
79 {
80 unsigned long end_time;
81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
82
83 end_time = jiffies + msecs_to_jiffies(750);
84 do {
85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
86 return 0;
87 schedule_timeout_uninterruptible(1);
88 } while (time_before(jiffies, end_time));
89 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
90 return -EBUSY;
91 }
92
93 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
94 {
95 struct snd_ymfpci *chip = ac97->private_data;
96 u32 cmd;
97
98 snd_ymfpci_codec_ready(chip, 0);
99 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
100 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
101 }
102
103 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
104 {
105 struct snd_ymfpci *chip = ac97->private_data;
106
107 if (snd_ymfpci_codec_ready(chip, 0))
108 return ~0;
109 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
110 if (snd_ymfpci_codec_ready(chip, 0))
111 return ~0;
112 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
113 int i;
114 for (i = 0; i < 600; i++)
115 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
116 }
117 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
118 }
119
120 /*
121 * Misc routines
122 */
123
124 static u32 snd_ymfpci_calc_delta(u32 rate)
125 {
126 switch (rate) {
127 case 8000: return 0x02aaab00;
128 case 11025: return 0x03accd00;
129 case 16000: return 0x05555500;
130 case 22050: return 0x07599a00;
131 case 32000: return 0x0aaaab00;
132 case 44100: return 0x0eb33300;
133 default: return ((rate << 16) / 375) << 5;
134 }
135 }
136
137 static u32 def_rate[8] = {
138 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
139 };
140
141 static u32 snd_ymfpci_calc_lpfK(u32 rate)
142 {
143 u32 i;
144 static u32 val[8] = {
145 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
146 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
147 };
148
149 if (rate == 44100)
150 return 0x40000000; /* FIXME: What's the right value? */
151 for (i = 0; i < 8; i++)
152 if (rate <= def_rate[i])
153 return val[i];
154 return val[0];
155 }
156
157 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
158 {
159 u32 i;
160 static u32 val[8] = {
161 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
162 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
163 };
164
165 if (rate == 44100)
166 return 0x370A0000;
167 for (i = 0; i < 8; i++)
168 if (rate <= def_rate[i])
169 return val[i];
170 return val[0];
171 }
172
173 /*
174 * Hardware start management
175 */
176
177 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
178 {
179 unsigned long flags;
180
181 spin_lock_irqsave(&chip->reg_lock, flags);
182 if (chip->start_count++ > 0)
183 goto __end;
184 snd_ymfpci_writel(chip, YDSXGR_MODE,
185 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
186 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
187 __end:
188 spin_unlock_irqrestore(&chip->reg_lock, flags);
189 }
190
191 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
192 {
193 unsigned long flags;
194 long timeout = 1000;
195
196 spin_lock_irqsave(&chip->reg_lock, flags);
197 if (--chip->start_count > 0)
198 goto __end;
199 snd_ymfpci_writel(chip, YDSXGR_MODE,
200 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
201 while (timeout-- > 0) {
202 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
203 break;
204 }
205 if (atomic_read(&chip->interrupt_sleep_count)) {
206 atomic_set(&chip->interrupt_sleep_count, 0);
207 wake_up(&chip->interrupt_sleep);
208 }
209 __end:
210 spin_unlock_irqrestore(&chip->reg_lock, flags);
211 }
212
213 /*
214 * Playback voice management
215 */
216
217 static int voice_alloc(struct snd_ymfpci *chip,
218 enum snd_ymfpci_voice_type type, int pair,
219 struct snd_ymfpci_voice **rvoice)
220 {
221 struct snd_ymfpci_voice *voice, *voice2;
222 int idx;
223
224 *rvoice = NULL;
225 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
226 voice = &chip->voices[idx];
227 voice2 = pair ? &chip->voices[idx+1] : NULL;
228 if (voice->use || (voice2 && voice2->use))
229 continue;
230 voice->use = 1;
231 if (voice2)
232 voice2->use = 1;
233 switch (type) {
234 case YMFPCI_PCM:
235 voice->pcm = 1;
236 if (voice2)
237 voice2->pcm = 1;
238 break;
239 case YMFPCI_SYNTH:
240 voice->synth = 1;
241 break;
242 case YMFPCI_MIDI:
243 voice->midi = 1;
244 break;
245 }
246 snd_ymfpci_hw_start(chip);
247 if (voice2)
248 snd_ymfpci_hw_start(chip);
249 *rvoice = voice;
250 return 0;
251 }
252 return -ENOMEM;
253 }
254
255 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
256 enum snd_ymfpci_voice_type type, int pair,
257 struct snd_ymfpci_voice **rvoice)
258 {
259 unsigned long flags;
260 int result;
261
262 if (snd_BUG_ON(!rvoice))
263 return -EINVAL;
264 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
265 return -EINVAL;
266
267 spin_lock_irqsave(&chip->voice_lock, flags);
268 for (;;) {
269 result = voice_alloc(chip, type, pair, rvoice);
270 if (result == 0 || type != YMFPCI_PCM)
271 break;
272 /* TODO: synth/midi voice deallocation */
273 break;
274 }
275 spin_unlock_irqrestore(&chip->voice_lock, flags);
276 return result;
277 }
278
279 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
280 {
281 unsigned long flags;
282
283 if (snd_BUG_ON(!pvoice))
284 return -EINVAL;
285 snd_ymfpci_hw_stop(chip);
286 spin_lock_irqsave(&chip->voice_lock, flags);
287 if (pvoice->number == chip->src441_used) {
288 chip->src441_used = -1;
289 pvoice->ypcm->use_441_slot = 0;
290 }
291 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
292 pvoice->ypcm = NULL;
293 pvoice->interrupt = NULL;
294 spin_unlock_irqrestore(&chip->voice_lock, flags);
295 return 0;
296 }
297
298 /*
299 * PCM part
300 */
301
302 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
303 {
304 struct snd_ymfpci_pcm *ypcm;
305 u32 pos, delta;
306
307 if ((ypcm = voice->ypcm) == NULL)
308 return;
309 if (ypcm->substream == NULL)
310 return;
311 spin_lock(&chip->reg_lock);
312 if (ypcm->running) {
313 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
314 if (pos < ypcm->last_pos)
315 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
316 else
317 delta = pos - ypcm->last_pos;
318 ypcm->period_pos += delta;
319 ypcm->last_pos = pos;
320 if (ypcm->period_pos >= ypcm->period_size) {
321 /*
322 printk(KERN_DEBUG
323 "done - active_bank = 0x%x, start = 0x%x\n",
324 chip->active_bank,
325 voice->bank[chip->active_bank].start);
326 */
327 ypcm->period_pos %= ypcm->period_size;
328 spin_unlock(&chip->reg_lock);
329 snd_pcm_period_elapsed(ypcm->substream);
330 spin_lock(&chip->reg_lock);
331 }
332
333 if (unlikely(ypcm->update_pcm_vol)) {
334 unsigned int subs = ypcm->substream->number;
335 unsigned int next_bank = 1 - chip->active_bank;
336 struct snd_ymfpci_playback_bank *bank;
337 u32 volume;
338
339 bank = &voice->bank[next_bank];
340 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
341 bank->left_gain_end = volume;
342 if (ypcm->output_rear)
343 bank->eff2_gain_end = volume;
344 if (ypcm->voices[1])
345 bank = &ypcm->voices[1]->bank[next_bank];
346 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
347 bank->right_gain_end = volume;
348 if (ypcm->output_rear)
349 bank->eff3_gain_end = volume;
350 ypcm->update_pcm_vol--;
351 }
352 }
353 spin_unlock(&chip->reg_lock);
354 }
355
356 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
357 {
358 struct snd_pcm_runtime *runtime = substream->runtime;
359 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
360 struct snd_ymfpci *chip = ypcm->chip;
361 u32 pos, delta;
362
363 spin_lock(&chip->reg_lock);
364 if (ypcm->running) {
365 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
366 if (pos < ypcm->last_pos)
367 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
368 else
369 delta = pos - ypcm->last_pos;
370 ypcm->period_pos += delta;
371 ypcm->last_pos = pos;
372 if (ypcm->period_pos >= ypcm->period_size) {
373 ypcm->period_pos %= ypcm->period_size;
374 /*
375 printk(KERN_DEBUG
376 "done - active_bank = 0x%x, start = 0x%x\n",
377 chip->active_bank,
378 voice->bank[chip->active_bank].start);
379 */
380 spin_unlock(&chip->reg_lock);
381 snd_pcm_period_elapsed(substream);
382 spin_lock(&chip->reg_lock);
383 }
384 }
385 spin_unlock(&chip->reg_lock);
386 }
387
388 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
389 int cmd)
390 {
391 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
392 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
393 struct snd_kcontrol *kctl = NULL;
394 int result = 0;
395
396 spin_lock(&chip->reg_lock);
397 if (ypcm->voices[0] == NULL) {
398 result = -EINVAL;
399 goto __unlock;
400 }
401 switch (cmd) {
402 case SNDRV_PCM_TRIGGER_START:
403 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
404 case SNDRV_PCM_TRIGGER_RESUME:
405 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
406 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
407 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
408 ypcm->running = 1;
409 break;
410 case SNDRV_PCM_TRIGGER_STOP:
411 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
412 kctl = chip->pcm_mixer[substream->number].ctl;
413 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
414 }
415 /* fall through */
416 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
417 case SNDRV_PCM_TRIGGER_SUSPEND:
418 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
419 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
420 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
421 ypcm->running = 0;
422 break;
423 default:
424 result = -EINVAL;
425 break;
426 }
427 __unlock:
428 spin_unlock(&chip->reg_lock);
429 if (kctl)
430 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
431 return result;
432 }
433 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
434 int cmd)
435 {
436 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
437 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
438 int result = 0;
439 u32 tmp;
440
441 spin_lock(&chip->reg_lock);
442 switch (cmd) {
443 case SNDRV_PCM_TRIGGER_START:
444 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
445 case SNDRV_PCM_TRIGGER_RESUME:
446 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
447 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
448 ypcm->running = 1;
449 break;
450 case SNDRV_PCM_TRIGGER_STOP:
451 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
452 case SNDRV_PCM_TRIGGER_SUSPEND:
453 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
454 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
455 ypcm->running = 0;
456 break;
457 default:
458 result = -EINVAL;
459 break;
460 }
461 spin_unlock(&chip->reg_lock);
462 return result;
463 }
464
465 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
466 {
467 int err;
468
469 if (ypcm->voices[1] != NULL && voices < 2) {
470 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
471 ypcm->voices[1] = NULL;
472 }
473 if (voices == 1 && ypcm->voices[0] != NULL)
474 return 0; /* already allocated */
475 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
476 return 0; /* already allocated */
477 if (voices > 1) {
478 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
479 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
480 ypcm->voices[0] = NULL;
481 }
482 }
483 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
484 if (err < 0)
485 return err;
486 ypcm->voices[0]->ypcm = ypcm;
487 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
488 if (voices > 1) {
489 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
490 ypcm->voices[1]->ypcm = ypcm;
491 }
492 return 0;
493 }
494
495 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
496 struct snd_pcm_runtime *runtime,
497 int has_pcm_volume)
498 {
499 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
500 u32 format;
501 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
502 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
503 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
504 struct snd_ymfpci_playback_bank *bank;
505 unsigned int nbank;
506 u32 vol_left, vol_right;
507 u8 use_left, use_right;
508 unsigned long flags;
509
510 if (snd_BUG_ON(!voice))
511 return;
512 if (runtime->channels == 1) {
513 use_left = 1;
514 use_right = 1;
515 } else {
516 use_left = (voiceidx & 1) == 0;
517 use_right = !use_left;
518 }
519 if (has_pcm_volume) {
520 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
521 [ypcm->substream->number].left << 15);
522 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
523 [ypcm->substream->number].right << 15);
524 } else {
525 vol_left = cpu_to_le32(0x40000000);
526 vol_right = cpu_to_le32(0x40000000);
527 }
528 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
529 format = runtime->channels == 2 ? 0x00010000 : 0;
530 if (snd_pcm_format_width(runtime->format) == 8)
531 format |= 0x80000000;
532 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
533 runtime->rate == 44100 && runtime->channels == 2 &&
534 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
535 ypcm->chip->src441_used == voice->number)) {
536 ypcm->chip->src441_used = voice->number;
537 ypcm->use_441_slot = 1;
538 format |= 0x10000000;
539 }
540 if (ypcm->chip->src441_used == voice->number &&
541 (format & 0x10000000) == 0) {
542 ypcm->chip->src441_used = -1;
543 ypcm->use_441_slot = 0;
544 }
545 if (runtime->channels == 2 && (voiceidx & 1) != 0)
546 format |= 1;
547 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
548 for (nbank = 0; nbank < 2; nbank++) {
549 bank = &voice->bank[nbank];
550 memset(bank, 0, sizeof(*bank));
551 bank->format = cpu_to_le32(format);
552 bank->base = cpu_to_le32(runtime->dma_addr);
553 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
554 bank->lpfQ = cpu_to_le32(lpfQ);
555 bank->delta =
556 bank->delta_end = cpu_to_le32(delta);
557 bank->lpfK =
558 bank->lpfK_end = cpu_to_le32(lpfK);
559 bank->eg_gain =
560 bank->eg_gain_end = cpu_to_le32(0x40000000);
561
562 if (ypcm->output_front) {
563 if (use_left) {
564 bank->left_gain =
565 bank->left_gain_end = vol_left;
566 }
567 if (use_right) {
568 bank->right_gain =
569 bank->right_gain_end = vol_right;
570 }
571 }
572 if (ypcm->output_rear) {
573 if (!ypcm->swap_rear) {
574 if (use_left) {
575 bank->eff2_gain =
576 bank->eff2_gain_end = vol_left;
577 }
578 if (use_right) {
579 bank->eff3_gain =
580 bank->eff3_gain_end = vol_right;
581 }
582 } else {
583 /* The SPDIF out channels seem to be swapped, so we have
584 * to swap them here, too. The rear analog out channels
585 * will be wrong, but otherwise AC3 would not work.
586 */
587 if (use_left) {
588 bank->eff3_gain =
589 bank->eff3_gain_end = vol_left;
590 }
591 if (use_right) {
592 bank->eff2_gain =
593 bank->eff2_gain_end = vol_right;
594 }
595 }
596 }
597 }
598 }
599
600 static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
601 {
602 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
603 4096, &chip->ac3_tmp_base) < 0)
604 return -ENOMEM;
605
606 chip->bank_effect[3][0]->base =
607 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
608 chip->bank_effect[3][0]->loop_end =
609 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
610 chip->bank_effect[4][0]->base =
611 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
612 chip->bank_effect[4][0]->loop_end =
613 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
614
615 spin_lock_irq(&chip->reg_lock);
616 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
617 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
618 spin_unlock_irq(&chip->reg_lock);
619 return 0;
620 }
621
622 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
623 {
624 spin_lock_irq(&chip->reg_lock);
625 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
626 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
627 spin_unlock_irq(&chip->reg_lock);
628 // snd_ymfpci_irq_wait(chip);
629 if (chip->ac3_tmp_base.area) {
630 snd_dma_free_pages(&chip->ac3_tmp_base);
631 chip->ac3_tmp_base.area = NULL;
632 }
633 return 0;
634 }
635
636 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
637 struct snd_pcm_hw_params *hw_params)
638 {
639 struct snd_pcm_runtime *runtime = substream->runtime;
640 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
641 int err;
642
643 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
644 return err;
645 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
646 return err;
647 return 0;
648 }
649
650 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
651 {
652 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
653 struct snd_pcm_runtime *runtime = substream->runtime;
654 struct snd_ymfpci_pcm *ypcm;
655
656 if (runtime->private_data == NULL)
657 return 0;
658 ypcm = runtime->private_data;
659
660 /* wait, until the PCI operations are not finished */
661 snd_ymfpci_irq_wait(chip);
662 snd_pcm_lib_free_pages(substream);
663 if (ypcm->voices[1]) {
664 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
665 ypcm->voices[1] = NULL;
666 }
667 if (ypcm->voices[0]) {
668 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
669 ypcm->voices[0] = NULL;
670 }
671 return 0;
672 }
673
674 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
675 {
676 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
677 struct snd_pcm_runtime *runtime = substream->runtime;
678 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
679 struct snd_kcontrol *kctl;
680 unsigned int nvoice;
681
682 ypcm->period_size = runtime->period_size;
683 ypcm->buffer_size = runtime->buffer_size;
684 ypcm->period_pos = 0;
685 ypcm->last_pos = 0;
686 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
687 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
688 substream->pcm == chip->pcm);
689
690 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
691 kctl = chip->pcm_mixer[substream->number].ctl;
692 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
693 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
694 }
695 return 0;
696 }
697
698 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
699 struct snd_pcm_hw_params *hw_params)
700 {
701 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
702 }
703
704 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
705 {
706 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
707
708 /* wait, until the PCI operations are not finished */
709 snd_ymfpci_irq_wait(chip);
710 return snd_pcm_lib_free_pages(substream);
711 }
712
713 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
714 {
715 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
716 struct snd_pcm_runtime *runtime = substream->runtime;
717 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
718 struct snd_ymfpci_capture_bank * bank;
719 int nbank;
720 u32 rate, format;
721
722 ypcm->period_size = runtime->period_size;
723 ypcm->buffer_size = runtime->buffer_size;
724 ypcm->period_pos = 0;
725 ypcm->last_pos = 0;
726 ypcm->shift = 0;
727 rate = ((48000 * 4096) / runtime->rate) - 1;
728 format = 0;
729 if (runtime->channels == 2) {
730 format |= 2;
731 ypcm->shift++;
732 }
733 if (snd_pcm_format_width(runtime->format) == 8)
734 format |= 1;
735 else
736 ypcm->shift++;
737 switch (ypcm->capture_bank_number) {
738 case 0:
739 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
740 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
741 break;
742 case 1:
743 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
744 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
745 break;
746 }
747 for (nbank = 0; nbank < 2; nbank++) {
748 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
749 bank->base = cpu_to_le32(runtime->dma_addr);
750 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
751 bank->start = 0;
752 bank->num_of_loops = 0;
753 }
754 return 0;
755 }
756
757 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
758 {
759 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
760 struct snd_pcm_runtime *runtime = substream->runtime;
761 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
762 struct snd_ymfpci_voice *voice = ypcm->voices[0];
763
764 if (!(ypcm->running && voice))
765 return 0;
766 return le32_to_cpu(voice->bank[chip->active_bank].start);
767 }
768
769 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
770 {
771 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
772 struct snd_pcm_runtime *runtime = substream->runtime;
773 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
774
775 if (!ypcm->running)
776 return 0;
777 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
778 }
779
780 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
781 {
782 wait_queue_t wait;
783 int loops = 4;
784
785 while (loops-- > 0) {
786 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
787 continue;
788 init_waitqueue_entry(&wait, current);
789 add_wait_queue(&chip->interrupt_sleep, &wait);
790 atomic_inc(&chip->interrupt_sleep_count);
791 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
792 remove_wait_queue(&chip->interrupt_sleep, &wait);
793 }
794 }
795
796 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
797 {
798 struct snd_ymfpci *chip = dev_id;
799 u32 status, nvoice, mode;
800 struct snd_ymfpci_voice *voice;
801
802 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
803 if (status & 0x80000000) {
804 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
805 spin_lock(&chip->voice_lock);
806 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
807 voice = &chip->voices[nvoice];
808 if (voice->interrupt)
809 voice->interrupt(chip, voice);
810 }
811 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
812 if (chip->capture_substream[nvoice])
813 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
814 }
815 #if 0
816 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
817 if (chip->effect_substream[nvoice])
818 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
819 }
820 #endif
821 spin_unlock(&chip->voice_lock);
822 spin_lock(&chip->reg_lock);
823 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
824 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
825 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
826 spin_unlock(&chip->reg_lock);
827
828 if (atomic_read(&chip->interrupt_sleep_count)) {
829 atomic_set(&chip->interrupt_sleep_count, 0);
830 wake_up(&chip->interrupt_sleep);
831 }
832 }
833
834 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
835 if (status & 1) {
836 if (chip->timer)
837 snd_timer_interrupt(chip->timer, chip->timer_ticks);
838 }
839 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
840
841 if (chip->rawmidi)
842 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
843 return IRQ_HANDLED;
844 }
845
846 static struct snd_pcm_hardware snd_ymfpci_playback =
847 {
848 .info = (SNDRV_PCM_INFO_MMAP |
849 SNDRV_PCM_INFO_MMAP_VALID |
850 SNDRV_PCM_INFO_INTERLEAVED |
851 SNDRV_PCM_INFO_BLOCK_TRANSFER |
852 SNDRV_PCM_INFO_PAUSE |
853 SNDRV_PCM_INFO_RESUME),
854 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
855 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
856 .rate_min = 8000,
857 .rate_max = 48000,
858 .channels_min = 1,
859 .channels_max = 2,
860 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
861 .period_bytes_min = 64,
862 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
863 .periods_min = 3,
864 .periods_max = 1024,
865 .fifo_size = 0,
866 };
867
868 static struct snd_pcm_hardware snd_ymfpci_capture =
869 {
870 .info = (SNDRV_PCM_INFO_MMAP |
871 SNDRV_PCM_INFO_MMAP_VALID |
872 SNDRV_PCM_INFO_INTERLEAVED |
873 SNDRV_PCM_INFO_BLOCK_TRANSFER |
874 SNDRV_PCM_INFO_PAUSE |
875 SNDRV_PCM_INFO_RESUME),
876 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
877 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
878 .rate_min = 8000,
879 .rate_max = 48000,
880 .channels_min = 1,
881 .channels_max = 2,
882 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
883 .period_bytes_min = 64,
884 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
885 .periods_min = 3,
886 .periods_max = 1024,
887 .fifo_size = 0,
888 };
889
890 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
891 {
892 kfree(runtime->private_data);
893 }
894
895 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
896 {
897 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
898 struct snd_pcm_runtime *runtime = substream->runtime;
899 struct snd_ymfpci_pcm *ypcm;
900 int err;
901
902 runtime->hw = snd_ymfpci_playback;
903 /* FIXME? True value is 256/48 = 5.33333 ms */
904 err = snd_pcm_hw_constraint_minmax(runtime,
905 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
906 5334, UINT_MAX);
907 if (err < 0)
908 return err;
909 err = snd_pcm_hw_rule_noresample(runtime, 48000);
910 if (err < 0)
911 return err;
912
913 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
914 if (ypcm == NULL)
915 return -ENOMEM;
916 ypcm->chip = chip;
917 ypcm->type = PLAYBACK_VOICE;
918 ypcm->substream = substream;
919 runtime->private_data = ypcm;
920 runtime->private_free = snd_ymfpci_pcm_free_substream;
921 return 0;
922 }
923
924 /* call with spinlock held */
925 static void ymfpci_open_extension(struct snd_ymfpci *chip)
926 {
927 if (! chip->rear_opened) {
928 if (! chip->spdif_opened) /* set AC3 */
929 snd_ymfpci_writel(chip, YDSXGR_MODE,
930 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
931 /* enable second codec (4CHEN) */
932 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
933 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
934 }
935 }
936
937 /* call with spinlock held */
938 static void ymfpci_close_extension(struct snd_ymfpci *chip)
939 {
940 if (! chip->rear_opened) {
941 if (! chip->spdif_opened)
942 snd_ymfpci_writel(chip, YDSXGR_MODE,
943 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
944 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
945 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
946 }
947 }
948
949 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
950 {
951 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
952 struct snd_pcm_runtime *runtime = substream->runtime;
953 struct snd_ymfpci_pcm *ypcm;
954 int err;
955
956 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
957 return err;
958 ypcm = runtime->private_data;
959 ypcm->output_front = 1;
960 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
961 ypcm->swap_rear = 0;
962 spin_lock_irq(&chip->reg_lock);
963 if (ypcm->output_rear) {
964 ymfpci_open_extension(chip);
965 chip->rear_opened++;
966 }
967 spin_unlock_irq(&chip->reg_lock);
968 return 0;
969 }
970
971 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
972 {
973 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
974 struct snd_pcm_runtime *runtime = substream->runtime;
975 struct snd_ymfpci_pcm *ypcm;
976 int err;
977
978 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
979 return err;
980 ypcm = runtime->private_data;
981 ypcm->output_front = 0;
982 ypcm->output_rear = 1;
983 ypcm->swap_rear = 1;
984 spin_lock_irq(&chip->reg_lock);
985 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
986 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
987 ymfpci_open_extension(chip);
988 chip->spdif_pcm_bits = chip->spdif_bits;
989 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
990 chip->spdif_opened++;
991 spin_unlock_irq(&chip->reg_lock);
992
993 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
994 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
995 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
996 return 0;
997 }
998
999 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1000 {
1001 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1002 struct snd_pcm_runtime *runtime = substream->runtime;
1003 struct snd_ymfpci_pcm *ypcm;
1004 int err;
1005
1006 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
1007 return err;
1008 ypcm = runtime->private_data;
1009 ypcm->output_front = 0;
1010 ypcm->output_rear = 1;
1011 ypcm->swap_rear = 0;
1012 spin_lock_irq(&chip->reg_lock);
1013 ymfpci_open_extension(chip);
1014 chip->rear_opened++;
1015 spin_unlock_irq(&chip->reg_lock);
1016 return 0;
1017 }
1018
1019 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1020 u32 capture_bank_number)
1021 {
1022 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1023 struct snd_pcm_runtime *runtime = substream->runtime;
1024 struct snd_ymfpci_pcm *ypcm;
1025 int err;
1026
1027 runtime->hw = snd_ymfpci_capture;
1028 /* FIXME? True value is 256/48 = 5.33333 ms */
1029 err = snd_pcm_hw_constraint_minmax(runtime,
1030 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1031 5334, UINT_MAX);
1032 if (err < 0)
1033 return err;
1034 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1035 if (err < 0)
1036 return err;
1037
1038 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1039 if (ypcm == NULL)
1040 return -ENOMEM;
1041 ypcm->chip = chip;
1042 ypcm->type = capture_bank_number + CAPTURE_REC;
1043 ypcm->substream = substream;
1044 ypcm->capture_bank_number = capture_bank_number;
1045 chip->capture_substream[capture_bank_number] = substream;
1046 runtime->private_data = ypcm;
1047 runtime->private_free = snd_ymfpci_pcm_free_substream;
1048 snd_ymfpci_hw_start(chip);
1049 return 0;
1050 }
1051
1052 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1053 {
1054 return snd_ymfpci_capture_open(substream, 0);
1055 }
1056
1057 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1058 {
1059 return snd_ymfpci_capture_open(substream, 1);
1060 }
1061
1062 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1063 {
1064 return 0;
1065 }
1066
1067 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1068 {
1069 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1070 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1071
1072 spin_lock_irq(&chip->reg_lock);
1073 if (ypcm->output_rear && chip->rear_opened > 0) {
1074 chip->rear_opened--;
1075 ymfpci_close_extension(chip);
1076 }
1077 spin_unlock_irq(&chip->reg_lock);
1078 return snd_ymfpci_playback_close_1(substream);
1079 }
1080
1081 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1082 {
1083 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1084
1085 spin_lock_irq(&chip->reg_lock);
1086 chip->spdif_opened = 0;
1087 ymfpci_close_extension(chip);
1088 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1089 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1090 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1091 spin_unlock_irq(&chip->reg_lock);
1092 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1093 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1094 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1095 return snd_ymfpci_playback_close_1(substream);
1096 }
1097
1098 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1099 {
1100 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1101
1102 spin_lock_irq(&chip->reg_lock);
1103 if (chip->rear_opened > 0) {
1104 chip->rear_opened--;
1105 ymfpci_close_extension(chip);
1106 }
1107 spin_unlock_irq(&chip->reg_lock);
1108 return snd_ymfpci_playback_close_1(substream);
1109 }
1110
1111 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1112 {
1113 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1114 struct snd_pcm_runtime *runtime = substream->runtime;
1115 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1116
1117 if (ypcm != NULL) {
1118 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1119 snd_ymfpci_hw_stop(chip);
1120 }
1121 return 0;
1122 }
1123
1124 static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1125 .open = snd_ymfpci_playback_open,
1126 .close = snd_ymfpci_playback_close,
1127 .ioctl = snd_pcm_lib_ioctl,
1128 .hw_params = snd_ymfpci_playback_hw_params,
1129 .hw_free = snd_ymfpci_playback_hw_free,
1130 .prepare = snd_ymfpci_playback_prepare,
1131 .trigger = snd_ymfpci_playback_trigger,
1132 .pointer = snd_ymfpci_playback_pointer,
1133 };
1134
1135 static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1136 .open = snd_ymfpci_capture_rec_open,
1137 .close = snd_ymfpci_capture_close,
1138 .ioctl = snd_pcm_lib_ioctl,
1139 .hw_params = snd_ymfpci_capture_hw_params,
1140 .hw_free = snd_ymfpci_capture_hw_free,
1141 .prepare = snd_ymfpci_capture_prepare,
1142 .trigger = snd_ymfpci_capture_trigger,
1143 .pointer = snd_ymfpci_capture_pointer,
1144 };
1145
1146 int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm)
1147 {
1148 struct snd_pcm *pcm;
1149 int err;
1150
1151 if (rpcm)
1152 *rpcm = NULL;
1153 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1154 return err;
1155 pcm->private_data = chip;
1156
1157 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1158 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1159
1160 /* global setup */
1161 pcm->info_flags = 0;
1162 strcpy(pcm->name, "YMFPCI");
1163 chip->pcm = pcm;
1164
1165 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1166 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1167
1168 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1169 snd_pcm_std_chmaps, 2, 0, NULL);
1170 if (err < 0)
1171 return err;
1172
1173 if (rpcm)
1174 *rpcm = pcm;
1175 return 0;
1176 }
1177
1178 static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1179 .open = snd_ymfpci_capture_ac97_open,
1180 .close = snd_ymfpci_capture_close,
1181 .ioctl = snd_pcm_lib_ioctl,
1182 .hw_params = snd_ymfpci_capture_hw_params,
1183 .hw_free = snd_ymfpci_capture_hw_free,
1184 .prepare = snd_ymfpci_capture_prepare,
1185 .trigger = snd_ymfpci_capture_trigger,
1186 .pointer = snd_ymfpci_capture_pointer,
1187 };
1188
1189 int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm)
1190 {
1191 struct snd_pcm *pcm;
1192 int err;
1193
1194 if (rpcm)
1195 *rpcm = NULL;
1196 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1197 return err;
1198 pcm->private_data = chip;
1199
1200 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1201
1202 /* global setup */
1203 pcm->info_flags = 0;
1204 sprintf(pcm->name, "YMFPCI - %s",
1205 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1206 chip->pcm2 = pcm;
1207
1208 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1209 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1210
1211 if (rpcm)
1212 *rpcm = pcm;
1213 return 0;
1214 }
1215
1216 static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1217 .open = snd_ymfpci_playback_spdif_open,
1218 .close = snd_ymfpci_playback_spdif_close,
1219 .ioctl = snd_pcm_lib_ioctl,
1220 .hw_params = snd_ymfpci_playback_hw_params,
1221 .hw_free = snd_ymfpci_playback_hw_free,
1222 .prepare = snd_ymfpci_playback_prepare,
1223 .trigger = snd_ymfpci_playback_trigger,
1224 .pointer = snd_ymfpci_playback_pointer,
1225 };
1226
1227 int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device,
1228 struct snd_pcm **rpcm)
1229 {
1230 struct snd_pcm *pcm;
1231 int err;
1232
1233 if (rpcm)
1234 *rpcm = NULL;
1235 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1236 return err;
1237 pcm->private_data = chip;
1238
1239 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1240
1241 /* global setup */
1242 pcm->info_flags = 0;
1243 strcpy(pcm->name, "YMFPCI - IEC958");
1244 chip->pcm_spdif = pcm;
1245
1246 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1247 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1248
1249 if (rpcm)
1250 *rpcm = pcm;
1251 return 0;
1252 }
1253
1254 static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1255 .open = snd_ymfpci_playback_4ch_open,
1256 .close = snd_ymfpci_playback_4ch_close,
1257 .ioctl = snd_pcm_lib_ioctl,
1258 .hw_params = snd_ymfpci_playback_hw_params,
1259 .hw_free = snd_ymfpci_playback_hw_free,
1260 .prepare = snd_ymfpci_playback_prepare,
1261 .trigger = snd_ymfpci_playback_trigger,
1262 .pointer = snd_ymfpci_playback_pointer,
1263 };
1264
1265 static const struct snd_pcm_chmap_elem surround_map[] = {
1266 { .channels = 1,
1267 .map = { SNDRV_CHMAP_MONO } },
1268 { .channels = 2,
1269 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1270 { }
1271 };
1272
1273 int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device,
1274 struct snd_pcm **rpcm)
1275 {
1276 struct snd_pcm *pcm;
1277 int err;
1278
1279 if (rpcm)
1280 *rpcm = NULL;
1281 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1282 return err;
1283 pcm->private_data = chip;
1284
1285 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1286
1287 /* global setup */
1288 pcm->info_flags = 0;
1289 strcpy(pcm->name, "YMFPCI - Rear PCM");
1290 chip->pcm_4ch = pcm;
1291
1292 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1293 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1294
1295 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1296 surround_map, 2, 0, NULL);
1297 if (err < 0)
1298 return err;
1299
1300 if (rpcm)
1301 *rpcm = pcm;
1302 return 0;
1303 }
1304
1305 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1306 {
1307 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1308 uinfo->count = 1;
1309 return 0;
1310 }
1311
1312 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1313 struct snd_ctl_elem_value *ucontrol)
1314 {
1315 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1316
1317 spin_lock_irq(&chip->reg_lock);
1318 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1319 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1320 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1321 spin_unlock_irq(&chip->reg_lock);
1322 return 0;
1323 }
1324
1325 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1326 struct snd_ctl_elem_value *ucontrol)
1327 {
1328 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1329 unsigned int val;
1330 int change;
1331
1332 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1333 (ucontrol->value.iec958.status[1] << 8);
1334 spin_lock_irq(&chip->reg_lock);
1335 change = chip->spdif_bits != val;
1336 chip->spdif_bits = val;
1337 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1338 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1339 spin_unlock_irq(&chip->reg_lock);
1340 return change;
1341 }
1342
1343 static struct snd_kcontrol_new snd_ymfpci_spdif_default =
1344 {
1345 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1346 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1347 .info = snd_ymfpci_spdif_default_info,
1348 .get = snd_ymfpci_spdif_default_get,
1349 .put = snd_ymfpci_spdif_default_put
1350 };
1351
1352 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1353 {
1354 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1355 uinfo->count = 1;
1356 return 0;
1357 }
1358
1359 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1360 struct snd_ctl_elem_value *ucontrol)
1361 {
1362 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1363
1364 spin_lock_irq(&chip->reg_lock);
1365 ucontrol->value.iec958.status[0] = 0x3e;
1366 ucontrol->value.iec958.status[1] = 0xff;
1367 spin_unlock_irq(&chip->reg_lock);
1368 return 0;
1369 }
1370
1371 static struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1372 {
1373 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1374 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1375 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1376 .info = snd_ymfpci_spdif_mask_info,
1377 .get = snd_ymfpci_spdif_mask_get,
1378 };
1379
1380 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1381 {
1382 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1383 uinfo->count = 1;
1384 return 0;
1385 }
1386
1387 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1388 struct snd_ctl_elem_value *ucontrol)
1389 {
1390 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1391
1392 spin_lock_irq(&chip->reg_lock);
1393 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1394 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1395 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1396 spin_unlock_irq(&chip->reg_lock);
1397 return 0;
1398 }
1399
1400 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1401 struct snd_ctl_elem_value *ucontrol)
1402 {
1403 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1404 unsigned int val;
1405 int change;
1406
1407 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1408 (ucontrol->value.iec958.status[1] << 8);
1409 spin_lock_irq(&chip->reg_lock);
1410 change = chip->spdif_pcm_bits != val;
1411 chip->spdif_pcm_bits = val;
1412 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1413 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1414 spin_unlock_irq(&chip->reg_lock);
1415 return change;
1416 }
1417
1418 static struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1419 {
1420 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1421 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1422 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1423 .info = snd_ymfpci_spdif_stream_info,
1424 .get = snd_ymfpci_spdif_stream_get,
1425 .put = snd_ymfpci_spdif_stream_put
1426 };
1427
1428 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1429 {
1430 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1431
1432 return snd_ctl_enum_info(info, 1, 3, texts);
1433 }
1434
1435 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1436 {
1437 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1438 u16 reg;
1439
1440 spin_lock_irq(&chip->reg_lock);
1441 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1442 spin_unlock_irq(&chip->reg_lock);
1443 if (!(reg & 0x100))
1444 value->value.enumerated.item[0] = 0;
1445 else
1446 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1447 return 0;
1448 }
1449
1450 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1451 {
1452 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1453 u16 reg, old_reg;
1454
1455 spin_lock_irq(&chip->reg_lock);
1456 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1457 if (value->value.enumerated.item[0] == 0)
1458 reg = old_reg & ~0x100;
1459 else
1460 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1461 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1462 spin_unlock_irq(&chip->reg_lock);
1463 return reg != old_reg;
1464 }
1465
1466 static struct snd_kcontrol_new snd_ymfpci_drec_source = {
1467 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1468 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1469 .name = "Direct Recording Source",
1470 .info = snd_ymfpci_drec_source_info,
1471 .get = snd_ymfpci_drec_source_get,
1472 .put = snd_ymfpci_drec_source_put
1473 };
1474
1475 /*
1476 * Mixer controls
1477 */
1478
1479 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1480 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1481 .info = snd_ymfpci_info_single, \
1482 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1483 .private_value = ((reg) | ((shift) << 16)) }
1484
1485 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1486
1487 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1488 struct snd_ctl_elem_value *ucontrol)
1489 {
1490 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1491 int reg = kcontrol->private_value & 0xffff;
1492 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1493 unsigned int mask = 1;
1494
1495 switch (reg) {
1496 case YDSXGR_SPDIFOUTCTRL: break;
1497 case YDSXGR_SPDIFINCTRL: break;
1498 default: return -EINVAL;
1499 }
1500 ucontrol->value.integer.value[0] =
1501 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1502 return 0;
1503 }
1504
1505 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1506 struct snd_ctl_elem_value *ucontrol)
1507 {
1508 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1509 int reg = kcontrol->private_value & 0xffff;
1510 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1511 unsigned int mask = 1;
1512 int change;
1513 unsigned int val, oval;
1514
1515 switch (reg) {
1516 case YDSXGR_SPDIFOUTCTRL: break;
1517 case YDSXGR_SPDIFINCTRL: break;
1518 default: return -EINVAL;
1519 }
1520 val = (ucontrol->value.integer.value[0] & mask);
1521 val <<= shift;
1522 spin_lock_irq(&chip->reg_lock);
1523 oval = snd_ymfpci_readl(chip, reg);
1524 val = (oval & ~(mask << shift)) | val;
1525 change = val != oval;
1526 snd_ymfpci_writel(chip, reg, val);
1527 spin_unlock_irq(&chip->reg_lock);
1528 return change;
1529 }
1530
1531 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1532
1533 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1534 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1535 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1536 .info = snd_ymfpci_info_double, \
1537 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1538 .private_value = reg, \
1539 .tlv = { .p = db_scale_native } }
1540
1541 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1542 {
1543 unsigned int reg = kcontrol->private_value;
1544
1545 if (reg < 0x80 || reg >= 0xc0)
1546 return -EINVAL;
1547 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1548 uinfo->count = 2;
1549 uinfo->value.integer.min = 0;
1550 uinfo->value.integer.max = 16383;
1551 return 0;
1552 }
1553
1554 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1555 {
1556 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1557 unsigned int reg = kcontrol->private_value;
1558 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1559 unsigned int val;
1560
1561 if (reg < 0x80 || reg >= 0xc0)
1562 return -EINVAL;
1563 spin_lock_irq(&chip->reg_lock);
1564 val = snd_ymfpci_readl(chip, reg);
1565 spin_unlock_irq(&chip->reg_lock);
1566 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1567 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1568 return 0;
1569 }
1570
1571 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1572 {
1573 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1574 unsigned int reg = kcontrol->private_value;
1575 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1576 int change;
1577 unsigned int val1, val2, oval;
1578
1579 if (reg < 0x80 || reg >= 0xc0)
1580 return -EINVAL;
1581 val1 = ucontrol->value.integer.value[0] & mask;
1582 val2 = ucontrol->value.integer.value[1] & mask;
1583 val1 <<= shift_left;
1584 val2 <<= shift_right;
1585 spin_lock_irq(&chip->reg_lock);
1586 oval = snd_ymfpci_readl(chip, reg);
1587 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1588 change = val1 != oval;
1589 snd_ymfpci_writel(chip, reg, val1);
1590 spin_unlock_irq(&chip->reg_lock);
1591 return change;
1592 }
1593
1594 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1595 struct snd_ctl_elem_value *ucontrol)
1596 {
1597 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1598 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1599 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1600 int change;
1601 unsigned int value, oval;
1602
1603 value = ucontrol->value.integer.value[0] & 0x3fff;
1604 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1605 spin_lock_irq(&chip->reg_lock);
1606 oval = snd_ymfpci_readl(chip, reg);
1607 change = value != oval;
1608 snd_ymfpci_writel(chip, reg, value);
1609 snd_ymfpci_writel(chip, reg2, value);
1610 spin_unlock_irq(&chip->reg_lock);
1611 return change;
1612 }
1613
1614 /*
1615 * 4ch duplication
1616 */
1617 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1618
1619 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1620 {
1621 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1622 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1623 return 0;
1624 }
1625
1626 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1627 {
1628 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1629 int change;
1630 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1631 if (change)
1632 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1633 return change;
1634 }
1635
1636 static struct snd_kcontrol_new snd_ymfpci_dup4ch = {
1637 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1638 .name = "4ch Duplication",
1639 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1640 .info = snd_ymfpci_info_dup4ch,
1641 .get = snd_ymfpci_get_dup4ch,
1642 .put = snd_ymfpci_put_dup4ch,
1643 };
1644
1645 static struct snd_kcontrol_new snd_ymfpci_controls[] = {
1646 {
1647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1648 .name = "Wave Playback Volume",
1649 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1650 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1651 .info = snd_ymfpci_info_double,
1652 .get = snd_ymfpci_get_double,
1653 .put = snd_ymfpci_put_nativedacvol,
1654 .private_value = YDSXGR_NATIVEDACOUTVOL,
1655 .tlv = { .p = db_scale_native },
1656 },
1657 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1658 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1659 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1660 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1661 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1662 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1663 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1664 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1665 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1666 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1667 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1668 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1669 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1670 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1671 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1672 };
1673
1674
1675 /*
1676 * GPIO
1677 */
1678
1679 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1680 {
1681 u16 reg, mode;
1682 unsigned long flags;
1683
1684 spin_lock_irqsave(&chip->reg_lock, flags);
1685 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1686 reg &= ~(1 << (pin + 8));
1687 reg |= (1 << pin);
1688 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1689 /* set the level mode for input line */
1690 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1691 mode &= ~(3 << (pin * 2));
1692 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1693 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1694 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1695 spin_unlock_irqrestore(&chip->reg_lock, flags);
1696 return (mode >> pin) & 1;
1697 }
1698
1699 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1700 {
1701 u16 reg;
1702 unsigned long flags;
1703
1704 spin_lock_irqsave(&chip->reg_lock, flags);
1705 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1706 reg &= ~(1 << pin);
1707 reg &= ~(1 << (pin + 8));
1708 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1709 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1710 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1711 spin_unlock_irqrestore(&chip->reg_lock, flags);
1712
1713 return 0;
1714 }
1715
1716 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1717
1718 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1719 {
1720 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1721 int pin = (int)kcontrol->private_value;
1722 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1723 return 0;
1724 }
1725
1726 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1727 {
1728 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1729 int pin = (int)kcontrol->private_value;
1730
1731 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1732 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1733 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1734 return 1;
1735 }
1736 return 0;
1737 }
1738
1739 static struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1740 .name = "Shared Rear/Line-In Switch",
1741 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1742 .info = snd_ymfpci_gpio_sw_info,
1743 .get = snd_ymfpci_gpio_sw_get,
1744 .put = snd_ymfpci_gpio_sw_put,
1745 .private_value = 2,
1746 };
1747
1748 /*
1749 * PCM voice volume
1750 */
1751
1752 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_info *uinfo)
1754 {
1755 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1756 uinfo->count = 2;
1757 uinfo->value.integer.min = 0;
1758 uinfo->value.integer.max = 0x8000;
1759 return 0;
1760 }
1761
1762 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1763 struct snd_ctl_elem_value *ucontrol)
1764 {
1765 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1766 unsigned int subs = kcontrol->id.subdevice;
1767
1768 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1769 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1770 return 0;
1771 }
1772
1773 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1774 struct snd_ctl_elem_value *ucontrol)
1775 {
1776 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1777 unsigned int subs = kcontrol->id.subdevice;
1778 struct snd_pcm_substream *substream;
1779 unsigned long flags;
1780
1781 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1782 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1783 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1784 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1785 if (chip->pcm_mixer[subs].left > 0x8000)
1786 chip->pcm_mixer[subs].left = 0x8000;
1787 if (chip->pcm_mixer[subs].right > 0x8000)
1788 chip->pcm_mixer[subs].right = 0x8000;
1789
1790 substream = (struct snd_pcm_substream *)kcontrol->private_value;
1791 spin_lock_irqsave(&chip->voice_lock, flags);
1792 if (substream->runtime && substream->runtime->private_data) {
1793 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1794 if (!ypcm->use_441_slot)
1795 ypcm->update_pcm_vol = 2;
1796 }
1797 spin_unlock_irqrestore(&chip->voice_lock, flags);
1798 return 1;
1799 }
1800 return 0;
1801 }
1802
1803 static struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
1804 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1805 .name = "PCM Playback Volume",
1806 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1807 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1808 .info = snd_ymfpci_pcm_vol_info,
1809 .get = snd_ymfpci_pcm_vol_get,
1810 .put = snd_ymfpci_pcm_vol_put,
1811 };
1812
1813
1814 /*
1815 * Mixer routines
1816 */
1817
1818 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1819 {
1820 struct snd_ymfpci *chip = bus->private_data;
1821 chip->ac97_bus = NULL;
1822 }
1823
1824 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1825 {
1826 struct snd_ymfpci *chip = ac97->private_data;
1827 chip->ac97 = NULL;
1828 }
1829
1830 int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1831 {
1832 struct snd_ac97_template ac97;
1833 struct snd_kcontrol *kctl;
1834 struct snd_pcm_substream *substream;
1835 unsigned int idx;
1836 int err;
1837 static struct snd_ac97_bus_ops ops = {
1838 .write = snd_ymfpci_codec_write,
1839 .read = snd_ymfpci_codec_read,
1840 };
1841
1842 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1843 return err;
1844 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1845 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1846
1847 memset(&ac97, 0, sizeof(ac97));
1848 ac97.private_data = chip;
1849 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1850 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1851 return err;
1852
1853 /* to be sure */
1854 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1855 AC97_EA_VRA|AC97_EA_VRM, 0);
1856
1857 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1858 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1859 return err;
1860 }
1861 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1862 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1863 err = snd_ctl_add(chip->card, kctl);
1864 if (err < 0)
1865 return err;
1866 }
1867
1868 /* add S/PDIF control */
1869 if (snd_BUG_ON(!chip->pcm_spdif))
1870 return -ENXIO;
1871 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1872 return err;
1873 kctl->id.device = chip->pcm_spdif->device;
1874 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1875 return err;
1876 kctl->id.device = chip->pcm_spdif->device;
1877 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1878 return err;
1879 kctl->id.device = chip->pcm_spdif->device;
1880 chip->spdif_pcm_ctl = kctl;
1881
1882 /* direct recording source */
1883 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1884 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1885 return err;
1886
1887 /*
1888 * shared rear/line-in
1889 */
1890 if (rear_switch) {
1891 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1892 return err;
1893 }
1894
1895 /* per-voice volume */
1896 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1897 for (idx = 0; idx < 32; ++idx) {
1898 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1899 if (!kctl)
1900 return -ENOMEM;
1901 kctl->id.device = chip->pcm->device;
1902 kctl->id.subdevice = idx;
1903 kctl->private_value = (unsigned long)substream;
1904 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1905 return err;
1906 chip->pcm_mixer[idx].left = 0x8000;
1907 chip->pcm_mixer[idx].right = 0x8000;
1908 chip->pcm_mixer[idx].ctl = kctl;
1909 substream = substream->next;
1910 }
1911
1912 return 0;
1913 }
1914
1915
1916 /*
1917 * timer
1918 */
1919
1920 static int snd_ymfpci_timer_start(struct snd_timer *timer)
1921 {
1922 struct snd_ymfpci *chip;
1923 unsigned long flags;
1924 unsigned int count;
1925
1926 chip = snd_timer_chip(timer);
1927 spin_lock_irqsave(&chip->reg_lock, flags);
1928 if (timer->sticks > 1) {
1929 chip->timer_ticks = timer->sticks;
1930 count = timer->sticks - 1;
1931 } else {
1932 /*
1933 * Divisor 1 is not allowed; fake it by using divisor 2 and
1934 * counting two ticks for each interrupt.
1935 */
1936 chip->timer_ticks = 2;
1937 count = 2 - 1;
1938 }
1939 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1940 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1941 spin_unlock_irqrestore(&chip->reg_lock, flags);
1942 return 0;
1943 }
1944
1945 static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1946 {
1947 struct snd_ymfpci *chip;
1948 unsigned long flags;
1949
1950 chip = snd_timer_chip(timer);
1951 spin_lock_irqsave(&chip->reg_lock, flags);
1952 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1953 spin_unlock_irqrestore(&chip->reg_lock, flags);
1954 return 0;
1955 }
1956
1957 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1958 unsigned long *num, unsigned long *den)
1959 {
1960 *num = 1;
1961 *den = 96000;
1962 return 0;
1963 }
1964
1965 static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1966 .flags = SNDRV_TIMER_HW_AUTO,
1967 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1968 .ticks = 0x10000,
1969 .start = snd_ymfpci_timer_start,
1970 .stop = snd_ymfpci_timer_stop,
1971 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1972 };
1973
1974 int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1975 {
1976 struct snd_timer *timer = NULL;
1977 struct snd_timer_id tid;
1978 int err;
1979
1980 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1981 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1982 tid.card = chip->card->number;
1983 tid.device = device;
1984 tid.subdevice = 0;
1985 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1986 strcpy(timer->name, "YMFPCI timer");
1987 timer->private_data = chip;
1988 timer->hw = snd_ymfpci_timer_hw;
1989 }
1990 chip->timer = timer;
1991 return err;
1992 }
1993
1994
1995 /*
1996 * proc interface
1997 */
1998
1999 static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
2000 struct snd_info_buffer *buffer)
2001 {
2002 struct snd_ymfpci *chip = entry->private_data;
2003 int i;
2004
2005 snd_iprintf(buffer, "YMFPCI\n\n");
2006 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
2007 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
2008 }
2009
2010 static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
2011 {
2012 struct snd_info_entry *entry;
2013
2014 if (! snd_card_proc_new(card, "ymfpci", &entry))
2015 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
2016 return 0;
2017 }
2018
2019 /*
2020 * initialization routines
2021 */
2022
2023 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
2024 {
2025 u8 cmd;
2026
2027 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
2028 #if 0 // force to reset
2029 if (cmd & 0x03) {
2030 #endif
2031 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2032 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
2033 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2034 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
2035 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
2036 #if 0
2037 }
2038 #endif
2039 }
2040
2041 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2042 {
2043 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2044 }
2045
2046 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2047 {
2048 u32 val;
2049 int timeout = 1000;
2050
2051 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2052 if (val)
2053 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2054 while (timeout-- > 0) {
2055 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2056 if ((val & 0x00000002) == 0)
2057 break;
2058 }
2059 }
2060
2061 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2062 {
2063 int err, is_1e;
2064 const char *name;
2065
2066 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2067 &chip->pci->dev);
2068 if (err >= 0) {
2069 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2070 snd_printk(KERN_ERR "DSP microcode has wrong size\n");
2071 err = -EINVAL;
2072 }
2073 }
2074 if (err < 0)
2075 return err;
2076 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2077 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2078 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2079 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2080 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2081 err = request_firmware(&chip->controller_microcode, name,
2082 &chip->pci->dev);
2083 if (err >= 0) {
2084 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2085 snd_printk(KERN_ERR "controller microcode"
2086 " has wrong size\n");
2087 err = -EINVAL;
2088 }
2089 }
2090 if (err < 0)
2091 return err;
2092 return 0;
2093 }
2094
2095 MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2096 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2097 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2098
2099 static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2100 {
2101 int i;
2102 u16 ctrl;
2103 const __le32 *inst;
2104
2105 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2106 snd_ymfpci_disable_dsp(chip);
2107 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2108 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2109 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2110 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2111 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2112 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2113 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2114 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2115 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2116
2117 /* setup DSP instruction code */
2118 inst = (const __le32 *)chip->dsp_microcode->data;
2119 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2120 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2121 le32_to_cpu(inst[i]));
2122
2123 /* setup control instruction code */
2124 inst = (const __le32 *)chip->controller_microcode->data;
2125 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2126 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2127 le32_to_cpu(inst[i]));
2128
2129 snd_ymfpci_enable_dsp(chip);
2130 }
2131
2132 static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2133 {
2134 long size, playback_ctrl_size;
2135 int voice, bank, reg;
2136 u8 *ptr;
2137 dma_addr_t ptr_addr;
2138
2139 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2140 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2141 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2142 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2143 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2144
2145 size = ALIGN(playback_ctrl_size, 0x100) +
2146 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2147 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2148 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2149 chip->work_size;
2150 /* work_ptr must be aligned to 256 bytes, but it's already
2151 covered with the kernel page allocation mechanism */
2152 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2153 size, &chip->work_ptr) < 0)
2154 return -ENOMEM;
2155 ptr = chip->work_ptr.area;
2156 ptr_addr = chip->work_ptr.addr;
2157 memset(ptr, 0, size); /* for sure */
2158
2159 chip->bank_base_playback = ptr;
2160 chip->bank_base_playback_addr = ptr_addr;
2161 chip->ctrl_playback = (u32 *)ptr;
2162 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2163 ptr += ALIGN(playback_ctrl_size, 0x100);
2164 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2165 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2166 chip->voices[voice].number = voice;
2167 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2168 chip->voices[voice].bank_addr = ptr_addr;
2169 for (bank = 0; bank < 2; bank++) {
2170 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2171 ptr += chip->bank_size_playback;
2172 ptr_addr += chip->bank_size_playback;
2173 }
2174 }
2175 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2176 ptr_addr = ALIGN(ptr_addr, 0x100);
2177 chip->bank_base_capture = ptr;
2178 chip->bank_base_capture_addr = ptr_addr;
2179 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2180 for (bank = 0; bank < 2; bank++) {
2181 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2182 ptr += chip->bank_size_capture;
2183 ptr_addr += chip->bank_size_capture;
2184 }
2185 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2186 ptr_addr = ALIGN(ptr_addr, 0x100);
2187 chip->bank_base_effect = ptr;
2188 chip->bank_base_effect_addr = ptr_addr;
2189 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2190 for (bank = 0; bank < 2; bank++) {
2191 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2192 ptr += chip->bank_size_effect;
2193 ptr_addr += chip->bank_size_effect;
2194 }
2195 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2196 ptr_addr = ALIGN(ptr_addr, 0x100);
2197 chip->work_base = ptr;
2198 chip->work_base_addr = ptr_addr;
2199
2200 snd_BUG_ON(ptr + chip->work_size !=
2201 chip->work_ptr.area + chip->work_ptr.bytes);
2202
2203 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2204 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2205 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2206 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2207 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2208
2209 /* S/PDIF output initialization */
2210 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2211 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2212 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2213
2214 /* S/PDIF input initialization */
2215 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2216
2217 /* digital mixer setup */
2218 for (reg = 0x80; reg < 0xc0; reg += 4)
2219 snd_ymfpci_writel(chip, reg, 0);
2220 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2221 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2222 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2223 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2224 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2225 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2226 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2227 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2228
2229 return 0;
2230 }
2231
2232 static int snd_ymfpci_free(struct snd_ymfpci *chip)
2233 {
2234 u16 ctrl;
2235
2236 if (snd_BUG_ON(!chip))
2237 return -EINVAL;
2238
2239 if (chip->res_reg_area) { /* don't touch busy hardware */
2240 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2241 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2242 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2243 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2244 snd_ymfpci_disable_dsp(chip);
2245 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2246 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2247 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2248 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2249 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2250 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2251 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2252 }
2253
2254 snd_ymfpci_ac3_done(chip);
2255
2256 /* Set PCI device to D3 state */
2257 #if 0
2258 /* FIXME: temporarily disabled, otherwise we cannot fire up
2259 * the chip again unless reboot. ACPI bug?
2260 */
2261 pci_set_power_state(chip->pci, 3);
2262 #endif
2263
2264 #ifdef CONFIG_PM_SLEEP
2265 kfree(chip->saved_regs);
2266 #endif
2267 if (chip->irq >= 0)
2268 free_irq(chip->irq, chip);
2269 release_and_free_resource(chip->mpu_res);
2270 release_and_free_resource(chip->fm_res);
2271 snd_ymfpci_free_gameport(chip);
2272 if (chip->reg_area_virt)
2273 iounmap(chip->reg_area_virt);
2274 if (chip->work_ptr.area)
2275 snd_dma_free_pages(&chip->work_ptr);
2276
2277 release_and_free_resource(chip->res_reg_area);
2278
2279 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2280
2281 pci_disable_device(chip->pci);
2282 release_firmware(chip->dsp_microcode);
2283 release_firmware(chip->controller_microcode);
2284 kfree(chip);
2285 return 0;
2286 }
2287
2288 static int snd_ymfpci_dev_free(struct snd_device *device)
2289 {
2290 struct snd_ymfpci *chip = device->device_data;
2291 return snd_ymfpci_free(chip);
2292 }
2293
2294 #ifdef CONFIG_PM_SLEEP
2295 static int saved_regs_index[] = {
2296 /* spdif */
2297 YDSXGR_SPDIFOUTCTRL,
2298 YDSXGR_SPDIFOUTSTATUS,
2299 YDSXGR_SPDIFINCTRL,
2300 /* volumes */
2301 YDSXGR_PRIADCLOOPVOL,
2302 YDSXGR_NATIVEDACINVOL,
2303 YDSXGR_NATIVEDACOUTVOL,
2304 YDSXGR_BUF441OUTVOL,
2305 YDSXGR_NATIVEADCINVOL,
2306 YDSXGR_SPDIFLOOPVOL,
2307 YDSXGR_SPDIFOUTVOL,
2308 YDSXGR_ZVOUTVOL,
2309 YDSXGR_LEGACYOUTVOL,
2310 /* address bases */
2311 YDSXGR_PLAYCTRLBASE,
2312 YDSXGR_RECCTRLBASE,
2313 YDSXGR_EFFCTRLBASE,
2314 YDSXGR_WORKBASE,
2315 /* capture set up */
2316 YDSXGR_MAPOFREC,
2317 YDSXGR_RECFORMAT,
2318 YDSXGR_RECSLOTSR,
2319 YDSXGR_ADCFORMAT,
2320 YDSXGR_ADCSLOTSR,
2321 };
2322 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2323
2324 static int snd_ymfpci_suspend(struct device *dev)
2325 {
2326 struct pci_dev *pci = to_pci_dev(dev);
2327 struct snd_card *card = dev_get_drvdata(dev);
2328 struct snd_ymfpci *chip = card->private_data;
2329 unsigned int i;
2330
2331 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2332 snd_pcm_suspend_all(chip->pcm);
2333 snd_pcm_suspend_all(chip->pcm2);
2334 snd_pcm_suspend_all(chip->pcm_spdif);
2335 snd_pcm_suspend_all(chip->pcm_4ch);
2336 snd_ac97_suspend(chip->ac97);
2337 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2338 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2339 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2340 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2341 &chip->saved_dsxg_legacy);
2342 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2343 &chip->saved_dsxg_elegacy);
2344 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2345 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2346 snd_ymfpci_disable_dsp(chip);
2347 pci_disable_device(pci);
2348 pci_save_state(pci);
2349 pci_set_power_state(pci, PCI_D3hot);
2350 return 0;
2351 }
2352
2353 static int snd_ymfpci_resume(struct device *dev)
2354 {
2355 struct pci_dev *pci = to_pci_dev(dev);
2356 struct snd_card *card = dev_get_drvdata(dev);
2357 struct snd_ymfpci *chip = card->private_data;
2358 unsigned int i;
2359
2360 pci_set_power_state(pci, PCI_D0);
2361 pci_restore_state(pci);
2362 if (pci_enable_device(pci) < 0) {
2363 printk(KERN_ERR "ymfpci: pci_enable_device failed, "
2364 "disabling device\n");
2365 snd_card_disconnect(card);
2366 return -EIO;
2367 }
2368 pci_set_master(pci);
2369 snd_ymfpci_aclink_reset(pci);
2370 snd_ymfpci_codec_ready(chip, 0);
2371 snd_ymfpci_download_image(chip);
2372 udelay(100);
2373
2374 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2375 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2376
2377 snd_ac97_resume(chip->ac97);
2378
2379 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2380 chip->saved_dsxg_legacy);
2381 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2382 chip->saved_dsxg_elegacy);
2383
2384 /* start hw again */
2385 if (chip->start_count > 0) {
2386 spin_lock_irq(&chip->reg_lock);
2387 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2388 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2389 spin_unlock_irq(&chip->reg_lock);
2390 }
2391 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2392 return 0;
2393 }
2394
2395 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2396 #endif /* CONFIG_PM_SLEEP */
2397
2398 int snd_ymfpci_create(struct snd_card *card,
2399 struct pci_dev *pci,
2400 unsigned short old_legacy_ctrl,
2401 struct snd_ymfpci **rchip)
2402 {
2403 struct snd_ymfpci *chip;
2404 int err;
2405 static struct snd_device_ops ops = {
2406 .dev_free = snd_ymfpci_dev_free,
2407 };
2408
2409 *rchip = NULL;
2410
2411 /* enable PCI device */
2412 if ((err = pci_enable_device(pci)) < 0)
2413 return err;
2414
2415 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2416 if (chip == NULL) {
2417 pci_disable_device(pci);
2418 return -ENOMEM;
2419 }
2420 chip->old_legacy_ctrl = old_legacy_ctrl;
2421 spin_lock_init(&chip->reg_lock);
2422 spin_lock_init(&chip->voice_lock);
2423 init_waitqueue_head(&chip->interrupt_sleep);
2424 atomic_set(&chip->interrupt_sleep_count, 0);
2425 chip->card = card;
2426 chip->pci = pci;
2427 chip->irq = -1;
2428 chip->device_id = pci->device;
2429 chip->rev = pci->revision;
2430 chip->reg_area_phys = pci_resource_start(pci, 0);
2431 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2432 pci_set_master(pci);
2433 chip->src441_used = -1;
2434
2435 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2436 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2437 snd_ymfpci_free(chip);
2438 return -EBUSY;
2439 }
2440 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2441 KBUILD_MODNAME, chip)) {
2442 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2443 snd_ymfpci_free(chip);
2444 return -EBUSY;
2445 }
2446 chip->irq = pci->irq;
2447
2448 snd_ymfpci_aclink_reset(pci);
2449 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2450 snd_ymfpci_free(chip);
2451 return -EIO;
2452 }
2453
2454 err = snd_ymfpci_request_firmware(chip);
2455 if (err < 0) {
2456 snd_printk(KERN_ERR "firmware request failed: %d\n", err);
2457 snd_ymfpci_free(chip);
2458 return err;
2459 }
2460 snd_ymfpci_download_image(chip);
2461
2462 udelay(100); /* seems we need a delay after downloading image.. */
2463
2464 if (snd_ymfpci_memalloc(chip) < 0) {
2465 snd_ymfpci_free(chip);
2466 return -EIO;
2467 }
2468
2469 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2470 snd_ymfpci_free(chip);
2471 return err;
2472 }
2473
2474 #ifdef CONFIG_PM_SLEEP
2475 chip->saved_regs = kmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32),
2476 GFP_KERNEL);
2477 if (chip->saved_regs == NULL) {
2478 snd_ymfpci_free(chip);
2479 return -ENOMEM;
2480 }
2481 #endif
2482
2483 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2484 snd_ymfpci_free(chip);
2485 return err;
2486 }
2487
2488 snd_ymfpci_proc_init(card, chip);
2489
2490 snd_card_set_dev(card, &pci->dev);
2491
2492 *rchip = chip;
2493 return 0;
2494 }
CRIS linux kernel tree