2 * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port
4 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
7 * Peter Ujfalusi <peter.ujfalusi@ti.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/device.h>
28 #include <linux/pm_runtime.h>
30 #include <linux/of_device.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/initval.h>
35 #include <sound/soc.h>
37 #include <linux/platform_data/asoc-ti-mcbsp.h>
39 #include "omap-mcbsp.h"
42 #define OMAP_MCBSP_RATES (SNDRV_PCM_RATE_8000_96000)
44 #define OMAP_MCBSP_SOC_SINGLE_S16_EXT(xname, xmin, xmax, \
45 xhandler_get, xhandler_put) \
46 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
47 .info = omap_mcbsp_st_info_volsw, \
48 .get = xhandler_get, .put = xhandler_put, \
49 .private_value = (unsigned long) &(struct soc_mixer_control) \
50 {.min = xmin, .max = xmax} }
53 OMAP_MCBSP_WORD_8
= 0,
62 * Stream DMA parameters. DMA request line and port address are set runtime
63 * since they are different between OMAP1 and later OMAPs
65 static void omap_mcbsp_set_threshold(struct snd_pcm_substream
*substream
)
67 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
68 struct snd_soc_dai
*cpu_dai
= rtd
->cpu_dai
;
69 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
70 struct omap_pcm_dma_data
*dma_data
;
73 dma_data
= snd_soc_dai_get_dma_data(rtd
->cpu_dai
, substream
);
76 * Configure McBSP threshold based on either:
77 * packet_size, when the sDMA is in packet mode, or based on the
78 * period size in THRESHOLD mode, otherwise use McBSP threshold = 1
81 if (dma_data
->packet_size
)
82 words
= dma_data
->packet_size
;
86 /* Configure McBSP internal buffer usage */
87 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
88 omap_mcbsp_set_tx_threshold(mcbsp
, words
);
90 omap_mcbsp_set_rx_threshold(mcbsp
, words
);
93 static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params
*params
,
94 struct snd_pcm_hw_rule
*rule
)
96 struct snd_interval
*buffer_size
= hw_param_interval(params
,
97 SNDRV_PCM_HW_PARAM_BUFFER_SIZE
);
98 struct snd_interval
*channels
= hw_param_interval(params
,
99 SNDRV_PCM_HW_PARAM_CHANNELS
);
100 struct omap_mcbsp
*mcbsp
= rule
->private;
101 struct snd_interval frames
;
104 snd_interval_any(&frames
);
105 size
= mcbsp
->pdata
->buffer_size
;
107 frames
.min
= size
/ channels
->min
;
109 return snd_interval_refine(buffer_size
, &frames
);
112 static int omap_mcbsp_dai_startup(struct snd_pcm_substream
*substream
,
113 struct snd_soc_dai
*cpu_dai
)
115 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
118 if (!cpu_dai
->active
)
119 err
= omap_mcbsp_request(mcbsp
);
122 * OMAP3 McBSP FIFO is word structured.
123 * McBSP2 has 1024 + 256 = 1280 word long buffer,
124 * McBSP1,3,4,5 has 128 word long buffer
125 * This means that the size of the FIFO depends on the sample format.
126 * For example on McBSP3:
127 * 16bit samples: size is 128 * 2 = 256 bytes
128 * 32bit samples: size is 128 * 4 = 512 bytes
129 * It is simpler to place constraint for buffer and period based on
131 * McBSP3 as example again (16 or 32 bit samples):
132 * 1 channel (mono): size is 128 frames (128 words)
133 * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words)
134 * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words)
136 if (mcbsp
->pdata
->buffer_size
) {
138 * Rule for the buffer size. We should not allow
139 * smaller buffer than the FIFO size to avoid underruns.
140 * This applies only for the playback stream.
142 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
143 snd_pcm_hw_rule_add(substream
->runtime
, 0,
144 SNDRV_PCM_HW_PARAM_BUFFER_SIZE
,
145 omap_mcbsp_hwrule_min_buffersize
,
147 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
149 /* Make sure, that the period size is always even */
150 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
151 SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, 2);
154 snd_soc_dai_set_dma_data(cpu_dai
, substream
,
155 &mcbsp
->dma_data
[substream
->stream
]);
160 static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream
*substream
,
161 struct snd_soc_dai
*cpu_dai
)
163 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
165 if (!cpu_dai
->active
) {
166 omap_mcbsp_free(mcbsp
);
167 mcbsp
->configured
= 0;
171 static int omap_mcbsp_dai_trigger(struct snd_pcm_substream
*substream
, int cmd
,
172 struct snd_soc_dai
*cpu_dai
)
174 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
175 int err
= 0, play
= (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
);
178 case SNDRV_PCM_TRIGGER_START
:
179 case SNDRV_PCM_TRIGGER_RESUME
:
180 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
182 omap_mcbsp_start(mcbsp
, play
, !play
);
185 case SNDRV_PCM_TRIGGER_STOP
:
186 case SNDRV_PCM_TRIGGER_SUSPEND
:
187 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
188 omap_mcbsp_stop(mcbsp
, play
, !play
);
198 static snd_pcm_sframes_t
omap_mcbsp_dai_delay(
199 struct snd_pcm_substream
*substream
,
200 struct snd_soc_dai
*dai
)
202 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
203 struct snd_soc_dai
*cpu_dai
= rtd
->cpu_dai
;
204 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
206 snd_pcm_sframes_t delay
;
208 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
209 fifo_use
= omap_mcbsp_get_tx_delay(mcbsp
);
211 fifo_use
= omap_mcbsp_get_rx_delay(mcbsp
);
214 * Divide the used locations with the channel count to get the
215 * FIFO usage in samples (don't care about partial samples in the
218 delay
= fifo_use
/ substream
->runtime
->channels
;
223 static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream
*substream
,
224 struct snd_pcm_hw_params
*params
,
225 struct snd_soc_dai
*cpu_dai
)
227 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
228 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp
->cfg_regs
;
229 struct omap_pcm_dma_data
*dma_data
;
230 int wlen
, channels
, wpf
;
232 unsigned int format
, div
, framesize
, master
;
234 dma_data
= snd_soc_dai_get_dma_data(cpu_dai
, substream
);
235 channels
= params_channels(params
);
237 switch (params_format(params
)) {
238 case SNDRV_PCM_FORMAT_S16_LE
:
241 case SNDRV_PCM_FORMAT_S32_LE
:
247 if (mcbsp
->pdata
->buffer_size
) {
248 dma_data
->set_threshold
= omap_mcbsp_set_threshold
;
249 if (mcbsp
->dma_op_mode
== MCBSP_DMA_MODE_THRESHOLD
) {
250 int period_words
, max_thrsh
;
253 period_words
= params_period_bytes(params
) / (wlen
/ 8);
254 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
255 max_thrsh
= mcbsp
->max_tx_thres
;
257 max_thrsh
= mcbsp
->max_rx_thres
;
259 * Use sDMA packet mode if McBSP is in threshold mode:
260 * If period words less than the FIFO size the packet
261 * size is set to the number of period words, otherwise
262 * Look for the biggest threshold value which divides
263 * the period size evenly.
265 divider
= period_words
/ max_thrsh
;
266 if (period_words
% max_thrsh
)
268 while (period_words
% divider
&&
269 divider
< period_words
)
271 if (divider
== period_words
)
274 pkt_size
= period_words
/ divider
;
275 } else if (channels
> 1) {
276 /* Use packet mode for non mono streams */
281 dma_data
->packet_size
= pkt_size
;
283 if (mcbsp
->configured
) {
284 /* McBSP already configured by another stream */
288 regs
->rcr2
&= ~(RPHASE
| RFRLEN2(0x7f) | RWDLEN2(7));
289 regs
->xcr2
&= ~(RPHASE
| XFRLEN2(0x7f) | XWDLEN2(7));
290 regs
->rcr1
&= ~(RFRLEN1(0x7f) | RWDLEN1(7));
291 regs
->xcr1
&= ~(XFRLEN1(0x7f) | XWDLEN1(7));
292 format
= mcbsp
->fmt
& SND_SOC_DAIFMT_FORMAT_MASK
;
294 if (channels
== 2 && (format
== SND_SOC_DAIFMT_I2S
||
295 format
== SND_SOC_DAIFMT_LEFT_J
)) {
296 /* Use dual-phase frames */
297 regs
->rcr2
|= RPHASE
;
298 regs
->xcr2
|= XPHASE
;
299 /* Set 1 word per (McBSP) frame for phase1 and phase2 */
301 regs
->rcr2
|= RFRLEN2(wpf
- 1);
302 regs
->xcr2
|= XFRLEN2(wpf
- 1);
305 regs
->rcr1
|= RFRLEN1(wpf
- 1);
306 regs
->xcr1
|= XFRLEN1(wpf
- 1);
308 switch (params_format(params
)) {
309 case SNDRV_PCM_FORMAT_S16_LE
:
310 /* Set word lengths */
311 regs
->rcr2
|= RWDLEN2(OMAP_MCBSP_WORD_16
);
312 regs
->rcr1
|= RWDLEN1(OMAP_MCBSP_WORD_16
);
313 regs
->xcr2
|= XWDLEN2(OMAP_MCBSP_WORD_16
);
314 regs
->xcr1
|= XWDLEN1(OMAP_MCBSP_WORD_16
);
316 case SNDRV_PCM_FORMAT_S32_LE
:
317 /* Set word lengths */
318 regs
->rcr2
|= RWDLEN2(OMAP_MCBSP_WORD_32
);
319 regs
->rcr1
|= RWDLEN1(OMAP_MCBSP_WORD_32
);
320 regs
->xcr2
|= XWDLEN2(OMAP_MCBSP_WORD_32
);
321 regs
->xcr1
|= XWDLEN1(OMAP_MCBSP_WORD_32
);
324 /* Unsupported PCM format */
328 /* In McBSP master modes, FRAME (i.e. sample rate) is generated
329 * by _counting_ BCLKs. Calculate frame size in BCLKs */
330 master
= mcbsp
->fmt
& SND_SOC_DAIFMT_MASTER_MASK
;
331 if (master
== SND_SOC_DAIFMT_CBS_CFS
) {
332 div
= mcbsp
->clk_div
? mcbsp
->clk_div
: 1;
333 framesize
= (mcbsp
->in_freq
/ div
) / params_rate(params
);
335 if (framesize
< wlen
* channels
) {
336 printk(KERN_ERR
"%s: not enough bandwidth for desired rate and "
337 "channels\n", __func__
);
341 framesize
= wlen
* channels
;
343 /* Set FS period and length in terms of bit clock periods */
344 regs
->srgr2
&= ~FPER(0xfff);
345 regs
->srgr1
&= ~FWID(0xff);
347 case SND_SOC_DAIFMT_I2S
:
348 case SND_SOC_DAIFMT_LEFT_J
:
349 regs
->srgr2
|= FPER(framesize
- 1);
350 regs
->srgr1
|= FWID((framesize
>> 1) - 1);
352 case SND_SOC_DAIFMT_DSP_A
:
353 case SND_SOC_DAIFMT_DSP_B
:
354 regs
->srgr2
|= FPER(framesize
- 1);
355 regs
->srgr1
|= FWID(0);
359 omap_mcbsp_config(mcbsp
, &mcbsp
->cfg_regs
);
361 mcbsp
->configured
= 1;
367 * This must be called before _set_clkdiv and _set_sysclk since McBSP register
368 * cache is initialized here
370 static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
373 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
374 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp
->cfg_regs
;
377 if (mcbsp
->configured
)
381 memset(regs
, 0, sizeof(*regs
));
382 /* Generic McBSP register settings */
383 regs
->spcr2
|= XINTM(3) | FREE
;
384 regs
->spcr1
|= RINTM(3);
385 /* RFIG and XFIG are not defined in 2430 and on OMAP3+ */
386 if (!mcbsp
->pdata
->has_ccr
) {
391 /* Configure XCCR/RCCR only for revisions which have ccr registers */
392 if (mcbsp
->pdata
->has_ccr
) {
393 regs
->xccr
= DXENDLY(1) | XDMAEN
| XDISABLE
;
394 regs
->rccr
= RFULL_CYCLE
| RDMAEN
| RDISABLE
;
397 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
398 case SND_SOC_DAIFMT_I2S
:
399 /* 1-bit data delay */
400 regs
->rcr2
|= RDATDLY(1);
401 regs
->xcr2
|= XDATDLY(1);
403 case SND_SOC_DAIFMT_LEFT_J
:
404 /* 0-bit data delay */
405 regs
->rcr2
|= RDATDLY(0);
406 regs
->xcr2
|= XDATDLY(0);
407 regs
->spcr1
|= RJUST(2);
408 /* Invert FS polarity configuration */
411 case SND_SOC_DAIFMT_DSP_A
:
412 /* 1-bit data delay */
413 regs
->rcr2
|= RDATDLY(1);
414 regs
->xcr2
|= XDATDLY(1);
415 /* Invert FS polarity configuration */
418 case SND_SOC_DAIFMT_DSP_B
:
419 /* 0-bit data delay */
420 regs
->rcr2
|= RDATDLY(0);
421 regs
->xcr2
|= XDATDLY(0);
422 /* Invert FS polarity configuration */
426 /* Unsupported data format */
430 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
431 case SND_SOC_DAIFMT_CBS_CFS
:
432 /* McBSP master. Set FS and bit clocks as outputs */
433 regs
->pcr0
|= FSXM
| FSRM
|
435 /* Sample rate generator drives the FS */
438 case SND_SOC_DAIFMT_CBM_CFM
:
442 /* Unsupported master/slave configuration */
446 /* Set bit clock (CLKX/CLKR) and FS polarities */
447 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
448 case SND_SOC_DAIFMT_NB_NF
:
451 * FS active low. TX data driven on falling edge of bit clock
452 * and RX data sampled on rising edge of bit clock.
454 regs
->pcr0
|= FSXP
| FSRP
|
457 case SND_SOC_DAIFMT_NB_IF
:
458 regs
->pcr0
|= CLKXP
| CLKRP
;
460 case SND_SOC_DAIFMT_IB_NF
:
461 regs
->pcr0
|= FSXP
| FSRP
;
463 case SND_SOC_DAIFMT_IB_IF
:
469 regs
->pcr0
^= FSXP
| FSRP
;
474 static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai
*cpu_dai
,
477 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
478 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp
->cfg_regs
;
480 if (div_id
!= OMAP_MCBSP_CLKGDV
)
483 mcbsp
->clk_div
= div
;
484 regs
->srgr1
&= ~CLKGDV(0xff);
485 regs
->srgr1
|= CLKGDV(div
- 1);
490 static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
491 int clk_id
, unsigned int freq
,
494 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
495 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp
->cfg_regs
;
499 if (freq
== mcbsp
->in_freq
)
505 mcbsp
->in_freq
= freq
;
506 regs
->srgr2
&= ~CLKSM
;
507 regs
->pcr0
&= ~SCLKME
;
510 case OMAP_MCBSP_SYSCLK_CLK
:
511 regs
->srgr2
|= CLKSM
;
513 case OMAP_MCBSP_SYSCLK_CLKS_FCLK
:
518 err
= omap2_mcbsp_set_clks_src(mcbsp
,
519 MCBSP_CLKS_PRCM_SRC
);
521 case OMAP_MCBSP_SYSCLK_CLKS_EXT
:
526 err
= omap2_mcbsp_set_clks_src(mcbsp
,
530 case OMAP_MCBSP_SYSCLK_CLKX_EXT
:
531 regs
->srgr2
|= CLKSM
;
532 case OMAP_MCBSP_SYSCLK_CLKR_EXT
:
533 regs
->pcr0
|= SCLKME
;
542 static const struct snd_soc_dai_ops mcbsp_dai_ops
= {
543 .startup
= omap_mcbsp_dai_startup
,
544 .shutdown
= omap_mcbsp_dai_shutdown
,
545 .trigger
= omap_mcbsp_dai_trigger
,
546 .delay
= omap_mcbsp_dai_delay
,
547 .hw_params
= omap_mcbsp_dai_hw_params
,
548 .set_fmt
= omap_mcbsp_dai_set_dai_fmt
,
549 .set_clkdiv
= omap_mcbsp_dai_set_clkdiv
,
550 .set_sysclk
= omap_mcbsp_dai_set_dai_sysclk
,
553 static int omap_mcbsp_probe(struct snd_soc_dai
*dai
)
555 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(dai
);
557 pm_runtime_enable(mcbsp
->dev
);
562 static int omap_mcbsp_remove(struct snd_soc_dai
*dai
)
564 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(dai
);
566 pm_runtime_disable(mcbsp
->dev
);
571 static struct snd_soc_dai_driver omap_mcbsp_dai
= {
572 .probe
= omap_mcbsp_probe
,
573 .remove
= omap_mcbsp_remove
,
577 .rates
= OMAP_MCBSP_RATES
,
578 .formats
= SNDRV_PCM_FMTBIT_S16_LE
| SNDRV_PCM_FMTBIT_S32_LE
,
583 .rates
= OMAP_MCBSP_RATES
,
584 .formats
= SNDRV_PCM_FMTBIT_S16_LE
| SNDRV_PCM_FMTBIT_S32_LE
,
586 .ops
= &mcbsp_dai_ops
,
589 static int omap_mcbsp_st_info_volsw(struct snd_kcontrol
*kcontrol
,
590 struct snd_ctl_elem_info
*uinfo
)
592 struct soc_mixer_control
*mc
=
593 (struct soc_mixer_control
*)kcontrol
->private_value
;
597 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
599 uinfo
->value
.integer
.min
= min
;
600 uinfo
->value
.integer
.max
= max
;
604 #define OMAP_MCBSP_ST_CHANNEL_VOLUME(channel) \
606 omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \
607 struct snd_ctl_elem_value *uc) \
609 struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
610 struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
611 struct soc_mixer_control *mc = \
612 (struct soc_mixer_control *)kc->private_value; \
615 int val = uc->value.integer.value[0]; \
617 if (val < min || val > max) \
620 /* OMAP McBSP implementation uses index values 0..4 */ \
621 return omap_st_set_chgain(mcbsp, channel, val); \
625 omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \
626 struct snd_ctl_elem_value *uc) \
628 struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
629 struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
632 if (omap_st_get_chgain(mcbsp, channel, &chgain)) \
635 uc->value.integer.value[0] = chgain; \
639 OMAP_MCBSP_ST_CHANNEL_VOLUME(0)
640 OMAP_MCBSP_ST_CHANNEL_VOLUME(1)
642 static int omap_mcbsp_st_put_mode(struct snd_kcontrol
*kcontrol
,
643 struct snd_ctl_elem_value
*ucontrol
)
645 struct snd_soc_dai
*cpu_dai
= snd_kcontrol_chip(kcontrol
);
646 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
647 u8 value
= ucontrol
->value
.integer
.value
[0];
649 if (value
== omap_st_is_enabled(mcbsp
))
653 omap_st_enable(mcbsp
);
655 omap_st_disable(mcbsp
);
660 static int omap_mcbsp_st_get_mode(struct snd_kcontrol
*kcontrol
,
661 struct snd_ctl_elem_value
*ucontrol
)
663 struct snd_soc_dai
*cpu_dai
= snd_kcontrol_chip(kcontrol
);
664 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
666 ucontrol
->value
.integer
.value
[0] = omap_st_is_enabled(mcbsp
);
670 #define OMAP_MCBSP_ST_CONTROLS(port) \
671 static const struct snd_kcontrol_new omap_mcbsp##port##_st_controls[] = { \
672 SOC_SINGLE_EXT("McBSP" #port " Sidetone Switch", 1, 0, 1, 0, \
673 omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), \
674 OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 0 Volume", \
676 omap_mcbsp_get_st_ch0_volume, \
677 omap_mcbsp_set_st_ch0_volume), \
678 OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 1 Volume", \
680 omap_mcbsp_get_st_ch1_volume, \
681 omap_mcbsp_set_st_ch1_volume), \
684 OMAP_MCBSP_ST_CONTROLS(2);
685 OMAP_MCBSP_ST_CONTROLS(3);
687 int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime
*rtd
)
689 struct snd_soc_dai
*cpu_dai
= rtd
->cpu_dai
;
690 struct omap_mcbsp
*mcbsp
= snd_soc_dai_get_drvdata(cpu_dai
);
692 if (!mcbsp
->st_data
) {
693 dev_warn(mcbsp
->dev
, "No sidetone data for port\n");
698 case 2: /* McBSP 2 */
699 return snd_soc_add_dai_controls(cpu_dai
,
700 omap_mcbsp2_st_controls
,
701 ARRAY_SIZE(omap_mcbsp2_st_controls
));
702 case 3: /* McBSP 3 */
703 return snd_soc_add_dai_controls(cpu_dai
,
704 omap_mcbsp3_st_controls
,
705 ARRAY_SIZE(omap_mcbsp3_st_controls
));
712 EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls
);
714 static struct omap_mcbsp_platform_data omap2420_pdata
= {
719 static struct omap_mcbsp_platform_data omap2430_pdata
= {
725 static struct omap_mcbsp_platform_data omap3_pdata
= {
732 static struct omap_mcbsp_platform_data omap4_pdata
= {
739 static const struct of_device_id omap_mcbsp_of_match
[] = {
741 .compatible
= "ti,omap2420-mcbsp",
742 .data
= &omap2420_pdata
,
745 .compatible
= "ti,omap2430-mcbsp",
746 .data
= &omap2430_pdata
,
749 .compatible
= "ti,omap3-mcbsp",
750 .data
= &omap3_pdata
,
753 .compatible
= "ti,omap4-mcbsp",
754 .data
= &omap4_pdata
,
758 MODULE_DEVICE_TABLE(of
, omap_mcbsp_of_match
);
760 static int asoc_mcbsp_probe(struct platform_device
*pdev
)
762 struct omap_mcbsp_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
763 struct omap_mcbsp
*mcbsp
;
764 const struct of_device_id
*match
;
767 match
= of_match_device(omap_mcbsp_of_match
, &pdev
->dev
);
769 struct device_node
*node
= pdev
->dev
.of_node
;
772 pdata
= devm_kzalloc(&pdev
->dev
,
773 sizeof(struct omap_mcbsp_platform_data
),
778 memcpy(pdata
, match
->data
, sizeof(*pdata
));
779 if (!of_property_read_u32(node
, "ti,buffer-size", &buffer_size
))
780 pdata
->buffer_size
= buffer_size
;
782 dev_err(&pdev
->dev
, "missing platform data.\n");
785 mcbsp
= devm_kzalloc(&pdev
->dev
, sizeof(struct omap_mcbsp
), GFP_KERNEL
);
789 mcbsp
->id
= pdev
->id
;
790 mcbsp
->pdata
= pdata
;
791 mcbsp
->dev
= &pdev
->dev
;
792 platform_set_drvdata(pdev
, mcbsp
);
794 ret
= omap_mcbsp_init(pdev
);
796 return snd_soc_register_dai(&pdev
->dev
, &omap_mcbsp_dai
);
801 static int asoc_mcbsp_remove(struct platform_device
*pdev
)
803 struct omap_mcbsp
*mcbsp
= platform_get_drvdata(pdev
);
805 snd_soc_unregister_dai(&pdev
->dev
);
807 if (mcbsp
->pdata
->ops
&& mcbsp
->pdata
->ops
->free
)
808 mcbsp
->pdata
->ops
->free(mcbsp
->id
);
810 omap_mcbsp_sysfs_remove(mcbsp
);
812 clk_put(mcbsp
->fclk
);
814 platform_set_drvdata(pdev
, NULL
);
819 static struct platform_driver asoc_mcbsp_driver
= {
821 .name
= "omap-mcbsp",
822 .owner
= THIS_MODULE
,
823 .of_match_table
= omap_mcbsp_of_match
,
826 .probe
= asoc_mcbsp_probe
,
827 .remove
= asoc_mcbsp_remove
,
830 module_platform_driver(asoc_mcbsp_driver
);
832 MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
833 MODULE_DESCRIPTION("OMAP I2S SoC Interface");
834 MODULE_LICENSE("GPL");
835 MODULE_ALIAS("platform:omap-mcbsp");