arch/powerpc/kvm/booke_guest.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright IBM Corp. 2007
  16  *
  17  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  18  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  19  */
  20
  21 #include <linux/errno.h>
  22 #include <linux/err.h>
  23 #include <linux/kvm_host.h>
  24 #include <linux/module.h>
  25 #include <linux/vmalloc.h>
  26 #include <linux/fs.h>
  27 #include <asm/cputable.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/kvm_ppc.h>
  30
  31 #include "44x_tlb.h"
  32
  33 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  34 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  35
  36 struct kvm_stats_debugfs_item debugfs_entries[] = {
  37         { "exits",      VCPU_STAT(sum_exits) },
  38         { "mmio",       VCPU_STAT(mmio_exits) },
  39         { "dcr",        VCPU_STAT(dcr_exits) },
  40         { "sig",        VCPU_STAT(signal_exits) },
  41         { "light",      VCPU_STAT(light_exits) },
  42         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
  43         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
  44         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
  45         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
  46         { "sysc",       VCPU_STAT(syscall_exits) },
  47         { "isi",        VCPU_STAT(isi_exits) },
  48         { "dsi",        VCPU_STAT(dsi_exits) },
  49         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
  50         { "dec",        VCPU_STAT(dec_exits) },
  51         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
  52         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  53         { NULL }
  54 };
  55
  56 static const u32 interrupt_msr_mask[16] = {
  57         [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
  58         [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
  59         [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
  60         [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
  61         [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
  62         [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
  63         [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
  64         [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
  65         [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
  66         [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
  67         [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
  68         [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
  69         [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
  70         [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
  71         [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
  72         [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
  73 };
  74
  75 const unsigned char exception_priority[] = {
  76         [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
  77         [BOOKE_INTERRUPT_INST_STORAGE] = 1,
  78         [BOOKE_INTERRUPT_ALIGNMENT] = 2,
  79         [BOOKE_INTERRUPT_PROGRAM] = 3,
  80         [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
  81         [BOOKE_INTERRUPT_SYSCALL] = 5,
  82         [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
  83         [BOOKE_INTERRUPT_DTLB_MISS] = 7,
  84         [BOOKE_INTERRUPT_ITLB_MISS] = 8,
  85         [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
  86         [BOOKE_INTERRUPT_DEBUG] = 10,
  87         [BOOKE_INTERRUPT_CRITICAL] = 11,
  88         [BOOKE_INTERRUPT_WATCHDOG] = 12,
  89         [BOOKE_INTERRUPT_EXTERNAL] = 13,
  90         [BOOKE_INTERRUPT_FIT] = 14,
  91         [BOOKE_INTERRUPT_DECREMENTER] = 15,
  92 };
  93
  94 const unsigned char priority_exception[] = {
  95         BOOKE_INTERRUPT_DATA_STORAGE,
  96         BOOKE_INTERRUPT_INST_STORAGE,
  97         BOOKE_INTERRUPT_ALIGNMENT,
  98         BOOKE_INTERRUPT_PROGRAM,
  99         BOOKE_INTERRUPT_FP_UNAVAIL,
 100         BOOKE_INTERRUPT_SYSCALL,
 101         BOOKE_INTERRUPT_AP_UNAVAIL,
 102         BOOKE_INTERRUPT_DTLB_MISS,
 103         BOOKE_INTERRUPT_ITLB_MISS,
 104         BOOKE_INTERRUPT_MACHINE_CHECK,
 105         BOOKE_INTERRUPT_DEBUG,
 106         BOOKE_INTERRUPT_CRITICAL,
 107         BOOKE_INTERRUPT_WATCHDOG,
 108         BOOKE_INTERRUPT_EXTERNAL,
 109         BOOKE_INTERRUPT_FIT,
 110         BOOKE_INTERRUPT_DECREMENTER,
 111 };
 112
 113
 114 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
 115 {
 116         struct tlbe *tlbe;
 117         int i;
 118
 119         printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
 120         printk("| %2s | %3s | %8s | %8s | %8s |\n",
 121                         "nr", "tid", "word0", "word1", "word2");
 122
 123         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
 124                 tlbe = &vcpu->arch.guest_tlb[i];
 125                 if (tlbe->word0 & PPC44x_TLB_VALID)
 126                         printk(" G%2d |  %02X | %08X | %08X | %08X |\n",
 127                                i, tlbe->tid, tlbe->word0, tlbe->word1,
 128                                tlbe->word2);
 129         }
 130
 131         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
 132                 tlbe = &vcpu->arch.shadow_tlb[i];
 133                 if (tlbe->word0 & PPC44x_TLB_VALID)
 134                         printk(" S%2d | %02X | %08X | %08X | %08X |\n",
 135                                i, tlbe->tid, tlbe->word0, tlbe->word1,
 136                                tlbe->word2);
 137         }
 138 }
 139
 140 /* TODO: use vcpu_printf() */
 141 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
 142 {
 143         int i;
 144
 145         printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
 146         printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
 147         printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
 148
 149         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
 150
 151         for (i = 0; i < 32; i += 4) {
 152                 printk("gpr%02d: %08x %08x %08x %08x\n", i,
 153                        vcpu->arch.gpr[i],
 154                        vcpu->arch.gpr[i+1],
 155                        vcpu->arch.gpr[i+2],
 156                        vcpu->arch.gpr[i+3]);
 157         }
 158 }
 159
 160 /* Check if we are ready to deliver the interrupt */
 161 static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
 162 {
 163         int r;
 164
 165         switch (interrupt) {
 166         case BOOKE_INTERRUPT_CRITICAL:
 167                 r = vcpu->arch.msr & MSR_CE;
 168                 break;
 169         case BOOKE_INTERRUPT_MACHINE_CHECK:
 170                 r = vcpu->arch.msr & MSR_ME;
 171                 break;
 172         case BOOKE_INTERRUPT_EXTERNAL:
 173                 r = vcpu->arch.msr & MSR_EE;
 174                 break;
 175         case BOOKE_INTERRUPT_DECREMENTER:
 176                 r = vcpu->arch.msr & MSR_EE;
 177                 break;
 178         case BOOKE_INTERRUPT_FIT:
 179                 r = vcpu->arch.msr & MSR_EE;
 180                 break;
 181         case BOOKE_INTERRUPT_WATCHDOG:
 182                 r = vcpu->arch.msr & MSR_CE;
 183                 break;
 184         case BOOKE_INTERRUPT_DEBUG:
 185                 r = vcpu->arch.msr & MSR_DE;
 186                 break;
 187         default:
 188                 r = 1;
 189         }
 190
 191         return r;
 192 }
 193
 194 static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
 195 {
 196         switch (interrupt) {
 197         case BOOKE_INTERRUPT_DECREMENTER:
 198                 vcpu->arch.tsr |= TSR_DIS;
 199                 break;
 200         }
 201
 202         vcpu->arch.srr0 = vcpu->arch.pc;
 203         vcpu->arch.srr1 = vcpu->arch.msr;
 204         vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
 205         kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
 206 }
 207
 208 /* Check pending exceptions and deliver one, if possible. */
 209 void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
 210 {
 211         unsigned long *pending = &vcpu->arch.pending_exceptions;
 212         unsigned int exception;
 213         unsigned int priority;
 214
 215         priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
 216         while (priority <= BOOKE_MAX_INTERRUPT) {
 217                 exception = priority_exception[priority];
 218                 if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
 219                         kvmppc_clear_exception(vcpu, exception);
 220                         kvmppc_deliver_interrupt(vcpu, exception);
 221                         break;
 222                 }
 223
 224                 priority = find_next_bit(pending,
 225                                          BITS_PER_BYTE * sizeof(*pending),
 226                                          priority + 1);
 227         }
 228 }
 229
 230 /**
 231  * kvmppc_handle_exit
 232  *
 233  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
 234  */
 235 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 236                        unsigned int exit_nr)
 237 {
 238         enum emulation_result er;
 239         int r = RESUME_HOST;
 240
 241         local_irq_enable();
 242
 243         run->exit_reason = KVM_EXIT_UNKNOWN;
 244         run->ready_for_interrupt_injection = 1;
 245
 246         switch (exit_nr) {
 247         case BOOKE_INTERRUPT_MACHINE_CHECK:
 248                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
 249                 kvmppc_dump_vcpu(vcpu);
 250                 r = RESUME_HOST;
 251                 break;
 252
 253         case BOOKE_INTERRUPT_EXTERNAL:
 254         case BOOKE_INTERRUPT_DECREMENTER:
 255                 /* Since we switched IVPR back to the host's value, the host
 256                  * handled this interrupt the moment we enabled interrupts.
 257                  * Now we just offer it a chance to reschedule the guest. */
 258
 259                 /* XXX At this point the TLB still holds our shadow TLB, so if
 260                  * we do reschedule the host will fault over it. Perhaps we
 261                  * should politely restore the host's entries to minimize
 262                  * misses before ceding control. */
 263                 if (need_resched())
 264                         cond_resched();
 265                 if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
 266                         vcpu->stat.dec_exits++;
 267                 else
 268                         vcpu->stat.ext_intr_exits++;
 269                 r = RESUME_GUEST;
 270                 break;
 271
 272         case BOOKE_INTERRUPT_PROGRAM:
 273                 if (vcpu->arch.msr & MSR_PR) {
 274                         /* Program traps generated by user-level software must be handled
 275                          * by the guest kernel. */
 276                         vcpu->arch.esr = vcpu->arch.fault_esr;
 277                         kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
 278                         r = RESUME_GUEST;
 279                         break;
 280                 }
 281
 282                 er = kvmppc_emulate_instruction(run, vcpu);
 283                 switch (er) {
 284                 case EMULATE_DONE:
 285                         /* Future optimization: only reload non-volatiles if
 286                          * they were actually modified by emulation. */
 287                         vcpu->stat.emulated_inst_exits++;
 288                         r = RESUME_GUEST_NV;
 289                         break;
 290                 case EMULATE_DO_DCR:
 291                         run->exit_reason = KVM_EXIT_DCR;
 292                         r = RESUME_HOST;
 293                         break;
 294                 case EMULATE_FAIL:
 295                         /* XXX Deliver Program interrupt to guest. */
 296                         printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
 297                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
 298                         /* For debugging, encode the failing instruction and
 299                          * report it to userspace. */
 300                         run->hw.hardware_exit_reason = ~0ULL << 32;
 301                         run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
 302                         r = RESUME_HOST;
 303                         break;
 304                 default:
 305                         BUG();
 306                 }
 307                 break;
 308
 309         case BOOKE_INTERRUPT_FP_UNAVAIL:
 310                 kvmppc_queue_exception(vcpu, exit_nr);
 311                 r = RESUME_GUEST;
 312                 break;
 313
 314         case BOOKE_INTERRUPT_DATA_STORAGE:
 315                 vcpu->arch.dear = vcpu->arch.fault_dear;
 316                 vcpu->arch.esr = vcpu->arch.fault_esr;
 317                 kvmppc_queue_exception(vcpu, exit_nr);
 318                 vcpu->stat.dsi_exits++;
 319                 r = RESUME_GUEST;
 320                 break;
 321
 322         case BOOKE_INTERRUPT_INST_STORAGE:
 323                 vcpu->arch.esr = vcpu->arch.fault_esr;
 324                 kvmppc_queue_exception(vcpu, exit_nr);
 325                 vcpu->stat.isi_exits++;
 326                 r = RESUME_GUEST;
 327                 break;
 328
 329         case BOOKE_INTERRUPT_SYSCALL:
 330                 kvmppc_queue_exception(vcpu, exit_nr);
 331                 vcpu->stat.syscall_exits++;
 332                 r = RESUME_GUEST;
 333                 break;
 334
 335         case BOOKE_INTERRUPT_DTLB_MISS: {
 336                 struct tlbe *gtlbe;
 337                 unsigned long eaddr = vcpu->arch.fault_dear;
 338                 gfn_t gfn;
 339
 340                 /* Check the guest TLB. */
 341                 gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
 342                 if (!gtlbe) {
 343                         /* The guest didn't have a mapping for it. */
 344                         kvmppc_queue_exception(vcpu, exit_nr);
 345                         vcpu->arch.dear = vcpu->arch.fault_dear;
 346                         vcpu->arch.esr = vcpu->arch.fault_esr;
 347                         vcpu->stat.dtlb_real_miss_exits++;
 348                         r = RESUME_GUEST;
 349                         break;
 350                 }
 351
 352                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
 353                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
 354
 355                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
 356                         /* The guest TLB had a mapping, but the shadow TLB
 357                          * didn't, and it is RAM. This could be because:
 358                          * a) the entry is mapping the host kernel, or
 359                          * b) the guest used a large mapping which we're faking
 360                          * Either way, we need to satisfy the fault without
 361                          * invoking the guest. */
 362                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
 363                                        gtlbe->word2);
 364                         vcpu->stat.dtlb_virt_miss_exits++;
 365                         r = RESUME_GUEST;
 366                 } else {
 367                         /* Guest has mapped and accessed a page which is not
 368                          * actually RAM. */
 369                         r = kvmppc_emulate_mmio(run, vcpu);
 370                 }
 371
 372                 break;
 373         }
 374
 375         case BOOKE_INTERRUPT_ITLB_MISS: {
 376                 struct tlbe *gtlbe;
 377                 unsigned long eaddr = vcpu->arch.pc;
 378                 gfn_t gfn;
 379
 380                 r = RESUME_GUEST;
 381
 382                 /* Check the guest TLB. */
 383                 gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
 384                 if (!gtlbe) {
 385                         /* The guest didn't have a mapping for it. */
 386                         kvmppc_queue_exception(vcpu, exit_nr);
 387                         vcpu->stat.itlb_real_miss_exits++;
 388                         break;
 389                 }
 390
 391                 vcpu->stat.itlb_virt_miss_exits++;
 392
 393                 gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
 394
 395                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
 396                         /* The guest TLB had a mapping, but the shadow TLB
 397                          * didn't. This could be because:
 398                          * a) the entry is mapping the host kernel, or
 399                          * b) the guest used a large mapping which we're faking
 400                          * Either way, we need to satisfy the fault without
 401                          * invoking the guest. */
 402                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
 403                                        gtlbe->word2);
 404                 } else {
 405                         /* Guest mapped and leaped at non-RAM! */
 406                         kvmppc_queue_exception(vcpu,
 407                                                BOOKE_INTERRUPT_MACHINE_CHECK);
 408                 }
 409
 410                 break;
 411         }
 412
 413         case BOOKE_INTERRUPT_DEBUG: {
 414                 u32 dbsr;
 415
 416                 vcpu->arch.pc = mfspr(SPRN_CSRR0);
 417
 418                 /* clear IAC events in DBSR register */
 419                 dbsr = mfspr(SPRN_DBSR);
 420                 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
 421                 mtspr(SPRN_DBSR, dbsr);
 422
 423                 run->exit_reason = KVM_EXIT_DEBUG;
 424                 r = RESUME_HOST;
 425                 break;
 426         }
 427
 428         default:
 429                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
 430                 BUG();
 431         }
 432
 433         local_irq_disable();
 434
 435         kvmppc_check_and_deliver_interrupts(vcpu);
 436
 437         /* Do some exit accounting. */
 438         vcpu->stat.sum_exits++;
 439         if (!(r & RESUME_HOST)) {
 440                 /* To avoid clobbering exit_reason, only check for signals if
 441                  * we aren't already exiting to userspace for some other
 442                  * reason. */
 443                 if (signal_pending(current)) {
 444                         run->exit_reason = KVM_EXIT_INTR;
 445                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
 446
 447                         vcpu->stat.signal_exits++;
 448                 } else {
 449                         vcpu->stat.light_exits++;
 450                 }
 451         } else {
 452                 switch (run->exit_reason) {
 453                 case KVM_EXIT_MMIO:
 454                         vcpu->stat.mmio_exits++;
 455                         break;
 456                 case KVM_EXIT_DCR:
 457                         vcpu->stat.dcr_exits++;
 458                         break;
 459                 case KVM_EXIT_INTR:
 460                         vcpu->stat.signal_exits++;
 461                         break;
 462                 }
 463         }
 464
 465         return r;
 466 }
 467
 468 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
 469 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
 470 {
 471         struct tlbe *tlbe = &vcpu->arch.guest_tlb[0];
 472
 473         tlbe->tid = 0;
 474         tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
 475         tlbe->word1 = 0;
 476         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
 477
 478         tlbe++;
 479         tlbe->tid = 0;
 480         tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
 481         tlbe->word1 = 0xef600000;
 482         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
 483                       | PPC44x_TLB_I | PPC44x_TLB_G;
 484
 485         vcpu->arch.pc = 0;
 486         vcpu->arch.msr = 0;
 487         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
 488
 489         vcpu->arch.shadow_pid = 1;
 490
 491         /* Eye-catching number so we know if the guest takes an interrupt
 492          * before it's programmed its own IVPR. */
 493         vcpu->arch.ivpr = 0x55550000;
 494
 495         /* Since the guest can directly access the timebase, it must know the
 496          * real timebase frequency. Accordingly, it must see the state of
 497          * CCR1[TCS]. */
 498         vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
 499
 500         return 0;
 501 }
 502
 503 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 504 {
 505         int i;
 506
 507         regs->pc = vcpu->arch.pc;
 508         regs->cr = vcpu->arch.cr;
 509         regs->ctr = vcpu->arch.ctr;
 510         regs->lr = vcpu->arch.lr;
 511         regs->xer = vcpu->arch.xer;
 512         regs->msr = vcpu->arch.msr;
 513         regs->srr0 = vcpu->arch.srr0;
 514         regs->srr1 = vcpu->arch.srr1;
 515         regs->pid = vcpu->arch.pid;
 516         regs->sprg0 = vcpu->arch.sprg0;
 517         regs->sprg1 = vcpu->arch.sprg1;
 518         regs->sprg2 = vcpu->arch.sprg2;
 519         regs->sprg3 = vcpu->arch.sprg3;
 520         regs->sprg5 = vcpu->arch.sprg4;
 521         regs->sprg6 = vcpu->arch.sprg5;
 522         regs->sprg7 = vcpu->arch.sprg6;
 523
 524         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
 525                 regs->gpr[i] = vcpu->arch.gpr[i];
 526
 527         return 0;
 528 }
 529
 530 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 531 {
 532         int i;
 533
 534         vcpu->arch.pc = regs->pc;
 535         vcpu->arch.cr = regs->cr;
 536         vcpu->arch.ctr = regs->ctr;
 537         vcpu->arch.lr = regs->lr;
 538         vcpu->arch.xer = regs->xer;
 539         vcpu->arch.msr = regs->msr;
 540         vcpu->arch.srr0 = regs->srr0;
 541         vcpu->arch.srr1 = regs->srr1;
 542         vcpu->arch.sprg0 = regs->sprg0;
 543         vcpu->arch.sprg1 = regs->sprg1;
 544         vcpu->arch.sprg2 = regs->sprg2;
 545         vcpu->arch.sprg3 = regs->sprg3;
 546         vcpu->arch.sprg5 = regs->sprg4;
 547         vcpu->arch.sprg6 = regs->sprg5;
 548         vcpu->arch.sprg7 = regs->sprg6;
 549
 550         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
 551                 vcpu->arch.gpr[i] = regs->gpr[i];
 552
 553         return 0;
 554 }
 555
 556 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
 557                                   struct kvm_sregs *sregs)
 558 {
 559         return -ENOTSUPP;
 560 }
 561
 562 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
 563                                   struct kvm_sregs *sregs)
 564 {
 565         return -ENOTSUPP;
 566 }
 567
 568 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
 569 {
 570         return -ENOTSUPP;
 571 }
 572
 573 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
 574 {
 575         return -ENOTSUPP;
 576 }
 577
 578 /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
 579 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
 580                                   struct kvm_translation *tr)
 581 {
 582         struct tlbe *gtlbe;
 583         int index;
 584         gva_t eaddr;
 585         u8 pid;
 586         u8 as;
 587
 588         eaddr = tr->linear_address;
 589         pid = (tr->linear_address >> 32) & 0xff;
 590         as = (tr->linear_address >> 40) & 0x1;
 591
 592         index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
 593         if (index == -1) {
 594                 tr->valid = 0;
 595                 return 0;
 596         }
 597
 598         gtlbe = &vcpu->arch.guest_tlb[index];
 599
 600         tr->physical_address = tlb_xlate(gtlbe, eaddr);
 601         /* XXX what does "writeable" and "usermode" even mean? */
 602         tr->valid = 1;
 603
 604         return 0;
 605 }