| blob | 41aca06682aa19e294ac54160500da46594cb97a |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
58 _TIF_MCCK_PENDING)
60 #define BASED(name) name-system_call(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 basr %r2,%r0
65 brasl %r14,trace_hardirqs_on_caller
66 .endm
68 .macro TRACE_IRQS_OFF
69 basr %r2,%r0
70 brasl %r14,trace_hardirqs_off_caller
71 .endm
73 .macro TRACE_IRQS_CHECK
74 basr %r2,%r0
75 tm SP_PSW(%r15),0x03 # irqs enabled?
76 jz 0f
77 brasl %r14,trace_hardirqs_on_caller
78 j 1f
79 0: brasl %r14,trace_hardirqs_off_caller
80 1:
81 .endm
82 #else
83 #define TRACE_IRQS_ON
84 #define TRACE_IRQS_OFF
85 #define TRACE_IRQS_CHECK
86 #endif
88 #ifdef CONFIG_LOCKDEP
89 .macro LOCKDEP_SYS_EXIT
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
91 jz 0f
92 brasl %r14,lockdep_sys_exit
93 0:
94 .endm
95 #else
96 #define LOCKDEP_SYS_EXIT
97 #endif
99 .macro STORE_TIMER lc_offset
100 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
101 stpt \lc_offset
102 #endif
103 .endm
105 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
106 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
107 lg %r10,\lc_from
108 slg %r10,\lc_to
109 alg %r10,\lc_sum
110 stg %r10,\lc_sum
111 .endm
112 #endif
114 /*
115 * Register usage in interrupt handlers:
116 * R9 - pointer to current task structure
117 * R13 - pointer to literal pool
118 * R14 - return register for function calls
119 * R15 - kernel stack pointer
120 */
122 .macro SAVE_ALL_BASE savearea
123 stmg %r12,%r15,\savearea
124 larl %r13,system_call
125 .endm
127 .macro SAVE_ALL_SVC psworg,savearea
128 la %r12,\psworg
129 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
130 .endm
132 .macro SAVE_ALL_SYNC psworg,savearea
133 la %r12,\psworg
134 tm \psworg+1,0x01 # test problem state bit
135 jz 2f # skip stack setup save
136 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
137 #ifdef CONFIG_CHECK_STACK
138 j 3f
139 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
140 jz stack_overflow
141 3:
142 #endif
143 2:
144 .endm
146 .macro SAVE_ALL_ASYNC psworg,savearea
147 la %r12,\psworg
148 tm \psworg+1,0x01 # test problem state bit
149 jnz 1f # from user -> load kernel stack
150 clc \psworg+8(8),BASED(.Lcritical_end)
151 jhe 0f
152 clc \psworg+8(8),BASED(.Lcritical_start)
153 jl 0f
154 brasl %r14,cleanup_critical
155 tm 1(%r12),0x01 # retest problem state after cleanup
156 jnz 1f
157 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
158 slgr %r14,%r15
159 srag %r14,%r14,STACK_SHIFT
160 jz 2f
161 1: lg %r15,__LC_ASYNC_STACK # load async stack
162 #ifdef CONFIG_CHECK_STACK
163 j 3f
164 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
165 jz stack_overflow
166 3:
167 #endif
168 2:
169 .endm
171 .macro CREATE_STACK_FRAME psworg,savearea
172 aghi %r15,-SP_SIZE # make room for registers & psw
173 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
174 la %r12,\psworg
175 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
176 icm %r12,12,__LC_SVC_ILC
177 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
178 st %r12,SP_ILC(%r15)
179 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
180 la %r12,0
181 stg %r12,__SF_BACKCHAIN(%r15)
182 .endm
184 .macro RESTORE_ALL psworg,sync
185 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
186 .if !\sync
187 ni \psworg+1,0xfd # clear wait state bit
188 .endif
189 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
190 STORE_TIMER __LC_EXIT_TIMER
191 lpswe \psworg # back to caller
192 .endm
194 /*
195 * Scheduler resume function, called by switch_to
196 * gpr2 = (task_struct *) prev
197 * gpr3 = (task_struct *) next
198 * Returns:
199 * gpr2 = prev
200 */
201 .globl __switch_to
202 __switch_to:
203 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
204 jz __switch_to_noper # if not we're fine
205 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
206 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
207 je __switch_to_noper # we got away without bashing TLB's
208 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
209 __switch_to_noper:
210 lg %r4,__THREAD_info(%r2) # get thread_info of prev
211 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
212 jz __switch_to_no_mcck
213 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
214 lg %r4,__THREAD_info(%r3) # get thread_info of next
215 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
216 __switch_to_no_mcck:
217 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
218 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
219 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
220 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
221 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
222 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
223 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
224 stg %r3,__LC_THREAD_INFO
225 aghi %r3,STACK_SIZE
226 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
227 br %r14
229 __critical_start:
230 /*
231 * SVC interrupt handler routine. System calls are synchronous events and
232 * are executed with interrupts enabled.
233 */
235 .globl system_call
236 system_call:
237 STORE_TIMER __LC_SYNC_ENTER_TIMER
238 sysc_saveall:
239 SAVE_ALL_BASE __LC_SAVE_AREA
240 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
241 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
242 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
243 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
244 sysc_vtime:
245 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
246 sysc_stime:
247 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
248 sysc_update:
249 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
250 #endif
251 sysc_do_svc:
252 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
253 slag %r7,%r7,2 # *4 and test for svc 0
254 jnz sysc_nr_ok
255 # svc 0: system call number in %r1
256 cl %r1,BASED(.Lnr_syscalls)
257 jnl sysc_nr_ok
258 lgfr %r7,%r1 # clear high word in r1
259 slag %r7,%r7,2 # svc 0: system call number in %r1
260 sysc_nr_ok:
261 mvc SP_ARGS(8,%r15),SP_R7(%r15)
262 sysc_do_restart:
263 larl %r10,sys_call_table
264 #ifdef CONFIG_COMPAT
265 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
266 jno sysc_noemu
267 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
268 sysc_noemu:
269 #endif
270 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
271 lgf %r8,0(%r7,%r10) # load address of system call routine
272 jnz sysc_tracesys
273 basr %r14,%r8 # call sys_xxxx
274 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
276 sysc_return:
277 tm __TI_flags+7(%r9),_TIF_WORK_SVC
278 jnz sysc_work # there is work to do (signals etc.)
279 sysc_restore:
280 #ifdef CONFIG_TRACE_IRQFLAGS
281 larl %r1,sysc_restore_trace_psw
282 lpswe 0(%r1)
283 sysc_restore_trace:
284 TRACE_IRQS_CHECK
285 LOCKDEP_SYS_EXIT
286 #endif
287 sysc_leave:
288 RESTORE_ALL __LC_RETURN_PSW,1
289 sysc_done:
291 #ifdef CONFIG_TRACE_IRQFLAGS
292 .align 8
293 .globl sysc_restore_trace_psw
294 sysc_restore_trace_psw:
295 .quad 0, sysc_restore_trace
296 #endif
298 #
299 # recheck if there is more work to do
300 #
301 sysc_work_loop:
302 tm __TI_flags+7(%r9),_TIF_WORK_SVC
303 jz sysc_restore # there is no work to do
304 #
305 # One of the work bits is on. Find out which one.
306 #
307 sysc_work:
308 tm SP_PSW+1(%r15),0x01 # returning to user ?
309 jno sysc_restore
310 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
311 jo sysc_mcck_pending
312 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
313 jo sysc_reschedule
314 tm __TI_flags+7(%r9),_TIF_SIGPENDING
315 jnz sysc_sigpending
316 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
317 jnz sysc_notify_resume
318 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
319 jo sysc_restart
320 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
321 jo sysc_singlestep
322 j sysc_restore
323 sysc_work_done:
325 #
326 # _TIF_NEED_RESCHED is set, call schedule
327 #
328 sysc_reschedule:
329 larl %r14,sysc_work_loop
330 jg schedule # return point is sysc_return
332 #
333 # _TIF_MCCK_PENDING is set, call handler
334 #
335 sysc_mcck_pending:
336 larl %r14,sysc_work_loop
337 jg s390_handle_mcck # TIF bit will be cleared by handler
339 #
340 # _TIF_SIGPENDING is set, call do_signal
341 #
342 sysc_sigpending:
343 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
344 la %r2,SP_PTREGS(%r15) # load pt_regs
345 brasl %r14,do_signal # call do_signal
346 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
347 jo sysc_restart
348 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
349 jo sysc_singlestep
350 j sysc_work_loop
352 #
353 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
354 #
355 sysc_notify_resume:
356 la %r2,SP_PTREGS(%r15) # load pt_regs
357 larl %r14,sysc_work_loop
358 jg do_notify_resume # call do_notify_resume
360 #
361 # _TIF_RESTART_SVC is set, set up registers and restart svc
362 #
363 sysc_restart:
364 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
365 lg %r7,SP_R2(%r15) # load new svc number
366 slag %r7,%r7,2 # *4
367 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
368 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
369 j sysc_do_restart # restart svc
371 #
372 # _TIF_SINGLE_STEP is set, call do_single_step
373 #
374 sysc_singlestep:
375 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
376 lhi %r0,__LC_PGM_OLD_PSW
377 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
378 la %r2,SP_PTREGS(%r15) # address of register-save area
379 larl %r14,sysc_return # load adr. of system return
380 jg do_single_step # branch to do_sigtrap
382 #
383 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
384 # and after the system call
385 #
386 sysc_tracesys:
387 la %r2,SP_PTREGS(%r15) # load pt_regs
388 la %r3,0
389 srl %r7,2
390 stg %r7,SP_R2(%r15)
391 brasl %r14,do_syscall_trace_enter
392 lghi %r0,NR_syscalls
393 clgr %r0,%r2
394 jnh sysc_tracenogo
395 slag %r7,%r2,2 # *4
396 lgf %r8,0(%r7,%r10)
397 sysc_tracego:
398 lmg %r3,%r6,SP_R3(%r15)
399 lg %r2,SP_ORIG_R2(%r15)
400 basr %r14,%r8 # call sys_xxx
401 stg %r2,SP_R2(%r15) # store return value
402 sysc_tracenogo:
403 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
404 jz sysc_return
405 la %r2,SP_PTREGS(%r15) # load pt_regs
406 larl %r14,sysc_return # return point is sysc_return
407 jg do_syscall_trace_exit
409 #
410 # a new process exits the kernel with ret_from_fork
411 #
412 .globl ret_from_fork
413 ret_from_fork:
414 lg %r13,__LC_SVC_NEW_PSW+8
415 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
416 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
417 jo 0f
418 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
419 0: brasl %r14,schedule_tail
420 TRACE_IRQS_ON
421 stosm 24(%r15),0x03 # reenable interrupts
422 j sysc_return
424 #
425 # kernel_execve function needs to deal with pt_regs that is not
426 # at the usual place
427 #
428 .globl kernel_execve
429 kernel_execve:
430 stmg %r12,%r15,96(%r15)
431 lgr %r14,%r15
432 aghi %r15,-SP_SIZE
433 stg %r14,__SF_BACKCHAIN(%r15)
434 la %r12,SP_PTREGS(%r15)
435 xc 0(__PT_SIZE,%r12),0(%r12)
436 lgr %r5,%r12
437 brasl %r14,do_execve
438 ltgfr %r2,%r2
439 je 0f
440 aghi %r15,SP_SIZE
441 lmg %r12,%r15,96(%r15)
442 br %r14
443 # execve succeeded.
444 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
445 lg %r15,__LC_KERNEL_STACK # load ksp
446 aghi %r15,-SP_SIZE # make room for registers & psw
447 lg %r13,__LC_SVC_NEW_PSW+8
448 lg %r9,__LC_THREAD_INFO
449 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
450 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
451 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
452 brasl %r14,execve_tail
453 j sysc_return
455 /*
456 * Program check handler routine
457 */
459 .globl pgm_check_handler
460 pgm_check_handler:
461 /*
462 * First we need to check for a special case:
463 * Single stepping an instruction that disables the PER event mask will
464 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
465 * For a single stepped SVC the program check handler gets control after
466 * the SVC new PSW has been loaded. But we want to execute the SVC first and
467 * then handle the PER event. Therefore we update the SVC old PSW to point
468 * to the pgm_check_handler and branch to the SVC handler after we checked
469 * if we have to load the kernel stack register.
470 * For every other possible cause for PER event without the PER mask set
471 * we just ignore the PER event (FIXME: is there anything we have to do
472 * for LPSW?).
473 */
474 STORE_TIMER __LC_SYNC_ENTER_TIMER
475 SAVE_ALL_BASE __LC_SAVE_AREA
476 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
477 jnz pgm_per # got per exception -> special case
478 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
479 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
480 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
481 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
482 jz pgm_no_vtime
483 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
484 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
485 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
486 pgm_no_vtime:
487 #endif
488 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
489 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
490 TRACE_IRQS_OFF
491 lgf %r3,__LC_PGM_ILC # load program interruption code
492 lghi %r8,0x7f
493 ngr %r8,%r3
494 pgm_do_call:
495 sll %r8,3
496 larl %r1,pgm_check_table
497 lg %r1,0(%r8,%r1) # load address of handler routine
498 la %r2,SP_PTREGS(%r15) # address of register-save area
499 larl %r14,sysc_return
500 br %r1 # branch to interrupt-handler
502 #
503 # handle per exception
504 #
505 pgm_per:
506 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
507 jnz pgm_per_std # ok, normal per event from user space
508 # ok its one of the special cases, now we need to find out which one
509 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
510 je pgm_svcper
511 # no interesting special case, ignore PER event
512 lmg %r12,%r15,__LC_SAVE_AREA
513 lpswe __LC_PGM_OLD_PSW
515 #
516 # Normal per exception
517 #
518 pgm_per_std:
519 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
520 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
521 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
522 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
523 jz pgm_no_vtime2
524 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
525 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
526 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
527 pgm_no_vtime2:
528 #endif
529 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
530 TRACE_IRQS_OFF
531 lg %r1,__TI_task(%r9)
532 tm SP_PSW+1(%r15),0x01 # kernel per event ?
533 jz kernel_per
534 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
535 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
536 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
537 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
538 lgf %r3,__LC_PGM_ILC # load program interruption code
539 lghi %r8,0x7f
540 ngr %r8,%r3 # clear per-event-bit and ilc
541 je sysc_return
542 j pgm_do_call
544 #
545 # it was a single stepped SVC that is causing all the trouble
546 #
547 pgm_svcper:
548 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
549 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
550 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
551 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
552 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
553 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
554 #endif
555 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
556 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
557 lg %r1,__TI_task(%r9)
558 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
559 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
560 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
561 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
562 TRACE_IRQS_ON
563 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
564 j sysc_do_svc
566 #
567 # per was called from kernel, must be kprobes
568 #
569 kernel_per:
570 lhi %r0,__LC_PGM_OLD_PSW
571 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
572 la %r2,SP_PTREGS(%r15) # address of register-save area
573 larl %r14,sysc_restore # load adr. of system ret, no work
574 jg do_single_step # branch to do_single_step
576 /*
577 * IO interrupt handler routine
578 */
579 .globl io_int_handler
580 io_int_handler:
581 STORE_TIMER __LC_ASYNC_ENTER_TIMER
582 stck __LC_INT_CLOCK
583 SAVE_ALL_BASE __LC_SAVE_AREA+32
584 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
585 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
586 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
587 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
588 jz io_no_vtime
589 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
590 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
591 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
592 io_no_vtime:
593 #endif
594 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
595 TRACE_IRQS_OFF
596 la %r2,SP_PTREGS(%r15) # address of register-save area
597 brasl %r14,do_IRQ # call standard irq handler
598 io_return:
599 tm __TI_flags+7(%r9),_TIF_WORK_INT
600 jnz io_work # there is work to do (signals etc.)
601 io_restore:
602 #ifdef CONFIG_TRACE_IRQFLAGS
603 larl %r1,io_restore_trace_psw
604 lpswe 0(%r1)
605 io_restore_trace:
606 TRACE_IRQS_CHECK
607 LOCKDEP_SYS_EXIT
608 #endif
609 io_leave:
610 RESTORE_ALL __LC_RETURN_PSW,0
611 io_done:
613 #ifdef CONFIG_TRACE_IRQFLAGS
614 .align 8
615 .globl io_restore_trace_psw
616 io_restore_trace_psw:
617 .quad 0, io_restore_trace
618 #endif
620 #
621 # There is work todo, we need to check if we return to userspace, then
622 # check, if we are in SIE, if yes leave it
623 #
624 io_work:
625 tm SP_PSW+1(%r15),0x01 # returning to user ?
626 #ifndef CONFIG_PREEMPT
627 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
628 jnz io_work_user # yes -> no need to check for SIE
629 la %r1, BASED(sie_opcode) # we return to kernel here
630 lg %r2, SP_PSW+8(%r15)
631 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
632 jne io_restore # no-> return to kernel
633 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
634 aghi %r1, 4
635 stg %r1, SP_PSW+8(%r15)
636 j io_restore # return to kernel
637 #else
638 jno io_restore # no-> skip resched & signal
639 #endif
640 #else
641 jnz io_work_user # yes -> do resched & signal
642 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
643 la %r1, BASED(sie_opcode)
644 lg %r2, SP_PSW+8(%r15)
645 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
646 jne 0f # no -> leave PSW alone
647 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
648 aghi %r1, 4
649 stg %r1, SP_PSW+8(%r15)
650 0:
651 #endif
652 # check for preemptive scheduling
653 icm %r0,15,__TI_precount(%r9)
654 jnz io_restore # preemption is disabled
655 # switch to kernel stack
656 lg %r1,SP_R15(%r15)
657 aghi %r1,-SP_SIZE
658 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
659 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
660 lgr %r15,%r1
661 io_resume_loop:
662 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
663 jno io_restore
664 larl %r14,io_resume_loop
665 jg preempt_schedule_irq
666 #endif
668 io_work_user:
669 lg %r1,__LC_KERNEL_STACK
670 aghi %r1,-SP_SIZE
671 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
672 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
673 lgr %r15,%r1
674 #
675 # One of the work bits is on. Find out which one.
676 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
677 # and _TIF_MCCK_PENDING
678 #
679 io_work_loop:
680 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
681 jo io_mcck_pending
682 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
683 jo io_reschedule
684 tm __TI_flags+7(%r9),_TIF_SIGPENDING
685 jnz io_sigpending
686 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
687 jnz io_notify_resume
688 j io_restore
689 io_work_done:
691 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
692 sie_opcode:
693 .long 0xb2140000
694 #endif
696 #
697 # _TIF_MCCK_PENDING is set, call handler
698 #
699 io_mcck_pending:
700 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
701 j io_work_loop
703 #
704 # _TIF_NEED_RESCHED is set, call schedule
705 #
706 io_reschedule:
707 TRACE_IRQS_ON
708 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
709 brasl %r14,schedule # call scheduler
710 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
711 TRACE_IRQS_OFF
712 tm __TI_flags+7(%r9),_TIF_WORK_INT
713 jz io_restore # there is no work to do
714 j io_work_loop
716 #
717 # _TIF_SIGPENDING or is set, call do_signal
718 #
719 io_sigpending:
720 TRACE_IRQS_ON
721 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
722 la %r2,SP_PTREGS(%r15) # load pt_regs
723 brasl %r14,do_signal # call do_signal
724 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
725 TRACE_IRQS_OFF
726 j io_work_loop
728 #
729 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
730 #
731 io_notify_resume:
732 TRACE_IRQS_ON
733 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
734 la %r2,SP_PTREGS(%r15) # load pt_regs
735 brasl %r14,do_notify_resume # call do_notify_resume
736 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
737 TRACE_IRQS_OFF
738 j io_work_loop
740 /*
741 * External interrupt handler routine
742 */
743 .globl ext_int_handler
744 ext_int_handler:
745 STORE_TIMER __LC_ASYNC_ENTER_TIMER
746 stck __LC_INT_CLOCK
747 SAVE_ALL_BASE __LC_SAVE_AREA+32
748 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
749 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
750 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
751 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
752 jz ext_no_vtime
753 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
754 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
755 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
756 ext_no_vtime:
757 #endif
758 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
759 TRACE_IRQS_OFF
760 la %r2,SP_PTREGS(%r15) # address of register-save area
761 llgh %r3,__LC_EXT_INT_CODE # get interruption code
762 brasl %r14,do_extint
763 j io_return
765 __critical_end:
767 /*
768 * Machine check handler routines
769 */
770 .globl mcck_int_handler
771 mcck_int_handler:
772 la %r1,4095 # revalidate r1
773 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
774 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
775 SAVE_ALL_BASE __LC_SAVE_AREA+64
776 la %r12,__LC_MCK_OLD_PSW
777 tm __LC_MCCK_CODE,0x80 # system damage?
778 jo mcck_int_main # yes -> rest of mcck code invalid
779 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
780 la %r14,4095
781 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
782 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
783 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
784 jo 1f
785 la %r14,__LC_SYNC_ENTER_TIMER
786 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
787 jl 0f
788 la %r14,__LC_ASYNC_ENTER_TIMER
789 0: clc 0(8,%r14),__LC_EXIT_TIMER
790 jl 0f
791 la %r14,__LC_EXIT_TIMER
792 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
793 jl 0f
794 la %r14,__LC_LAST_UPDATE_TIMER
795 0: spt 0(%r14)
796 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
797 1:
798 #endif
799 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
800 jno mcck_int_main # no -> skip cleanup critical
801 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
802 jnz mcck_int_main # from user -> load kernel stack
803 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
804 jhe mcck_int_main
805 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
806 jl mcck_int_main
807 brasl %r14,cleanup_critical
808 mcck_int_main:
809 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
810 slgr %r14,%r15
811 srag %r14,%r14,PAGE_SHIFT
812 jz 0f
813 lg %r15,__LC_PANIC_STACK # load panic stack
814 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
815 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
816 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
817 jno mcck_no_vtime # no -> no timer update
818 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
819 jz mcck_no_vtime
820 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
821 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
822 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
823 mcck_no_vtime:
824 #endif
825 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
826 la %r2,SP_PTREGS(%r15) # load pt_regs
827 brasl %r14,s390_do_machine_check
828 tm SP_PSW+1(%r15),0x01 # returning to user ?
829 jno mcck_return
830 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
831 aghi %r1,-SP_SIZE
832 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
833 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
834 lgr %r15,%r1
835 stosm __SF_EMPTY(%r15),0x04 # turn dat on
836 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
837 jno mcck_return
838 TRACE_IRQS_OFF
839 brasl %r14,s390_handle_mcck
840 TRACE_IRQS_ON
841 mcck_return:
842 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
843 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
844 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
845 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
846 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
847 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
848 jno 0f
849 stpt __LC_EXIT_TIMER
850 0:
851 #endif
852 lpswe __LC_RETURN_MCCK_PSW # back to caller
854 /*
855 * Restart interruption handler, kick starter for additional CPUs
856 */
857 #ifdef CONFIG_SMP
858 __CPUINIT
859 .globl restart_int_handler
860 restart_int_handler:
861 lg %r15,__LC_SAVE_AREA+120 # load ksp
862 lghi %r10,__LC_CREGS_SAVE_AREA
863 lctlg %c0,%c15,0(%r10) # get new ctl regs
864 lghi %r10,__LC_AREGS_SAVE_AREA
865 lam %a0,%a15,0(%r10)
866 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
867 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
868 jg start_secondary
869 .previous
870 #else
871 /*
872 * If we do not run with SMP enabled, let the new CPU crash ...
873 */
874 .globl restart_int_handler
875 restart_int_handler:
876 basr %r1,0
877 restart_base:
878 lpswe restart_crash-restart_base(%r1)
879 .align 8
880 restart_crash:
881 .long 0x000a0000,0x00000000,0x00000000,0x00000000
882 restart_go:
883 #endif
885 #ifdef CONFIG_CHECK_STACK
886 /*
887 * The synchronous or the asynchronous stack overflowed. We are dead.
888 * No need to properly save the registers, we are going to panic anyway.
889 * Setup a pt_regs so that show_trace can provide a good call trace.
890 */
891 stack_overflow:
892 lg %r15,__LC_PANIC_STACK # change to panic stack
893 aghi %r15,-SP_SIZE
894 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
895 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
896 la %r1,__LC_SAVE_AREA
897 chi %r12,__LC_SVC_OLD_PSW
898 je 0f
899 chi %r12,__LC_PGM_OLD_PSW
900 je 0f
901 la %r1,__LC_SAVE_AREA+32
902 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
903 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
904 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
905 la %r2,SP_PTREGS(%r15) # load pt_regs
906 jg kernel_stack_overflow
907 #endif
909 cleanup_table_system_call:
910 .quad system_call, sysc_do_svc
911 cleanup_table_sysc_return:
912 .quad sysc_return, sysc_leave
913 cleanup_table_sysc_leave:
914 .quad sysc_leave, sysc_done
915 cleanup_table_sysc_work_loop:
916 .quad sysc_work_loop, sysc_work_done
917 cleanup_table_io_return:
918 .quad io_return, io_leave
919 cleanup_table_io_leave:
920 .quad io_leave, io_done
921 cleanup_table_io_work_loop:
922 .quad io_work_loop, io_work_done
924 cleanup_critical:
925 clc 8(8,%r12),BASED(cleanup_table_system_call)
926 jl 0f
927 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
928 jl cleanup_system_call
929 0:
930 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
931 jl 0f
932 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
933 jl cleanup_sysc_return
934 0:
935 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
936 jl 0f
937 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
938 jl cleanup_sysc_leave
939 0:
940 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
941 jl 0f
942 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
943 jl cleanup_sysc_return
944 0:
945 clc 8(8,%r12),BASED(cleanup_table_io_return)
946 jl 0f
947 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
948 jl cleanup_io_return
949 0:
950 clc 8(8,%r12),BASED(cleanup_table_io_leave)
951 jl 0f
952 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
953 jl cleanup_io_leave
954 0:
955 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
956 jl 0f
957 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
958 jl cleanup_io_return
959 0:
960 br %r14
962 cleanup_system_call:
963 mvc __LC_RETURN_PSW(16),0(%r12)
964 cghi %r12,__LC_MCK_OLD_PSW
965 je 0f
966 la %r12,__LC_SAVE_AREA+32
967 j 1f
968 0: la %r12,__LC_SAVE_AREA+64
969 1:
970 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
971 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
972 jh 0f
973 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
974 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
975 jhe cleanup_vtime
976 #endif
977 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
978 jh 0f
979 mvc __LC_SAVE_AREA(32),0(%r12)
980 0: stg %r13,8(%r12)
981 stg %r12,__LC_SAVE_AREA+96 # argh
982 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
983 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
984 lg %r12,__LC_SAVE_AREA+96 # argh
985 stg %r15,24(%r12)
986 llgh %r7,__LC_SVC_INT_CODE
987 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
988 cleanup_vtime:
989 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
990 jhe cleanup_stime
991 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
992 cleanup_stime:
993 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
994 jh cleanup_update
995 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
996 cleanup_update:
997 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
998 #endif
999 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
1000 la %r12,__LC_RETURN_PSW
1001 br %r14
1002 cleanup_system_call_insn:
1003 .quad sysc_saveall
1004 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1005 .quad system_call
1006 .quad sysc_vtime
1007 .quad sysc_stime
1008 .quad sysc_update
1009 #endif
1011 cleanup_sysc_return:
1012 mvc __LC_RETURN_PSW(8),0(%r12)
1013 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
1014 la %r12,__LC_RETURN_PSW
1015 br %r14
1017 cleanup_sysc_leave:
1018 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
1019 je 2f
1020 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1021 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1022 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
1023 je 2f
1024 #endif
1025 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1026 cghi %r12,__LC_MCK_OLD_PSW
1027 jne 0f
1028 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1029 j 1f
1030 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1031 1: lmg %r0,%r11,SP_R0(%r15)
1032 lg %r15,SP_R15(%r15)
1033 2: la %r12,__LC_RETURN_PSW
1034 br %r14
1035 cleanup_sysc_leave_insn:
1036 .quad sysc_done - 4
1037 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1038 .quad sysc_done - 8
1039 #endif
1041 cleanup_io_return:
1042 mvc __LC_RETURN_PSW(8),0(%r12)
1043 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1044 la %r12,__LC_RETURN_PSW
1045 br %r14
1047 cleanup_io_leave:
1048 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1049 je 2f
1050 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1051 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1052 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1053 je 2f
1054 #endif
1055 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1056 cghi %r12,__LC_MCK_OLD_PSW
1057 jne 0f
1058 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1059 j 1f
1060 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1061 1: lmg %r0,%r11,SP_R0(%r15)
1062 lg %r15,SP_R15(%r15)
1063 2: la %r12,__LC_RETURN_PSW
1064 br %r14
1065 cleanup_io_leave_insn:
1066 .quad io_done - 4
1067 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1068 .quad io_done - 8
1069 #endif
1071 /*
1072 * Integer constants
1073 */
1074 .align 4
1075 .Lconst:
1076 .Lnr_syscalls: .long NR_syscalls
1077 .L0x0130: .short 0x130
1078 .L0x0140: .short 0x140
1079 .L0x0150: .short 0x150
1080 .L0x0160: .short 0x160
1081 .L0x0170: .short 0x170
1082 .Lcritical_start:
1083 .quad __critical_start
1084 .Lcritical_end:
1085 .quad __critical_end
1087 .section .rodata, "a"
1088 #define SYSCALL(esa,esame,emu) .long esame
1089 sys_call_table:
1090 #include "syscalls.S"
1091 #undef SYSCALL
1093 #ifdef CONFIG_COMPAT
1095 #define SYSCALL(esa,esame,emu) .long emu
1096 sys_call_table_emu:
1097 #include "syscalls.S"
1098 #undef SYSCALL
1099 #endif