arch/mips/mm/init.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 - 2000 Ralf Baechle
   7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
   9  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  10  */
  11 #include <linux/bug.h>
  12 #include <linux/init.h>
  13 #include <linux/export.h>
  14 #include <linux/signal.h>
  15 #include <linux/sched.h>
  16 #include <linux/smp.h>
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/string.h>
  20 #include <linux/types.h>
  21 #include <linux/pagemap.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/mman.h>
  24 #include <linux/mm.h>
  25 #include <linux/bootmem.h>
  26 #include <linux/highmem.h>
  27 #include <linux/swap.h>
  28 #include <linux/proc_fs.h>
  29 #include <linux/pfn.h>
  30 #include <linux/hardirq.h>
  31 #include <linux/gfp.h>
  32 #include <linux/kcore.h>
  33 #include <linux/export.h>
  34 #include <linux/initrd.h>
  35
  36 #include <asm/asm-offsets.h>
  37 #include <asm/bootinfo.h>
  38 #include <asm/cachectl.h>
  39 #include <asm/cpu.h>
  40 #include <asm/dma.h>
  41 #include <asm/kmap_types.h>
  42 #include <asm/maar.h>
  43 #include <asm/mmu_context.h>
  44 #include <asm/sections.h>
  45 #include <asm/pgtable.h>
  46 #include <asm/pgalloc.h>
  47 #include <asm/tlb.h>
  48 #include <asm/fixmap.h>
  49 #include <asm/maar.h>
  50
  51 /*
  52  * We have up to 8 empty zeroed pages so we can map one of the right colour
  53  * when needed.  This is necessary only on R4000 / R4400 SC and MC versions
  54  * where we have to avoid VCED / VECI exceptions for good performance at
  55  * any price.  Since page is never written to after the initialization we
  56  * don't have to care about aliases on other CPUs.
  57  */
  58 unsigned long empty_zero_page, zero_page_mask;
  59 EXPORT_SYMBOL_GPL(empty_zero_page);
  60 EXPORT_SYMBOL(zero_page_mask);
  61
  62 /*
  63  * Not static inline because used by IP27 special magic initialization code
  64  */
  65 void setup_zero_pages(void)
  66 {
  67         unsigned int order, i;
  68         struct page *page;
  69
  70         if (cpu_has_vce)
  71                 order = 3;
  72         else
  73                 order = 0;
  74
  75         empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
  76         if (!empty_zero_page)
  77                 panic("Oh boy, that early out of memory?");
  78
  79         page = virt_to_page((void *)empty_zero_page);
  80         split_page(page, order);
  81         for (i = 0; i < (1 << order); i++, page++)
  82                 mark_page_reserved(page);
  83
  84         zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
  85 }
  86
  87 static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
  88 {
  89         enum fixed_addresses idx;
  90         unsigned long vaddr, flags, entrylo;
  91         unsigned long old_ctx;
  92         pte_t pte;
  93         int tlbidx;
  94
  95         BUG_ON(Page_dcache_dirty(page));
  96
  97         preempt_disable();
  98         pagefault_disable();
  99         idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
 100         idx += in_interrupt() ? FIX_N_COLOURS : 0;
 101         vaddr = __fix_to_virt(FIX_CMAP_END - idx);
 102         pte = mk_pte(page, prot);
 103 #if defined(CONFIG_XPA)
 104         entrylo = pte_to_entrylo(pte.pte_high);
 105 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
 106         entrylo = pte.pte_high;
 107 #else
 108         entrylo = pte_to_entrylo(pte_val(pte));
 109 #endif
 110
 111         local_irq_save(flags);
 112         old_ctx = read_c0_entryhi();
 113         write_c0_entryhi(vaddr & (PAGE_MASK << 1));
 114         write_c0_entrylo0(entrylo);
 115         write_c0_entrylo1(entrylo);
 116 #ifdef CONFIG_XPA
 117         if (cpu_has_xpa) {
 118                 entrylo = (pte.pte_low & _PFNX_MASK);
 119                 writex_c0_entrylo0(entrylo);
 120                 writex_c0_entrylo1(entrylo);
 121         }
 122 #endif
 123         tlbidx = num_wired_entries();
 124         write_c0_wired(tlbidx + 1);
 125         write_c0_index(tlbidx);
 126         mtc0_tlbw_hazard();
 127         tlb_write_indexed();
 128         tlbw_use_hazard();
 129         write_c0_entryhi(old_ctx);
 130         local_irq_restore(flags);
 131
 132         return (void*) vaddr;
 133 }
 134
 135 void *kmap_coherent(struct page *page, unsigned long addr)
 136 {
 137         return __kmap_pgprot(page, addr, PAGE_KERNEL);
 138 }
 139
 140 void *kmap_noncoherent(struct page *page, unsigned long addr)
 141 {
 142         return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
 143 }
 144
 145 void kunmap_coherent(void)
 146 {
 147         unsigned int wired;
 148         unsigned long flags, old_ctx;
 149
 150         local_irq_save(flags);
 151         old_ctx = read_c0_entryhi();
 152         wired = num_wired_entries() - 1;
 153         write_c0_wired(wired);
 154         write_c0_index(wired);
 155         write_c0_entryhi(UNIQUE_ENTRYHI(wired));
 156         write_c0_entrylo0(0);
 157         write_c0_entrylo1(0);
 158         mtc0_tlbw_hazard();
 159         tlb_write_indexed();
 160         tlbw_use_hazard();
 161         write_c0_entryhi(old_ctx);
 162         local_irq_restore(flags);
 163         pagefault_enable();
 164         preempt_enable();
 165 }
 166
 167 void copy_user_highpage(struct page *to, struct page *from,
 168         unsigned long vaddr, struct vm_area_struct *vma)
 169 {
 170         void *vfrom, *vto;
 171
 172         vto = kmap_atomic(to);
 173         if (cpu_has_dc_aliases &&
 174             page_mapcount(from) && !Page_dcache_dirty(from)) {
 175                 vfrom = kmap_coherent(from, vaddr);
 176                 copy_page(vto, vfrom);
 177                 kunmap_coherent();
 178         } else {
 179                 vfrom = kmap_atomic(from);
 180                 copy_page(vto, vfrom);
 181                 kunmap_atomic(vfrom);
 182         }
 183         if ((!cpu_has_ic_fills_f_dc) ||
 184             pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
 185                 flush_data_cache_page((unsigned long)vto);
 186         kunmap_atomic(vto);
 187         /* Make sure this page is cleared on other CPU's too before using it */
 188         smp_wmb();
 189 }
 190
 191 void copy_to_user_page(struct vm_area_struct *vma,
 192         struct page *page, unsigned long vaddr, void *dst, const void *src,
 193         unsigned long len)
 194 {
 195         if (cpu_has_dc_aliases &&
 196             page_mapcount(page) && !Page_dcache_dirty(page)) {
 197                 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
 198                 memcpy(vto, src, len);
 199                 kunmap_coherent();
 200         } else {
 201                 memcpy(dst, src, len);
 202                 if (cpu_has_dc_aliases)
 203                         SetPageDcacheDirty(page);
 204         }
 205         if (vma->vm_flags & VM_EXEC)
 206                 flush_cache_page(vma, vaddr, page_to_pfn(page));
 207 }
 208
 209 void copy_from_user_page(struct vm_area_struct *vma,
 210         struct page *page, unsigned long vaddr, void *dst, const void *src,
 211         unsigned long len)
 212 {
 213         if (cpu_has_dc_aliases &&
 214             page_mapcount(page) && !Page_dcache_dirty(page)) {
 215                 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
 216                 memcpy(dst, vfrom, len);
 217                 kunmap_coherent();
 218         } else {
 219                 memcpy(dst, src, len);
 220                 if (cpu_has_dc_aliases)
 221                         SetPageDcacheDirty(page);
 222         }
 223 }
 224 EXPORT_SYMBOL_GPL(copy_from_user_page);
 225
 226 void __init fixrange_init(unsigned long start, unsigned long end,
 227         pgd_t *pgd_base)
 228 {
 229 #ifdef CONFIG_HIGHMEM
 230         pgd_t *pgd;
 231         pud_t *pud;
 232         pmd_t *pmd;
 233         pte_t *pte;
 234         int i, j, k;
 235         unsigned long vaddr;
 236
 237         vaddr = start;
 238         i = __pgd_offset(vaddr);
 239         j = __pud_offset(vaddr);
 240         k = __pmd_offset(vaddr);
 241         pgd = pgd_base + i;
 242
 243         for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
 244                 pud = (pud_t *)pgd;
 245                 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
 246                         pmd = (pmd_t *)pud;
 247                         for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
 248                                 if (pmd_none(*pmd)) {
 249                                         pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
 250                                         set_pmd(pmd, __pmd((unsigned long)pte));
 251                                         BUG_ON(pte != pte_offset_kernel(pmd, 0));
 252                                 }
 253                                 vaddr += PMD_SIZE;
 254                         }
 255                         k = 0;
 256                 }
 257                 j = 0;
 258         }
 259 #endif
 260 }
 261
 262 unsigned __weak platform_maar_init(unsigned num_pairs)
 263 {
 264         struct maar_config cfg[BOOT_MEM_MAP_MAX];
 265         unsigned i, num_configured, num_cfg = 0;
 266
 267         for (i = 0; i < boot_mem_map.nr_map; i++) {
 268                 switch (boot_mem_map.map[i].type) {
 269                 case BOOT_MEM_RAM:
 270                 case BOOT_MEM_INIT_RAM:
 271                         break;
 272                 default:
 273                         continue;
 274                 }
 275
 276                 /* Round lower up */
 277                 cfg[num_cfg].lower = boot_mem_map.map[i].addr;
 278                 cfg[num_cfg].lower = (cfg[num_cfg].lower + 0xffff) & ~0xffff;
 279
 280                 /* Round upper down */
 281                 cfg[num_cfg].upper = boot_mem_map.map[i].addr +
 282                                         boot_mem_map.map[i].size;
 283                 cfg[num_cfg].upper = (cfg[num_cfg].upper & ~0xffff) - 1;
 284
 285                 cfg[num_cfg].attrs = MIPS_MAAR_S;
 286                 num_cfg++;
 287         }
 288
 289         num_configured = maar_config(cfg, num_cfg, num_pairs);
 290         if (num_configured < num_cfg)
 291                 pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
 292                         num_pairs, num_cfg);
 293
 294         return num_configured;
 295 }
 296
 297 void maar_init(void)
 298 {
 299         unsigned num_maars, used, i;
 300         phys_addr_t lower, upper, attr;
 301         static struct {
 302                 struct maar_config cfgs[3];
 303                 unsigned used;
 304         } recorded = { { { 0 } }, 0 };
 305
 306         if (!cpu_has_maar)
 307                 return;
 308
 309         /* Detect the number of MAARs */
 310         write_c0_maari(~0);
 311         back_to_back_c0_hazard();
 312         num_maars = read_c0_maari() + 1;
 313
 314         /* MAARs should be in pairs */
 315         WARN_ON(num_maars % 2);
 316
 317         /* Set MAARs using values we recorded already */
 318         if (recorded.used) {
 319                 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
 320                 BUG_ON(used != recorded.used);
 321         } else {
 322                 /* Configure the required MAARs */
 323                 used = platform_maar_init(num_maars / 2);
 324         }
 325
 326         /* Disable any further MAARs */
 327         for (i = (used * 2); i < num_maars; i++) {
 328                 write_c0_maari(i);
 329                 back_to_back_c0_hazard();
 330                 write_c0_maar(0);
 331                 back_to_back_c0_hazard();
 332         }
 333
 334         if (recorded.used)
 335                 return;
 336
 337         pr_info("MAAR configuration:\n");
 338         for (i = 0; i < num_maars; i += 2) {
 339                 write_c0_maari(i);
 340                 back_to_back_c0_hazard();
 341                 upper = read_c0_maar();
 342
 343                 write_c0_maari(i + 1);
 344                 back_to_back_c0_hazard();
 345                 lower = read_c0_maar();
 346
 347                 attr = lower & upper;
 348                 lower = (lower & MIPS_MAAR_ADDR) << 4;
 349                 upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
 350
 351                 pr_info("  [%d]: ", i / 2);
 352                 if (!(attr & MIPS_MAAR_VL)) {
 353                         pr_cont("disabled\n");
 354                         continue;
 355                 }
 356
 357                 pr_cont("%pa-%pa", &lower, &upper);
 358
 359                 if (attr & MIPS_MAAR_S)
 360                         pr_cont(" speculate");
 361
 362                 pr_cont("\n");
 363
 364                 /* Record the setup for use on secondary CPUs */
 365                 if (used <= ARRAY_SIZE(recorded.cfgs)) {
 366                         recorded.cfgs[recorded.used].lower = lower;
 367                         recorded.cfgs[recorded.used].upper = upper;
 368                         recorded.cfgs[recorded.used].attrs = attr;
 369                         recorded.used++;
 370                 }
 371         }
 372 }
 373
 374 #ifndef CONFIG_NEED_MULTIPLE_NODES
 375 int page_is_ram(unsigned long pagenr)
 376 {
 377         int i;
 378
 379         for (i = 0; i < boot_mem_map.nr_map; i++) {
 380                 unsigned long addr, end;
 381
 382                 switch (boot_mem_map.map[i].type) {
 383                 case BOOT_MEM_RAM:
 384                 case BOOT_MEM_INIT_RAM:
 385                         break;
 386                 default:
 387                         /* not usable memory */
 388                         continue;
 389                 }
 390
 391                 addr = PFN_UP(boot_mem_map.map[i].addr);
 392                 end = PFN_DOWN(boot_mem_map.map[i].addr +
 393                                boot_mem_map.map[i].size);
 394
 395                 if (pagenr >= addr && pagenr < end)
 396                         return 1;
 397         }
 398
 399         return 0;
 400 }
 401
 402 void __init paging_init(void)
 403 {
 404         unsigned long max_zone_pfns[MAX_NR_ZONES];
 405
 406         pagetable_init();
 407
 408 #ifdef CONFIG_HIGHMEM
 409         kmap_init();
 410 #endif
 411 #ifdef CONFIG_ZONE_DMA
 412         max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
 413 #endif
 414 #ifdef CONFIG_ZONE_DMA32
 415         max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
 416 #endif
 417         max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
 418 #ifdef CONFIG_HIGHMEM
 419         max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
 420
 421         if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
 422                 printk(KERN_WARNING "This processor doesn't support highmem."
 423                        " %ldk highmem ignored\n",
 424                        (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
 425                 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
 426         }
 427 #endif
 428
 429         free_area_init_nodes(max_zone_pfns);
 430 }
 431
 432 #ifdef CONFIG_64BIT
 433 static struct kcore_list kcore_kseg0;
 434 #endif
 435
 436 static inline void mem_init_free_highmem(void)
 437 {
 438 #ifdef CONFIG_HIGHMEM
 439         unsigned long tmp;
 440
 441         if (cpu_has_dc_aliases)
 442                 return;
 443
 444         for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
 445                 struct page *page = pfn_to_page(tmp);
 446
 447                 if (!page_is_ram(tmp))
 448                         SetPageReserved(page);
 449                 else
 450                         free_highmem_page(page);
 451         }
 452 #endif
 453 }
 454
 455 void __init mem_init(void)
 456 {
 457 #ifdef CONFIG_HIGHMEM
 458 #ifdef CONFIG_DISCONTIGMEM
 459 #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
 460 #endif
 461         max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
 462 #else
 463         max_mapnr = max_low_pfn;
 464 #endif
 465         high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
 466
 467         maar_init();
 468         free_all_bootmem();
 469         setup_zero_pages();     /* Setup zeroed pages.  */
 470         mem_init_free_highmem();
 471         mem_init_print_info(NULL);
 472
 473 #ifdef CONFIG_64BIT
 474         if ((unsigned long) &_text > (unsigned long) CKSEG0)
 475                 /* The -4 is a hack so that user tools don't have to handle
 476                    the overflow.  */
 477                 kclist_add(&kcore_kseg0, (void *) CKSEG0,
 478                                 0x80000000 - 4, KCORE_TEXT);
 479 #endif
 480 }
 481 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
 482
 483 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
 484 {
 485         unsigned long pfn;
 486
 487         for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
 488                 struct page *page = pfn_to_page(pfn);
 489                 void *addr = phys_to_virt(PFN_PHYS(pfn));
 490
 491                 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
 492                 free_reserved_page(page);
 493         }
 494         printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
 495 }
 496
 497 #ifdef CONFIG_BLK_DEV_INITRD
 498 void free_initrd_mem(unsigned long start, unsigned long end)
 499 {
 500         free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM,
 501                            "initrd");
 502 }
 503 #endif
 504
 505 void (*free_init_pages_eva)(void *begin, void *end) = NULL;
 506
 507 void __ref free_initmem(void)
 508 {
 509         prom_free_prom_memory();
 510         /*
 511          * Let the platform define a specific function to free the
 512          * init section since EVA may have used any possible mapping
 513          * between virtual and physical addresses.
 514          */
 515         if (free_init_pages_eva)
 516                 free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
 517         else
 518                 free_initmem_default(POISON_FREE_INITMEM);
 519 }
 520
 521 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
 522 unsigned long pgd_current[NR_CPUS];
 523 #endif
 524
 525 /*
 526  * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
 527  * are constants.  So we use the variants from asm-offset.h until that gcc
 528  * will officially be retired.
 529  *
 530  * Align swapper_pg_dir in to 64K, allows its address to be loaded
 531  * with a single LUI instruction in the TLB handlers.  If we used
 532  * __aligned(64K), its size would get rounded up to the alignment
 533  * size, and waste space.  So we place it in its own section and align
 534  * it in the linker script.
 535  */
 536 pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
 537 #ifndef __PAGETABLE_PUD_FOLDED
 538 pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss;
 539 #endif
 540 #ifndef __PAGETABLE_PMD_FOLDED
 541 pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
 542 EXPORT_SYMBOL_GPL(invalid_pmd_table);
 543 #endif
 544 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
 545 EXPORT_SYMBOL(invalid_pte_table);