1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Asm versions of Xen pv-ops, suitable for direct use.
5 * We only bother with direct forms (ie, vcpu in percpu data) of the
6 * operations here; the indirect forms are better handled in C.
9 #include <asm/asm-offsets.h>
10 #include <asm/percpu.h>
11 #include <asm/processor-flags.h>
12 #include <asm/frame.h>
14 #include <linux/linkage.h>
17 * Enable events. This clears the event mask and tests the pending
18 * event status with one and operation. If there are pending events,
19 * then enter the hypervisor to get them handled.
21 ENTRY(xen_irq_enable_direct)
24 movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
27 * Preempt here doesn't matter because that will deal with any
28 * pending interrupts. The pending check may end up being run
29 * on the wrong CPU, but that doesn't hurt.
32 /* Test for pending */
33 testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
40 ENDPROC(xen_irq_enable_direct)
44 * Disabling events is simply a matter of making the event mask
47 ENTRY(xen_irq_disable_direct)
48 movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
50 ENDPROC(xen_irq_disable_direct)
53 * (xen_)save_fl is used to get the current interrupt enable status.
54 * Callers expect the status to be in X86_EFLAGS_IF, and other bits
55 * may be set in the return value. We take advantage of this by
56 * making sure that X86_EFLAGS_IF has the right value (and other bits
57 * in that byte are 0), but other bits in the return value are
58 * undefined. We need to toggle the state of the bit, because Xen and
59 * x86 use opposite senses (mask vs enable).
61 ENTRY(xen_save_fl_direct)
62 testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
66 ENDPROC(xen_save_fl_direct)
70 * In principle the caller should be passing us a value return from
71 * xen_save_fl_direct, but for robustness sake we test only the
72 * X86_EFLAGS_IF flag rather than the whole byte. After setting the
73 * interrupt mask state, it checks for unmasked pending events and
74 * enters the hypervisor to get them delivered if so.
76 ENTRY(xen_restore_fl_direct)
79 testw $X86_EFLAGS_IF, %di
81 testb $X86_EFLAGS_IF>>8, %ah
83 setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
85 * Preempt here doesn't matter because that will deal with any
86 * pending interrupts. The pending check may end up being run
87 * on the wrong CPU, but that doesn't hurt.
90 /* check for unmasked and pending */
91 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
97 ENDPROC(xen_restore_fl_direct)
101 * Force an event check by making a hypercall, but preserve regs
102 * before making the call.
110 call xen_force_evtchn_callback
124 call xen_force_evtchn_callback
137 ENDPROC(check_events)