1 /*******************************************************************************
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
6 ******************************************************************************/
9 * Copyright (C) 2000 - 2018, Intel Corp.
10 * All rights reserved.
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13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
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45 #include <acpi/acpi.h>
49 #define _COMPONENT ACPI_HARDWARE
50 ACPI_MODULE_NAME("hwregs")
52 #if (!ACPI_REDUCED_HARDWARE)
53 /* Local Prototypes */
55 acpi_hw_get_access_bit_width(u64 address
,
56 struct acpi_generic_address
*reg
,
60 acpi_hw_read_multiple(u32
*value
,
61 struct acpi_generic_address
*register_a
,
62 struct acpi_generic_address
*register_b
);
65 acpi_hw_write_multiple(u32 value
,
66 struct acpi_generic_address
*register_a
,
67 struct acpi_generic_address
*register_b
);
69 #endif /* !ACPI_REDUCED_HARDWARE */
71 /******************************************************************************
73 * FUNCTION: acpi_hw_get_access_bit_width
75 * PARAMETERS: address - GAS register address
76 * reg - GAS register structure
77 * max_bit_width - Max bit_width supported (32 or 64)
81 * DESCRIPTION: Obtain optimal access bit width
83 ******************************************************************************/
86 acpi_hw_get_access_bit_width(u64 address
,
87 struct acpi_generic_address
*reg
, u8 max_bit_width
)
92 * GAS format "register", used by FADT:
93 * 1. Detected if bit_offset is 0 and bit_width is 8/16/32/64;
94 * 2. access_size field is ignored and bit_width field is used for
95 * determining the boundary of the IO accesses.
96 * GAS format "region", used by APEI registers:
97 * 1. Detected if bit_offset is not 0 or bit_width is not 8/16/32/64;
98 * 2. access_size field is used for determining the boundary of the
100 * 3. bit_offset/bit_width fields are used to describe the "region".
102 * Note: This algorithm assumes that the "Address" fields should always
103 * contain aligned values.
105 if (!reg
->bit_offset
&& reg
->bit_width
&&
106 ACPI_IS_POWER_OF_TWO(reg
->bit_width
) &&
107 ACPI_IS_ALIGNED(reg
->bit_width
, 8)) {
108 access_bit_width
= reg
->bit_width
;
109 } else if (reg
->access_width
) {
110 access_bit_width
= ACPI_ACCESS_BIT_WIDTH(reg
->access_width
);
113 ACPI_ROUND_UP_POWER_OF_TWO_8(reg
->bit_offset
+
115 if (access_bit_width
<= 8) {
116 access_bit_width
= 8;
118 while (!ACPI_IS_ALIGNED(address
, access_bit_width
>> 3)) {
119 access_bit_width
>>= 1;
124 /* Maximum IO port access bit width is 32 */
126 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_IO
) {
131 * Return access width according to the requested maximum access bit width,
132 * as the caller should know the format of the register and may enforce
135 if (access_bit_width
< max_bit_width
) {
136 return (access_bit_width
);
138 return (max_bit_width
);
141 /******************************************************************************
143 * FUNCTION: acpi_hw_validate_register
145 * PARAMETERS: reg - GAS register structure
146 * max_bit_width - Max bit_width supported (32 or 64)
147 * address - Pointer to where the gas->address
152 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
153 * pointer, Address, space_id, bit_width, and bit_offset.
155 ******************************************************************************/
158 acpi_hw_validate_register(struct acpi_generic_address
*reg
,
159 u8 max_bit_width
, u64
*address
)
164 /* Must have a valid pointer to a GAS structure */
167 return (AE_BAD_PARAMETER
);
171 * Copy the target address. This handles possible alignment issues.
172 * Address must not be null. A null address also indicates an optional
173 * ACPI register that is not supported, so no error message.
175 ACPI_MOVE_64_TO_64(address
, ®
->address
);
177 return (AE_BAD_ADDRESS
);
180 /* Validate the space_ID */
182 if ((reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_MEMORY
) &&
183 (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
)) {
185 "Unsupported address space: 0x%X", reg
->space_id
));
189 /* Validate the access_width */
191 if (reg
->access_width
> 4) {
193 "Unsupported register access width: 0x%X",
198 /* Validate the bit_width, convert access_width into number of bits */
201 acpi_hw_get_access_bit_width(*address
, reg
, max_bit_width
);
203 ACPI_ROUND_UP(reg
->bit_offset
+ reg
->bit_width
, access_width
);
204 if (max_bit_width
< bit_width
) {
205 ACPI_WARNING((AE_INFO
,
206 "Requested bit width 0x%X is smaller than register bit width 0x%X",
207 max_bit_width
, bit_width
));
214 /******************************************************************************
216 * FUNCTION: acpi_hw_read
218 * PARAMETERS: value - Where the value is returned
219 * reg - GAS register structure
223 * DESCRIPTION: Read from either memory or IO space. This is a 64-bit max
224 * version of acpi_read.
226 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
227 * space_ID must be system_memory or system_IO.
229 ******************************************************************************/
231 acpi_status
acpi_hw_read(u64
*value
, struct acpi_generic_address
*reg
)
242 ACPI_FUNCTION_NAME(hw_read
);
244 /* Validate contents of the GAS register */
246 status
= acpi_hw_validate_register(reg
, 64, &address
);
247 if (ACPI_FAILURE(status
)) {
252 * Initialize entire 64-bit return value to zero, convert access_width
253 * into number of bits based
256 access_width
= acpi_hw_get_access_bit_width(address
, reg
, 64);
257 bit_width
= reg
->bit_offset
+ reg
->bit_width
;
258 bit_offset
= reg
->bit_offset
;
261 * Two address spaces supported: Memory or IO. PCI_Config is
262 * not supported here because the GAS structure is insufficient
266 if (bit_offset
>= access_width
) {
268 bit_offset
-= access_width
;
270 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
272 acpi_os_read_memory((acpi_physical_address
)
277 &value64
, access_width
);
278 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
280 status
= acpi_hw_read_port((acpi_io_address
)
287 value64
= (u64
)value32
;
292 * Use offset style bit writes because "Index * AccessWidth" is
293 * ensured to be less than 64-bits by acpi_hw_validate_register().
295 ACPI_SET_BITS(value
, index
* access_width
,
296 ACPI_MASK_BITS_ABOVE_64(access_width
), value64
);
299 bit_width
> access_width
? access_width
: bit_width
;
303 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
304 "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
305 ACPI_FORMAT_UINT64(*value
), access_width
,
306 ACPI_FORMAT_UINT64(address
),
307 acpi_ut_get_region_name(reg
->space_id
)));
312 /******************************************************************************
314 * FUNCTION: acpi_hw_write
316 * PARAMETERS: value - Value to be written
317 * reg - GAS register structure
321 * DESCRIPTION: Write to either memory or IO space. This is a 64-bit max
322 * version of acpi_write.
324 ******************************************************************************/
326 acpi_status
acpi_hw_write(u64 value
, struct acpi_generic_address
*reg
)
336 ACPI_FUNCTION_NAME(hw_write
);
338 /* Validate contents of the GAS register */
340 status
= acpi_hw_validate_register(reg
, 64, &address
);
341 if (ACPI_FAILURE(status
)) {
345 /* Convert access_width into number of bits based */
347 access_width
= acpi_hw_get_access_bit_width(address
, reg
, 64);
348 bit_width
= reg
->bit_offset
+ reg
->bit_width
;
349 bit_offset
= reg
->bit_offset
;
352 * Two address spaces supported: Memory or IO. PCI_Config is
353 * not supported here because the GAS structure is insufficient
358 * Use offset style bit reads because "Index * AccessWidth" is
359 * ensured to be less than 64-bits by acpi_hw_validate_register().
361 value64
= ACPI_GET_BITS(&value
, index
* access_width
,
362 ACPI_MASK_BITS_ABOVE_64(access_width
));
364 if (bit_offset
>= access_width
) {
365 bit_offset
-= access_width
;
367 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
369 acpi_os_write_memory((acpi_physical_address
)
374 value64
, access_width
);
375 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
377 status
= acpi_hw_write_port((acpi_io_address
)
388 * Index * access_width is ensured to be less than 32-bits by
389 * acpi_hw_validate_register().
392 bit_width
> access_width
? access_width
: bit_width
;
396 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
397 "Wrote: %8.8X%8.8X width %2d to %8.8X%8.8X (%s)\n",
398 ACPI_FORMAT_UINT64(value
), access_width
,
399 ACPI_FORMAT_UINT64(address
),
400 acpi_ut_get_region_name(reg
->space_id
)));
405 #if (!ACPI_REDUCED_HARDWARE)
406 /*******************************************************************************
408 * FUNCTION: acpi_hw_clear_acpi_status
414 * DESCRIPTION: Clears all fixed and general purpose status bits
416 ******************************************************************************/
418 acpi_status
acpi_hw_clear_acpi_status(void)
421 acpi_cpu_flags lock_flags
= 0;
423 ACPI_FUNCTION_TRACE(hw_clear_acpi_status
);
425 ACPI_DEBUG_PRINT((ACPI_DB_IO
, "About to write %04X to %8.8X%8.8X\n",
426 ACPI_BITMASK_ALL_FIXED_STATUS
,
427 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status
.address
)));
429 lock_flags
= acpi_os_acquire_lock(acpi_gbl_hardware_lock
);
431 /* Clear the fixed events in PM1 A/B */
433 status
= acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS
,
434 ACPI_BITMASK_ALL_FIXED_STATUS
);
436 acpi_os_release_lock(acpi_gbl_hardware_lock
, lock_flags
);
438 if (ACPI_FAILURE(status
)) {
442 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
444 status
= acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block
, NULL
);
447 return_ACPI_STATUS(status
);
450 /*******************************************************************************
452 * FUNCTION: acpi_hw_get_bit_register_info
454 * PARAMETERS: register_id - Index of ACPI Register to access
456 * RETURN: The bitmask to be used when accessing the register
458 * DESCRIPTION: Map register_id into a register bitmask.
460 ******************************************************************************/
462 struct acpi_bit_register_info
*acpi_hw_get_bit_register_info(u32 register_id
)
464 ACPI_FUNCTION_ENTRY();
466 if (register_id
> ACPI_BITREG_MAX
) {
467 ACPI_ERROR((AE_INFO
, "Invalid BitRegister ID: 0x%X",
472 return (&acpi_gbl_bit_register_info
[register_id
]);
475 /******************************************************************************
477 * FUNCTION: acpi_hw_write_pm1_control
479 * PARAMETERS: pm1a_control - Value to be written to PM1A control
480 * pm1b_control - Value to be written to PM1B control
484 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
485 * different than than the PM1 A/B status and enable registers
486 * in that different values can be written to the A/B registers.
487 * Most notably, the SLP_TYP bits can be different, as per the
488 * values returned from the _Sx predefined methods.
490 ******************************************************************************/
492 acpi_status
acpi_hw_write_pm1_control(u32 pm1a_control
, u32 pm1b_control
)
496 ACPI_FUNCTION_TRACE(hw_write_pm1_control
);
499 acpi_hw_write(pm1a_control
, &acpi_gbl_FADT
.xpm1a_control_block
);
500 if (ACPI_FAILURE(status
)) {
501 return_ACPI_STATUS(status
);
504 if (acpi_gbl_FADT
.xpm1b_control_block
.address
) {
506 acpi_hw_write(pm1b_control
,
507 &acpi_gbl_FADT
.xpm1b_control_block
);
509 return_ACPI_STATUS(status
);
512 /******************************************************************************
514 * FUNCTION: acpi_hw_register_read
516 * PARAMETERS: register_id - ACPI Register ID
517 * return_value - Where the register value is returned
519 * RETURN: Status and the value read.
521 * DESCRIPTION: Read from the specified ACPI register
523 ******************************************************************************/
524 acpi_status
acpi_hw_register_read(u32 register_id
, u32
*return_value
)
530 ACPI_FUNCTION_TRACE(hw_register_read
);
532 switch (register_id
) {
533 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
535 status
= acpi_hw_read_multiple(&value
,
536 &acpi_gbl_xpm1a_status
,
537 &acpi_gbl_xpm1b_status
);
540 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
542 status
= acpi_hw_read_multiple(&value
,
543 &acpi_gbl_xpm1a_enable
,
544 &acpi_gbl_xpm1b_enable
);
547 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
549 status
= acpi_hw_read_multiple(&value
,
553 xpm1b_control_block
);
556 * Zero the write-only bits. From the ACPI specification, "Hardware
557 * Write-Only Bits": "Upon reads to registers with write-only bits,
558 * software masks out all write-only bits."
560 value
&= ~ACPI_PM1_CONTROL_WRITEONLY_BITS
;
563 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
566 acpi_hw_read(&value64
, &acpi_gbl_FADT
.xpm2_control_block
);
567 value
= (u32
)value64
;
570 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
572 status
= acpi_hw_read(&value64
, &acpi_gbl_FADT
.xpm_timer_block
);
573 value
= (u32
)value64
;
576 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
579 acpi_hw_read_port(acpi_gbl_FADT
.smi_command
, &value
, 8);
584 ACPI_ERROR((AE_INFO
, "Unknown Register ID: 0x%X", register_id
));
585 status
= AE_BAD_PARAMETER
;
589 if (ACPI_SUCCESS(status
)) {
590 *return_value
= (u32
)value
;
593 return_ACPI_STATUS(status
);
596 /******************************************************************************
598 * FUNCTION: acpi_hw_register_write
600 * PARAMETERS: register_id - ACPI Register ID
601 * value - The value to write
605 * DESCRIPTION: Write to the specified ACPI register
607 * NOTE: In accordance with the ACPI specification, this function automatically
608 * preserves the value of the following bits, meaning that these bits cannot be
609 * changed via this interface:
611 * PM1_CONTROL[0] = SCI_EN
616 * 1) Hardware Ignored Bits: When software writes to a register with ignored
617 * bit fields, it preserves the ignored bit fields
618 * 2) SCI_EN: OSPM always preserves this bit position
620 ******************************************************************************/
622 acpi_status
acpi_hw_register_write(u32 register_id
, u32 value
)
628 ACPI_FUNCTION_TRACE(hw_register_write
);
630 switch (register_id
) {
631 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
633 * Handle the "ignored" bit in PM1 Status. According to the ACPI
634 * specification, ignored bits are to be preserved when writing.
635 * Normally, this would mean a read/modify/write sequence. However,
636 * preserving a bit in the status register is different. Writing a
637 * one clears the status, and writing a zero preserves the status.
638 * Therefore, we must always write zero to the ignored bit.
640 * This behavior is clarified in the ACPI 4.0 specification.
642 value
&= ~ACPI_PM1_STATUS_PRESERVED_BITS
;
644 status
= acpi_hw_write_multiple(value
,
645 &acpi_gbl_xpm1a_status
,
646 &acpi_gbl_xpm1b_status
);
649 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
651 status
= acpi_hw_write_multiple(value
,
652 &acpi_gbl_xpm1a_enable
,
653 &acpi_gbl_xpm1b_enable
);
656 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
658 * Perform a read first to preserve certain bits (per ACPI spec)
659 * Note: This includes SCI_EN, we never want to change this bit
661 status
= acpi_hw_read_multiple(&read_value
,
665 xpm1b_control_block
);
666 if (ACPI_FAILURE(status
)) {
670 /* Insert the bits to be preserved */
672 ACPI_INSERT_BITS(value
, ACPI_PM1_CONTROL_PRESERVED_BITS
,
675 /* Now we can write the data */
677 status
= acpi_hw_write_multiple(value
,
681 xpm1b_control_block
);
684 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
686 * For control registers, all reserved bits must be preserved,
687 * as per the ACPI spec.
690 acpi_hw_read(&read_value64
,
691 &acpi_gbl_FADT
.xpm2_control_block
);
692 if (ACPI_FAILURE(status
)) {
695 read_value
= (u32
)read_value64
;
697 /* Insert the bits to be preserved */
699 ACPI_INSERT_BITS(value
, ACPI_PM2_CONTROL_PRESERVED_BITS
,
703 acpi_hw_write(value
, &acpi_gbl_FADT
.xpm2_control_block
);
706 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
708 status
= acpi_hw_write(value
, &acpi_gbl_FADT
.xpm_timer_block
);
711 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
713 /* SMI_CMD is currently always in IO space */
716 acpi_hw_write_port(acpi_gbl_FADT
.smi_command
, value
, 8);
721 ACPI_ERROR((AE_INFO
, "Unknown Register ID: 0x%X", register_id
));
722 status
= AE_BAD_PARAMETER
;
727 return_ACPI_STATUS(status
);
730 /******************************************************************************
732 * FUNCTION: acpi_hw_read_multiple
734 * PARAMETERS: value - Where the register value is returned
735 * register_a - First ACPI register (required)
736 * register_b - Second ACPI register (optional)
740 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
742 ******************************************************************************/
745 acpi_hw_read_multiple(u32
*value
,
746 struct acpi_generic_address
*register_a
,
747 struct acpi_generic_address
*register_b
)
754 /* The first register is always required */
756 status
= acpi_hw_read(&value64
, register_a
);
757 if (ACPI_FAILURE(status
)) {
760 value_a
= (u32
)value64
;
762 /* Second register is optional */
764 if (register_b
->address
) {
765 status
= acpi_hw_read(&value64
, register_b
);
766 if (ACPI_FAILURE(status
)) {
769 value_b
= (u32
)value64
;
773 * OR the two return values together. No shifting or masking is necessary,
774 * because of how the PM1 registers are defined in the ACPI specification:
776 * "Although the bits can be split between the two register blocks (each
777 * register block has a unique pointer within the FADT), the bit positions
778 * are maintained. The register block with unimplemented bits (that is,
779 * those implemented in the other register block) always returns zeros,
780 * and writes have no side effects"
782 *value
= (value_a
| value_b
);
786 /******************************************************************************
788 * FUNCTION: acpi_hw_write_multiple
790 * PARAMETERS: value - The value to write
791 * register_a - First ACPI register (required)
792 * register_b - Second ACPI register (optional)
796 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
798 ******************************************************************************/
801 acpi_hw_write_multiple(u32 value
,
802 struct acpi_generic_address
*register_a
,
803 struct acpi_generic_address
*register_b
)
807 /* The first register is always required */
809 status
= acpi_hw_write(value
, register_a
);
810 if (ACPI_FAILURE(status
)) {
815 * Second register is optional
817 * No bit shifting or clearing is necessary, because of how the PM1
818 * registers are defined in the ACPI specification:
820 * "Although the bits can be split between the two register blocks (each
821 * register block has a unique pointer within the FADT), the bit positions
822 * are maintained. The register block with unimplemented bits (that is,
823 * those implemented in the other register block) always returns zeros,
824 * and writes have no side effects"
826 if (register_b
->address
) {
827 status
= acpi_hw_write(value
, register_b
);
833 #endif /* !ACPI_REDUCED_HARDWARE */