drivers/gpu/drm/nouveau/nv10_fence.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24
  25 #include "nouveau_drv.h"
  26 #include "nouveau_dma.h"
  27 #include "nv10_fence.h"
  28
  29 int
  30 nv10_fence_emit(struct nouveau_fence *fence)
  31 {
  32         struct nouveau_channel *chan = fence->channel;
  33         int ret = RING_SPACE(chan, 2);
  34         if (ret == 0) {
  35                 BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  36                 OUT_RING  (chan, fence->base.seqno);
  37                 FIRE_RING (chan);
  38         }
  39         return ret;
  40 }
  41
  42
  43 static int
  44 nv10_fence_sync(struct nouveau_fence *fence,
  45                 struct nouveau_channel *prev, struct nouveau_channel *chan)
  46 {
  47         return -ENODEV;
  48 }
  49
  50 u32
  51 nv10_fence_read(struct nouveau_channel *chan)
  52 {
  53         return nvif_rd32(&chan->user, 0x0048);
  54 }
  55
  56 void
  57 nv10_fence_context_del(struct nouveau_channel *chan)
  58 {
  59         struct nv10_fence_chan *fctx = chan->fence;
  60         nouveau_fence_context_del(&fctx->base);
  61         nvif_object_fini(&fctx->sema);
  62         chan->fence = NULL;
  63         nouveau_fence_context_free(&fctx->base);
  64 }
  65
  66 static int
  67 nv10_fence_context_new(struct nouveau_channel *chan)
  68 {
  69         struct nv10_fence_chan *fctx;
  70
  71         fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
  72         if (!fctx)
  73                 return -ENOMEM;
  74
  75         nouveau_fence_context_new(chan, &fctx->base);
  76         fctx->base.emit = nv10_fence_emit;
  77         fctx->base.read = nv10_fence_read;
  78         fctx->base.sync = nv10_fence_sync;
  79         return 0;
  80 }
  81
  82 void
  83 nv10_fence_destroy(struct nouveau_drm *drm)
  84 {
  85         struct nv10_fence_priv *priv = drm->fence;
  86         nouveau_bo_unmap(priv->bo);
  87         if (priv->bo)
  88                 nouveau_bo_unpin(priv->bo);
  89         nouveau_bo_ref(NULL, &priv->bo);
  90         drm->fence = NULL;
  91         kfree(priv);
  92 }
  93
  94 int
  95 nv10_fence_create(struct nouveau_drm *drm)
  96 {
  97         struct nv10_fence_priv *priv;
  98
  99         priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
 100         if (!priv)
 101                 return -ENOMEM;
 102
 103         priv->base.dtor = nv10_fence_destroy;
 104         priv->base.context_new = nv10_fence_context_new;
 105         priv->base.context_del = nv10_fence_context_del;
 106         priv->base.contexts = 31;
 107         priv->base.context_base = dma_fence_context_alloc(priv->base.contexts);
 108         spin_lock_init(&priv->lock);
 109         return 0;
 110 }