Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / infiniband / hw / qib / qib_file_ops.c
blob52c29db3a2f4a08dbfe9b6504c8ecc7768d3c34a
1 /*
2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
41 #include <linux/io.h>
42 #include <linux/jiffies.h>
43 #include <asm/pgtable.h>
44 #include <linux/delay.h>
45 #include <linux/export.h>
46 #include <linux/uio.h>
48 #include <rdma/ib.h>
50 #include "qib.h"
51 #include "qib_common.h"
52 #include "qib_user_sdma.h"
54 #undef pr_fmt
55 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
57 static int qib_open(struct inode *, struct file *);
58 static int qib_close(struct inode *, struct file *);
59 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
60 static ssize_t qib_write_iter(struct kiocb *, struct iov_iter *);
61 static __poll_t qib_poll(struct file *, struct poll_table_struct *);
62 static int qib_mmapf(struct file *, struct vm_area_struct *);
65 * This is really, really weird shit - write() and writev() here
66 * have completely unrelated semantics. Sucky userland ABI,
67 * film at 11.
69 static const struct file_operations qib_file_ops = {
70 .owner = THIS_MODULE,
71 .write = qib_write,
72 .write_iter = qib_write_iter,
73 .open = qib_open,
74 .release = qib_close,
75 .poll = qib_poll,
76 .mmap = qib_mmapf,
77 .llseek = noop_llseek,
81 * Convert kernel virtual addresses to physical addresses so they don't
82 * potentially conflict with the chip addresses used as mmap offsets.
83 * It doesn't really matter what mmap offset we use as long as we can
84 * interpret it correctly.
86 static u64 cvt_kvaddr(void *p)
88 struct page *page;
89 u64 paddr = 0;
91 page = vmalloc_to_page(p);
92 if (page)
93 paddr = page_to_pfn(page) << PAGE_SHIFT;
95 return paddr;
98 static int qib_get_base_info(struct file *fp, void __user *ubase,
99 size_t ubase_size)
101 struct qib_ctxtdata *rcd = ctxt_fp(fp);
102 int ret = 0;
103 struct qib_base_info *kinfo = NULL;
104 struct qib_devdata *dd = rcd->dd;
105 struct qib_pportdata *ppd = rcd->ppd;
106 unsigned subctxt_cnt;
107 int shared, master;
108 size_t sz;
110 subctxt_cnt = rcd->subctxt_cnt;
111 if (!subctxt_cnt) {
112 shared = 0;
113 master = 0;
114 subctxt_cnt = 1;
115 } else {
116 shared = 1;
117 master = !subctxt_fp(fp);
120 sz = sizeof(*kinfo);
121 /* If context sharing is not requested, allow the old size structure */
122 if (!shared)
123 sz -= 7 * sizeof(u64);
124 if (ubase_size < sz) {
125 ret = -EINVAL;
126 goto bail;
129 kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
130 if (kinfo == NULL) {
131 ret = -ENOMEM;
132 goto bail;
135 ret = dd->f_get_base_info(rcd, kinfo);
136 if (ret < 0)
137 goto bail;
139 kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
140 kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
141 kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
142 kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
144 * have to mmap whole thing
146 kinfo->spi_rcv_egrbuftotlen =
147 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
148 kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
149 kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
150 rcd->rcvegrbuf_chunks;
151 kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
152 if (master)
153 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
155 * for this use, may be cfgctxts summed over all chips that
156 * are are configured and present
158 kinfo->spi_nctxts = dd->cfgctxts;
159 /* unit (chip/board) our context is on */
160 kinfo->spi_unit = dd->unit;
161 kinfo->spi_port = ppd->port;
162 /* for now, only a single page */
163 kinfo->spi_tid_maxsize = PAGE_SIZE;
166 * Doing this per context, and based on the skip value, etc. This has
167 * to be the actual buffer size, since the protocol code treats it
168 * as an array.
170 * These have to be set to user addresses in the user code via mmap.
171 * These values are used on return to user code for the mmap target
172 * addresses only. For 32 bit, same 44 bit address problem, so use
173 * the physical address, not virtual. Before 2.6.11, using the
174 * page_address() macro worked, but in 2.6.11, even that returns the
175 * full 64 bit address (upper bits all 1's). So far, using the
176 * physical addresses (or chip offsets, for chip mapping) works, but
177 * no doubt some future kernel release will change that, and we'll be
178 * on to yet another method of dealing with this.
179 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
180 * since the chips with non-zero rhf_offset don't normally
181 * enable tail register updates to host memory, but for testing,
182 * both can be enabled and used.
184 kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
185 kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
186 kinfo->spi_rhf_offset = dd->rhf_offset;
187 kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
188 kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
189 /* setup per-unit (not port) status area for user programs */
190 kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
191 (char *) ppd->statusp -
192 (char *) dd->pioavailregs_dma;
193 kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
194 if (!shared) {
195 kinfo->spi_piocnt = rcd->piocnt;
196 kinfo->spi_piobufbase = (u64) rcd->piobufs;
197 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
198 } else if (master) {
199 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
200 (rcd->piocnt % subctxt_cnt);
201 /* Master's PIO buffers are after all the slave's */
202 kinfo->spi_piobufbase = (u64) rcd->piobufs +
203 dd->palign *
204 (rcd->piocnt - kinfo->spi_piocnt);
205 } else {
206 unsigned slave = subctxt_fp(fp) - 1;
208 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
209 kinfo->spi_piobufbase = (u64) rcd->piobufs +
210 dd->palign * kinfo->spi_piocnt * slave;
213 if (shared) {
214 kinfo->spi_sendbuf_status =
215 cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
216 /* only spi_subctxt_* fields should be set in this block! */
217 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
219 kinfo->spi_subctxt_rcvegrbuf =
220 cvt_kvaddr(rcd->subctxt_rcvegrbuf);
221 kinfo->spi_subctxt_rcvhdr_base =
222 cvt_kvaddr(rcd->subctxt_rcvhdr_base);
226 * All user buffers are 2KB buffers. If we ever support
227 * giving 4KB buffers to user processes, this will need some
228 * work. Can't use piobufbase directly, because it has
229 * both 2K and 4K buffer base values.
231 kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
232 dd->palign;
233 kinfo->spi_pioalign = dd->palign;
234 kinfo->spi_qpair = QIB_KD_QP;
236 * user mode PIO buffers are always 2KB, even when 4KB can
237 * be received, and sent via the kernel; this is ibmaxlen
238 * for 2K MTU.
240 kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
241 kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
242 kinfo->spi_ctxt = rcd->ctxt;
243 kinfo->spi_subctxt = subctxt_fp(fp);
244 kinfo->spi_sw_version = QIB_KERN_SWVERSION;
245 kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
246 kinfo->spi_hw_version = dd->revision;
248 if (master)
249 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
251 sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
252 if (copy_to_user(ubase, kinfo, sz))
253 ret = -EFAULT;
254 bail:
255 kfree(kinfo);
256 return ret;
260 * qib_tid_update - update a context TID
261 * @rcd: the context
262 * @fp: the qib device file
263 * @ti: the TID information
265 * The new implementation as of Oct 2004 is that the driver assigns
266 * the tid and returns it to the caller. To reduce search time, we
267 * keep a cursor for each context, walking the shadow tid array to find
268 * one that's not in use.
270 * For now, if we can't allocate the full list, we fail, although
271 * in the long run, we'll allocate as many as we can, and the
272 * caller will deal with that by trying the remaining pages later.
273 * That means that when we fail, we have to mark the tids as not in
274 * use again, in our shadow copy.
276 * It's up to the caller to free the tids when they are done.
277 * We'll unlock the pages as they free them.
279 * Also, right now we are locking one page at a time, but since
280 * the intended use of this routine is for a single group of
281 * virtually contiguous pages, that should change to improve
282 * performance.
284 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
285 const struct qib_tid_info *ti)
287 int ret = 0, ntids;
288 u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
289 u16 *tidlist;
290 struct qib_devdata *dd = rcd->dd;
291 u64 physaddr;
292 unsigned long vaddr;
293 u64 __iomem *tidbase;
294 unsigned long tidmap[8];
295 struct page **pagep = NULL;
296 unsigned subctxt = subctxt_fp(fp);
298 if (!dd->pageshadow) {
299 ret = -ENOMEM;
300 goto done;
303 cnt = ti->tidcnt;
304 if (!cnt) {
305 ret = -EFAULT;
306 goto done;
308 ctxttid = rcd->ctxt * dd->rcvtidcnt;
309 if (!rcd->subctxt_cnt) {
310 tidcnt = dd->rcvtidcnt;
311 tid = rcd->tidcursor;
312 tidoff = 0;
313 } else if (!subctxt) {
314 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
315 (dd->rcvtidcnt % rcd->subctxt_cnt);
316 tidoff = dd->rcvtidcnt - tidcnt;
317 ctxttid += tidoff;
318 tid = tidcursor_fp(fp);
319 } else {
320 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
321 tidoff = tidcnt * (subctxt - 1);
322 ctxttid += tidoff;
323 tid = tidcursor_fp(fp);
325 if (cnt > tidcnt) {
326 /* make sure it all fits in tid_pg_list */
327 qib_devinfo(dd->pcidev,
328 "Process tried to allocate %u TIDs, only trying max (%u)\n",
329 cnt, tidcnt);
330 cnt = tidcnt;
332 pagep = (struct page **) rcd->tid_pg_list;
333 tidlist = (u16 *) &pagep[dd->rcvtidcnt];
334 pagep += tidoff;
335 tidlist += tidoff;
337 memset(tidmap, 0, sizeof(tidmap));
338 /* before decrement; chip actual # */
339 ntids = tidcnt;
340 tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
341 dd->rcvtidbase +
342 ctxttid * sizeof(*tidbase));
344 /* virtual address of first page in transfer */
345 vaddr = ti->tidvaddr;
346 if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
347 cnt * PAGE_SIZE)) {
348 ret = -EFAULT;
349 goto done;
351 ret = qib_get_user_pages(vaddr, cnt, pagep);
352 if (ret) {
354 * if (ret == -EBUSY)
355 * We can't continue because the pagep array won't be
356 * initialized. This should never happen,
357 * unless perhaps the user has mpin'ed the pages
358 * themselves.
360 qib_devinfo(
361 dd->pcidev,
362 "Failed to lock addr %p, %u pages: errno %d\n",
363 (void *) vaddr, cnt, -ret);
364 goto done;
366 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
367 for (; ntids--; tid++) {
368 if (tid == tidcnt)
369 tid = 0;
370 if (!dd->pageshadow[ctxttid + tid])
371 break;
373 if (ntids < 0) {
375 * Oops, wrapped all the way through their TIDs,
376 * and didn't have enough free; see comments at
377 * start of routine
379 i--; /* last tidlist[i] not filled in */
380 ret = -ENOMEM;
381 break;
383 tidlist[i] = tid + tidoff;
384 /* we "know" system pages and TID pages are same size */
385 dd->pageshadow[ctxttid + tid] = pagep[i];
386 dd->physshadow[ctxttid + tid] =
387 qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
388 PCI_DMA_FROMDEVICE);
390 * don't need atomic or it's overhead
392 __set_bit(tid, tidmap);
393 physaddr = dd->physshadow[ctxttid + tid];
394 /* PERFORMANCE: below should almost certainly be cached */
395 dd->f_put_tid(dd, &tidbase[tid],
396 RCVHQ_RCV_TYPE_EXPECTED, physaddr);
398 * don't check this tid in qib_ctxtshadow, since we
399 * just filled it in; start with the next one.
401 tid++;
404 if (ret) {
405 u32 limit;
406 cleanup:
407 /* jump here if copy out of updated info failed... */
408 /* same code that's in qib_free_tid() */
409 limit = sizeof(tidmap) * BITS_PER_BYTE;
410 if (limit > tidcnt)
411 /* just in case size changes in future */
412 limit = tidcnt;
413 tid = find_first_bit((const unsigned long *)tidmap, limit);
414 for (; tid < limit; tid++) {
415 if (!test_bit(tid, tidmap))
416 continue;
417 if (dd->pageshadow[ctxttid + tid]) {
418 dma_addr_t phys;
420 phys = dd->physshadow[ctxttid + tid];
421 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
422 /* PERFORMANCE: below should almost certainly
423 * be cached
425 dd->f_put_tid(dd, &tidbase[tid],
426 RCVHQ_RCV_TYPE_EXPECTED,
427 dd->tidinvalid);
428 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
429 PCI_DMA_FROMDEVICE);
430 dd->pageshadow[ctxttid + tid] = NULL;
433 qib_release_user_pages(pagep, cnt);
434 } else {
436 * Copy the updated array, with qib_tid's filled in, back
437 * to user. Since we did the copy in already, this "should
438 * never fail" If it does, we have to clean up...
440 if (copy_to_user((void __user *)
441 (unsigned long) ti->tidlist,
442 tidlist, cnt * sizeof(*tidlist))) {
443 ret = -EFAULT;
444 goto cleanup;
446 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
447 tidmap, sizeof(tidmap))) {
448 ret = -EFAULT;
449 goto cleanup;
451 if (tid == tidcnt)
452 tid = 0;
453 if (!rcd->subctxt_cnt)
454 rcd->tidcursor = tid;
455 else
456 tidcursor_fp(fp) = tid;
459 done:
460 return ret;
464 * qib_tid_free - free a context TID
465 * @rcd: the context
466 * @subctxt: the subcontext
467 * @ti: the TID info
469 * right now we are unlocking one page at a time, but since
470 * the intended use of this routine is for a single group of
471 * virtually contiguous pages, that should change to improve
472 * performance. We check that the TID is in range for this context
473 * but otherwise don't check validity; if user has an error and
474 * frees the wrong tid, it's only their own data that can thereby
475 * be corrupted. We do check that the TID was in use, for sanity
476 * We always use our idea of the saved address, not the address that
477 * they pass in to us.
479 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
480 const struct qib_tid_info *ti)
482 int ret = 0;
483 u32 tid, ctxttid, cnt, limit, tidcnt;
484 struct qib_devdata *dd = rcd->dd;
485 u64 __iomem *tidbase;
486 unsigned long tidmap[8];
488 if (!dd->pageshadow) {
489 ret = -ENOMEM;
490 goto done;
493 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
494 sizeof(tidmap))) {
495 ret = -EFAULT;
496 goto done;
499 ctxttid = rcd->ctxt * dd->rcvtidcnt;
500 if (!rcd->subctxt_cnt)
501 tidcnt = dd->rcvtidcnt;
502 else if (!subctxt) {
503 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
504 (dd->rcvtidcnt % rcd->subctxt_cnt);
505 ctxttid += dd->rcvtidcnt - tidcnt;
506 } else {
507 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
508 ctxttid += tidcnt * (subctxt - 1);
510 tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
511 dd->rcvtidbase +
512 ctxttid * sizeof(*tidbase));
514 limit = sizeof(tidmap) * BITS_PER_BYTE;
515 if (limit > tidcnt)
516 /* just in case size changes in future */
517 limit = tidcnt;
518 tid = find_first_bit(tidmap, limit);
519 for (cnt = 0; tid < limit; tid++) {
521 * small optimization; if we detect a run of 3 or so without
522 * any set, use find_first_bit again. That's mainly to
523 * accelerate the case where we wrapped, so we have some at
524 * the beginning, and some at the end, and a big gap
525 * in the middle.
527 if (!test_bit(tid, tidmap))
528 continue;
529 cnt++;
530 if (dd->pageshadow[ctxttid + tid]) {
531 struct page *p;
532 dma_addr_t phys;
534 p = dd->pageshadow[ctxttid + tid];
535 dd->pageshadow[ctxttid + tid] = NULL;
536 phys = dd->physshadow[ctxttid + tid];
537 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
538 /* PERFORMANCE: below should almost certainly be
539 * cached
541 dd->f_put_tid(dd, &tidbase[tid],
542 RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
543 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
544 PCI_DMA_FROMDEVICE);
545 qib_release_user_pages(&p, 1);
548 done:
549 return ret;
553 * qib_set_part_key - set a partition key
554 * @rcd: the context
555 * @key: the key
557 * We can have up to 4 active at a time (other than the default, which is
558 * always allowed). This is somewhat tricky, since multiple contexts may set
559 * the same key, so we reference count them, and clean up at exit. All 4
560 * partition keys are packed into a single qlogic_ib register. It's an
561 * error for a process to set the same pkey multiple times. We provide no
562 * mechanism to de-allocate a pkey at this time, we may eventually need to
563 * do that. I've used the atomic operations, and no locking, and only make
564 * a single pass through what's available. This should be more than
565 * adequate for some time. I'll think about spinlocks or the like if and as
566 * it's necessary.
568 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
570 struct qib_pportdata *ppd = rcd->ppd;
571 int i, pidx = -1;
572 bool any = false;
573 u16 lkey = key & 0x7FFF;
575 if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF))
576 /* nothing to do; this key always valid */
577 return 0;
579 if (!lkey)
580 return -EINVAL;
583 * Set the full membership bit, because it has to be
584 * set in the register or the packet, and it seems
585 * cleaner to set in the register than to force all
586 * callers to set it.
588 key |= 0x8000;
590 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
591 if (!rcd->pkeys[i] && pidx == -1)
592 pidx = i;
593 if (rcd->pkeys[i] == key)
594 return -EEXIST;
596 if (pidx == -1)
597 return -EBUSY;
598 for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
599 if (!ppd->pkeys[i]) {
600 any = true;
601 continue;
603 if (ppd->pkeys[i] == key) {
604 atomic_t *pkrefs = &ppd->pkeyrefs[i];
606 if (atomic_inc_return(pkrefs) > 1) {
607 rcd->pkeys[pidx] = key;
608 return 0;
611 * lost race, decrement count, catch below
613 atomic_dec(pkrefs);
614 any = true;
616 if ((ppd->pkeys[i] & 0x7FFF) == lkey)
618 * It makes no sense to have both the limited and
619 * full membership PKEY set at the same time since
620 * the unlimited one will disable the limited one.
622 return -EEXIST;
624 if (!any)
625 return -EBUSY;
626 for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
627 if (!ppd->pkeys[i] &&
628 atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
629 rcd->pkeys[pidx] = key;
630 ppd->pkeys[i] = key;
631 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
632 return 0;
635 return -EBUSY;
639 * qib_manage_rcvq - manage a context's receive queue
640 * @rcd: the context
641 * @subctxt: the subcontext
642 * @start_stop: action to carry out
644 * start_stop == 0 disables receive on the context, for use in queue
645 * overflow conditions. start_stop==1 re-enables, to be used to
646 * re-init the software copy of the head register
648 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
649 int start_stop)
651 struct qib_devdata *dd = rcd->dd;
652 unsigned int rcvctrl_op;
654 if (subctxt)
655 goto bail;
656 /* atomically clear receive enable ctxt. */
657 if (start_stop) {
659 * On enable, force in-memory copy of the tail register to
660 * 0, so that protocol code doesn't have to worry about
661 * whether or not the chip has yet updated the in-memory
662 * copy or not on return from the system call. The chip
663 * always resets it's tail register back to 0 on a
664 * transition from disabled to enabled.
666 if (rcd->rcvhdrtail_kvaddr)
667 qib_clear_rcvhdrtail(rcd);
668 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
669 } else
670 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
671 dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
672 /* always; new head should be equal to new tail; see above */
673 bail:
674 return 0;
677 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
678 struct qib_devdata *dd)
680 int i, j, pchanged = 0;
681 struct qib_pportdata *ppd = rcd->ppd;
683 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
684 if (!rcd->pkeys[i])
685 continue;
686 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
687 /* check for match independent of the global bit */
688 if ((ppd->pkeys[j] & 0x7fff) !=
689 (rcd->pkeys[i] & 0x7fff))
690 continue;
691 if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
692 ppd->pkeys[j] = 0;
693 pchanged++;
695 break;
697 rcd->pkeys[i] = 0;
699 if (pchanged)
700 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
703 /* common code for the mappings on dma_alloc_coherent mem */
704 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
705 unsigned len, void *kvaddr, u32 write_ok, char *what)
707 struct qib_devdata *dd = rcd->dd;
708 unsigned long pfn;
709 int ret;
711 if ((vma->vm_end - vma->vm_start) > len) {
712 qib_devinfo(dd->pcidev,
713 "FAIL on %s: len %lx > %x\n", what,
714 vma->vm_end - vma->vm_start, len);
715 ret = -EFAULT;
716 goto bail;
720 * shared context user code requires rcvhdrq mapped r/w, others
721 * only allowed readonly mapping.
723 if (!write_ok) {
724 if (vma->vm_flags & VM_WRITE) {
725 qib_devinfo(dd->pcidev,
726 "%s must be mapped readonly\n", what);
727 ret = -EPERM;
728 goto bail;
731 /* don't allow them to later change with mprotect */
732 vma->vm_flags &= ~VM_MAYWRITE;
735 pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
736 ret = remap_pfn_range(vma, vma->vm_start, pfn,
737 len, vma->vm_page_prot);
738 if (ret)
739 qib_devinfo(dd->pcidev,
740 "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
741 what, rcd->ctxt, pfn, len, ret);
742 bail:
743 return ret;
746 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
747 u64 ureg)
749 unsigned long phys;
750 unsigned long sz;
751 int ret;
754 * This is real hardware, so use io_remap. This is the mechanism
755 * for the user process to update the head registers for their ctxt
756 * in the chip.
758 sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
759 if ((vma->vm_end - vma->vm_start) > sz) {
760 qib_devinfo(dd->pcidev,
761 "FAIL mmap userreg: reqlen %lx > PAGE\n",
762 vma->vm_end - vma->vm_start);
763 ret = -EFAULT;
764 } else {
765 phys = dd->physaddr + ureg;
766 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
768 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
769 ret = io_remap_pfn_range(vma, vma->vm_start,
770 phys >> PAGE_SHIFT,
771 vma->vm_end - vma->vm_start,
772 vma->vm_page_prot);
774 return ret;
777 static int mmap_piobufs(struct vm_area_struct *vma,
778 struct qib_devdata *dd,
779 struct qib_ctxtdata *rcd,
780 unsigned piobufs, unsigned piocnt)
782 unsigned long phys;
783 int ret;
786 * When we map the PIO buffers in the chip, we want to map them as
787 * writeonly, no read possible; unfortunately, x86 doesn't allow
788 * for this in hardware, but we still prevent users from asking
789 * for it.
791 if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
792 qib_devinfo(dd->pcidev,
793 "FAIL mmap piobufs: reqlen %lx > PAGE\n",
794 vma->vm_end - vma->vm_start);
795 ret = -EINVAL;
796 goto bail;
799 phys = dd->physaddr + piobufs;
801 #if defined(__powerpc__)
802 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
803 #endif
806 * don't allow them to later change to readable with mprotect (for when
807 * not initially mapped readable, as is normally the case)
809 vma->vm_flags &= ~VM_MAYREAD;
810 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
812 /* We used PAT if wc_cookie == 0 */
813 if (!dd->wc_cookie)
814 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
816 ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
817 vma->vm_end - vma->vm_start,
818 vma->vm_page_prot);
819 bail:
820 return ret;
823 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
824 struct qib_ctxtdata *rcd)
826 struct qib_devdata *dd = rcd->dd;
827 unsigned long start, size;
828 size_t total_size, i;
829 unsigned long pfn;
830 int ret;
832 size = rcd->rcvegrbuf_size;
833 total_size = rcd->rcvegrbuf_chunks * size;
834 if ((vma->vm_end - vma->vm_start) > total_size) {
835 qib_devinfo(dd->pcidev,
836 "FAIL on egr bufs: reqlen %lx > actual %lx\n",
837 vma->vm_end - vma->vm_start,
838 (unsigned long) total_size);
839 ret = -EINVAL;
840 goto bail;
843 if (vma->vm_flags & VM_WRITE) {
844 qib_devinfo(dd->pcidev,
845 "Can't map eager buffers as writable (flags=%lx)\n",
846 vma->vm_flags);
847 ret = -EPERM;
848 goto bail;
850 /* don't allow them to later change to writeable with mprotect */
851 vma->vm_flags &= ~VM_MAYWRITE;
853 start = vma->vm_start;
855 for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
856 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
857 ret = remap_pfn_range(vma, start, pfn, size,
858 vma->vm_page_prot);
859 if (ret < 0)
860 goto bail;
862 ret = 0;
864 bail:
865 return ret;
869 * qib_file_vma_fault - handle a VMA page fault.
871 static int qib_file_vma_fault(struct vm_fault *vmf)
873 struct page *page;
875 page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
876 if (!page)
877 return VM_FAULT_SIGBUS;
879 get_page(page);
880 vmf->page = page;
882 return 0;
885 static const struct vm_operations_struct qib_file_vm_ops = {
886 .fault = qib_file_vma_fault,
889 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
890 struct qib_ctxtdata *rcd, unsigned subctxt)
892 struct qib_devdata *dd = rcd->dd;
893 unsigned subctxt_cnt;
894 unsigned long len;
895 void *addr;
896 size_t size;
897 int ret = 0;
899 subctxt_cnt = rcd->subctxt_cnt;
900 size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
903 * Each process has all the subctxt uregbase, rcvhdrq, and
904 * rcvegrbufs mmapped - as an array for all the processes,
905 * and also separately for this process.
907 if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
908 addr = rcd->subctxt_uregbase;
909 size = PAGE_SIZE * subctxt_cnt;
910 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
911 addr = rcd->subctxt_rcvhdr_base;
912 size = rcd->rcvhdrq_size * subctxt_cnt;
913 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
914 addr = rcd->subctxt_rcvegrbuf;
915 size *= subctxt_cnt;
916 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
917 PAGE_SIZE * subctxt)) {
918 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
919 size = PAGE_SIZE;
920 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
921 rcd->rcvhdrq_size * subctxt)) {
922 addr = rcd->subctxt_rcvhdr_base +
923 rcd->rcvhdrq_size * subctxt;
924 size = rcd->rcvhdrq_size;
925 } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
926 addr = rcd->user_event_mask;
927 size = PAGE_SIZE;
928 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
929 size * subctxt)) {
930 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
931 /* rcvegrbufs are read-only on the slave */
932 if (vma->vm_flags & VM_WRITE) {
933 qib_devinfo(dd->pcidev,
934 "Can't map eager buffers as writable (flags=%lx)\n",
935 vma->vm_flags);
936 ret = -EPERM;
937 goto bail;
940 * Don't allow permission to later change to writeable
941 * with mprotect.
943 vma->vm_flags &= ~VM_MAYWRITE;
944 } else
945 goto bail;
946 len = vma->vm_end - vma->vm_start;
947 if (len > size) {
948 ret = -EINVAL;
949 goto bail;
952 vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
953 vma->vm_ops = &qib_file_vm_ops;
954 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
955 ret = 1;
957 bail:
958 return ret;
962 * qib_mmapf - mmap various structures into user space
963 * @fp: the file pointer
964 * @vma: the VM area
966 * We use this to have a shared buffer between the kernel and the user code
967 * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
968 * buffers in the chip. We have the open and close entries so we can bump
969 * the ref count and keep the driver from being unloaded while still mapped.
971 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
973 struct qib_ctxtdata *rcd;
974 struct qib_devdata *dd;
975 u64 pgaddr, ureg;
976 unsigned piobufs, piocnt;
977 int ret, match = 1;
979 rcd = ctxt_fp(fp);
980 if (!rcd || !(vma->vm_flags & VM_SHARED)) {
981 ret = -EINVAL;
982 goto bail;
984 dd = rcd->dd;
987 * This is the qib_do_user_init() code, mapping the shared buffers
988 * and per-context user registers into the user process. The address
989 * referred to by vm_pgoff is the file offset passed via mmap().
990 * For shared contexts, this is the kernel vmalloc() address of the
991 * pages to share with the master.
992 * For non-shared or master ctxts, this is a physical address.
993 * We only do one mmap for each space mapped.
995 pgaddr = vma->vm_pgoff << PAGE_SHIFT;
998 * Check for 0 in case one of the allocations failed, but user
999 * called mmap anyway.
1001 if (!pgaddr) {
1002 ret = -EINVAL;
1003 goto bail;
1007 * Physical addresses must fit in 40 bits for our hardware.
1008 * Check for kernel virtual addresses first, anything else must
1009 * match a HW or memory address.
1011 ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1012 if (ret) {
1013 if (ret > 0)
1014 ret = 0;
1015 goto bail;
1018 ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1019 if (!rcd->subctxt_cnt) {
1020 /* ctxt is not shared */
1021 piocnt = rcd->piocnt;
1022 piobufs = rcd->piobufs;
1023 } else if (!subctxt_fp(fp)) {
1024 /* caller is the master */
1025 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1026 (rcd->piocnt % rcd->subctxt_cnt);
1027 piobufs = rcd->piobufs +
1028 dd->palign * (rcd->piocnt - piocnt);
1029 } else {
1030 unsigned slave = subctxt_fp(fp) - 1;
1032 /* caller is a slave */
1033 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1034 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1037 if (pgaddr == ureg)
1038 ret = mmap_ureg(vma, dd, ureg);
1039 else if (pgaddr == piobufs)
1040 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1041 else if (pgaddr == dd->pioavailregs_phys)
1042 /* in-memory copy of pioavail registers */
1043 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1044 (void *) dd->pioavailregs_dma, 0,
1045 "pioavail registers");
1046 else if (pgaddr == rcd->rcvegr_phys)
1047 ret = mmap_rcvegrbufs(vma, rcd);
1048 else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1050 * The rcvhdrq itself; multiple pages, contiguous
1051 * from an i/o perspective. Shared contexts need
1052 * to map r/w, so we allow writing.
1054 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1055 rcd->rcvhdrq, 1, "rcvhdrq");
1056 else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1057 /* in-memory copy of rcvhdrq tail register */
1058 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1059 rcd->rcvhdrtail_kvaddr, 0,
1060 "rcvhdrq tail");
1061 else
1062 match = 0;
1063 if (!match)
1064 ret = -EINVAL;
1066 vma->vm_private_data = NULL;
1068 if (ret < 0)
1069 qib_devinfo(dd->pcidev,
1070 "mmap Failure %d: off %llx len %lx\n",
1071 -ret, (unsigned long long)pgaddr,
1072 vma->vm_end - vma->vm_start);
1073 bail:
1074 return ret;
1077 static __poll_t qib_poll_urgent(struct qib_ctxtdata *rcd,
1078 struct file *fp,
1079 struct poll_table_struct *pt)
1081 struct qib_devdata *dd = rcd->dd;
1082 __poll_t pollflag;
1084 poll_wait(fp, &rcd->wait, pt);
1086 spin_lock_irq(&dd->uctxt_lock);
1087 if (rcd->urgent != rcd->urgent_poll) {
1088 pollflag = EPOLLIN | EPOLLRDNORM;
1089 rcd->urgent_poll = rcd->urgent;
1090 } else {
1091 pollflag = 0;
1092 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1094 spin_unlock_irq(&dd->uctxt_lock);
1096 return pollflag;
1099 static __poll_t qib_poll_next(struct qib_ctxtdata *rcd,
1100 struct file *fp,
1101 struct poll_table_struct *pt)
1103 struct qib_devdata *dd = rcd->dd;
1104 __poll_t pollflag;
1106 poll_wait(fp, &rcd->wait, pt);
1108 spin_lock_irq(&dd->uctxt_lock);
1109 if (dd->f_hdrqempty(rcd)) {
1110 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1111 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1112 pollflag = 0;
1113 } else
1114 pollflag = EPOLLIN | EPOLLRDNORM;
1115 spin_unlock_irq(&dd->uctxt_lock);
1117 return pollflag;
1120 static __poll_t qib_poll(struct file *fp, struct poll_table_struct *pt)
1122 struct qib_ctxtdata *rcd;
1123 __poll_t pollflag;
1125 rcd = ctxt_fp(fp);
1126 if (!rcd)
1127 pollflag = EPOLLERR;
1128 else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1129 pollflag = qib_poll_urgent(rcd, fp, pt);
1130 else if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1131 pollflag = qib_poll_next(rcd, fp, pt);
1132 else /* invalid */
1133 pollflag = EPOLLERR;
1135 return pollflag;
1138 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1140 struct qib_filedata *fd = fp->private_data;
1141 const unsigned int weight = cpumask_weight(&current->cpus_allowed);
1142 const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1143 int local_cpu;
1146 * If process has NOT already set it's affinity, select and
1147 * reserve a processor for it on the local NUMA node.
1149 if ((weight >= qib_cpulist_count) &&
1150 (cpumask_weight(local_mask) <= qib_cpulist_count)) {
1151 for_each_cpu(local_cpu, local_mask)
1152 if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1153 fd->rec_cpu_num = local_cpu;
1154 return;
1159 * If process has NOT already set it's affinity, select and
1160 * reserve a processor for it, as a rendevous for all
1161 * users of the driver. If they don't actually later
1162 * set affinity to this cpu, or set it to some other cpu,
1163 * it just means that sooner or later we don't recommend
1164 * a cpu, and let the scheduler do it's best.
1166 if (weight >= qib_cpulist_count) {
1167 int cpu;
1169 cpu = find_first_zero_bit(qib_cpulist,
1170 qib_cpulist_count);
1171 if (cpu == qib_cpulist_count)
1172 qib_dev_err(dd,
1173 "no cpus avail for affinity PID %u\n",
1174 current->pid);
1175 else {
1176 __set_bit(cpu, qib_cpulist);
1177 fd->rec_cpu_num = cpu;
1183 * Check that userland and driver are compatible for subcontexts.
1185 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1187 /* this code is written long-hand for clarity */
1188 if (QIB_USER_SWMAJOR != user_swmajor) {
1189 /* no promise of compatibility if major mismatch */
1190 return 0;
1192 if (QIB_USER_SWMAJOR == 1) {
1193 switch (QIB_USER_SWMINOR) {
1194 case 0:
1195 case 1:
1196 case 2:
1197 /* no subctxt implementation so cannot be compatible */
1198 return 0;
1199 case 3:
1200 /* 3 is only compatible with itself */
1201 return user_swminor == 3;
1202 default:
1203 /* >= 4 are compatible (or are expected to be) */
1204 return user_swminor <= QIB_USER_SWMINOR;
1207 /* make no promises yet for future major versions */
1208 return 0;
1211 static int init_subctxts(struct qib_devdata *dd,
1212 struct qib_ctxtdata *rcd,
1213 const struct qib_user_info *uinfo)
1215 int ret = 0;
1216 unsigned num_subctxts;
1217 size_t size;
1220 * If the user is requesting zero subctxts,
1221 * skip the subctxt allocation.
1223 if (uinfo->spu_subctxt_cnt <= 0)
1224 goto bail;
1225 num_subctxts = uinfo->spu_subctxt_cnt;
1227 /* Check for subctxt compatibility */
1228 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1229 uinfo->spu_userversion & 0xffff)) {
1230 qib_devinfo(dd->pcidev,
1231 "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1232 (int) (uinfo->spu_userversion >> 16),
1233 (int) (uinfo->spu_userversion & 0xffff),
1234 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1235 goto bail;
1237 if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1238 ret = -EINVAL;
1239 goto bail;
1242 rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1243 if (!rcd->subctxt_uregbase) {
1244 ret = -ENOMEM;
1245 goto bail;
1247 /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1248 size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1249 sizeof(u32), PAGE_SIZE) * num_subctxts;
1250 rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1251 if (!rcd->subctxt_rcvhdr_base) {
1252 ret = -ENOMEM;
1253 goto bail_ureg;
1256 rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1257 rcd->rcvegrbuf_size *
1258 num_subctxts);
1259 if (!rcd->subctxt_rcvegrbuf) {
1260 ret = -ENOMEM;
1261 goto bail_rhdr;
1264 rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1265 rcd->subctxt_id = uinfo->spu_subctxt_id;
1266 rcd->active_slaves = 1;
1267 rcd->redirect_seq_cnt = 1;
1268 set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1269 goto bail;
1271 bail_rhdr:
1272 vfree(rcd->subctxt_rcvhdr_base);
1273 bail_ureg:
1274 vfree(rcd->subctxt_uregbase);
1275 rcd->subctxt_uregbase = NULL;
1276 bail:
1277 return ret;
1280 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1281 struct file *fp, const struct qib_user_info *uinfo)
1283 struct qib_filedata *fd = fp->private_data;
1284 struct qib_devdata *dd = ppd->dd;
1285 struct qib_ctxtdata *rcd;
1286 void *ptmp = NULL;
1287 int ret;
1288 int numa_id;
1290 assign_ctxt_affinity(fp, dd);
1292 numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1293 cpu_to_node(fd->rec_cpu_num) :
1294 numa_node_id()) : dd->assigned_node_id;
1296 rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1299 * Allocate memory for use in qib_tid_update() at open to
1300 * reduce cost of expected send setup per message segment
1302 if (rcd)
1303 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1304 dd->rcvtidcnt * sizeof(struct page **),
1305 GFP_KERNEL);
1307 if (!rcd || !ptmp) {
1308 qib_dev_err(dd,
1309 "Unable to allocate ctxtdata memory, failing open\n");
1310 ret = -ENOMEM;
1311 goto bailerr;
1313 rcd->userversion = uinfo->spu_userversion;
1314 ret = init_subctxts(dd, rcd, uinfo);
1315 if (ret)
1316 goto bailerr;
1317 rcd->tid_pg_list = ptmp;
1318 rcd->pid = current->pid;
1319 init_waitqueue_head(&dd->rcd[ctxt]->wait);
1320 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1321 ctxt_fp(fp) = rcd;
1322 qib_stats.sps_ctxts++;
1323 dd->freectxts--;
1324 ret = 0;
1325 goto bail;
1327 bailerr:
1328 if (fd->rec_cpu_num != -1)
1329 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1331 dd->rcd[ctxt] = NULL;
1332 kfree(rcd);
1333 kfree(ptmp);
1334 bail:
1335 return ret;
1338 static inline int usable(struct qib_pportdata *ppd)
1340 struct qib_devdata *dd = ppd->dd;
1342 return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1343 (ppd->lflags & QIBL_LINKACTIVE);
1347 * Select a context on the given device, either using a requested port
1348 * or the port based on the context number.
1350 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1351 const struct qib_user_info *uinfo)
1353 struct qib_pportdata *ppd = NULL;
1354 int ret, ctxt;
1356 if (port) {
1357 if (!usable(dd->pport + port - 1)) {
1358 ret = -ENETDOWN;
1359 goto done;
1360 } else
1361 ppd = dd->pport + port - 1;
1363 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1364 ctxt++)
1366 if (ctxt == dd->cfgctxts) {
1367 ret = -EBUSY;
1368 goto done;
1370 if (!ppd) {
1371 u32 pidx = ctxt % dd->num_pports;
1373 if (usable(dd->pport + pidx))
1374 ppd = dd->pport + pidx;
1375 else {
1376 for (pidx = 0; pidx < dd->num_pports && !ppd;
1377 pidx++)
1378 if (usable(dd->pport + pidx))
1379 ppd = dd->pport + pidx;
1382 ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1383 done:
1384 return ret;
1387 static int find_free_ctxt(int unit, struct file *fp,
1388 const struct qib_user_info *uinfo)
1390 struct qib_devdata *dd = qib_lookup(unit);
1391 int ret;
1393 if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1394 ret = -ENODEV;
1395 else
1396 ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1398 return ret;
1401 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1402 unsigned alg)
1404 struct qib_devdata *udd = NULL;
1405 int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1406 u32 port = uinfo->spu_port, ctxt;
1408 devmax = qib_count_units(&npresent, &nup);
1409 if (!npresent) {
1410 ret = -ENXIO;
1411 goto done;
1413 if (nup == 0) {
1414 ret = -ENETDOWN;
1415 goto done;
1418 if (alg == QIB_PORT_ALG_ACROSS) {
1419 unsigned inuse = ~0U;
1421 /* find device (with ACTIVE ports) with fewest ctxts in use */
1422 for (ndev = 0; ndev < devmax; ndev++) {
1423 struct qib_devdata *dd = qib_lookup(ndev);
1424 unsigned cused = 0, cfree = 0, pusable = 0;
1426 if (!dd)
1427 continue;
1428 if (port && port <= dd->num_pports &&
1429 usable(dd->pport + port - 1))
1430 pusable = 1;
1431 else
1432 for (i = 0; i < dd->num_pports; i++)
1433 if (usable(dd->pport + i))
1434 pusable++;
1435 if (!pusable)
1436 continue;
1437 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1438 ctxt++)
1439 if (dd->rcd[ctxt])
1440 cused++;
1441 else
1442 cfree++;
1443 if (cfree && cused < inuse) {
1444 udd = dd;
1445 inuse = cused;
1448 if (udd) {
1449 ret = choose_port_ctxt(fp, udd, port, uinfo);
1450 goto done;
1452 } else {
1453 for (ndev = 0; ndev < devmax; ndev++) {
1454 struct qib_devdata *dd = qib_lookup(ndev);
1456 if (dd) {
1457 ret = choose_port_ctxt(fp, dd, port, uinfo);
1458 if (!ret)
1459 goto done;
1460 if (ret == -EBUSY)
1461 dusable++;
1465 ret = dusable ? -EBUSY : -ENETDOWN;
1467 done:
1468 return ret;
1471 static int find_shared_ctxt(struct file *fp,
1472 const struct qib_user_info *uinfo)
1474 int devmax, ndev, i;
1475 int ret = 0;
1477 devmax = qib_count_units(NULL, NULL);
1479 for (ndev = 0; ndev < devmax; ndev++) {
1480 struct qib_devdata *dd = qib_lookup(ndev);
1482 /* device portion of usable() */
1483 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1484 continue;
1485 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1486 struct qib_ctxtdata *rcd = dd->rcd[i];
1488 /* Skip ctxts which are not yet open */
1489 if (!rcd || !rcd->cnt)
1490 continue;
1491 /* Skip ctxt if it doesn't match the requested one */
1492 if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1493 continue;
1494 /* Verify the sharing process matches the master */
1495 if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1496 rcd->userversion != uinfo->spu_userversion ||
1497 rcd->cnt >= rcd->subctxt_cnt) {
1498 ret = -EINVAL;
1499 goto done;
1501 ctxt_fp(fp) = rcd;
1502 subctxt_fp(fp) = rcd->cnt++;
1503 rcd->subpid[subctxt_fp(fp)] = current->pid;
1504 tidcursor_fp(fp) = 0;
1505 rcd->active_slaves |= 1 << subctxt_fp(fp);
1506 ret = 1;
1507 goto done;
1511 done:
1512 return ret;
1515 static int qib_open(struct inode *in, struct file *fp)
1517 /* The real work is performed later in qib_assign_ctxt() */
1518 fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1519 if (fp->private_data) /* no cpu affinity by default */
1520 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1521 return fp->private_data ? 0 : -ENOMEM;
1524 static int find_hca(unsigned int cpu, int *unit)
1526 int ret = 0, devmax, npresent, nup, ndev;
1528 *unit = -1;
1530 devmax = qib_count_units(&npresent, &nup);
1531 if (!npresent) {
1532 ret = -ENXIO;
1533 goto done;
1535 if (!nup) {
1536 ret = -ENETDOWN;
1537 goto done;
1539 for (ndev = 0; ndev < devmax; ndev++) {
1540 struct qib_devdata *dd = qib_lookup(ndev);
1542 if (dd) {
1543 if (pcibus_to_node(dd->pcidev->bus) < 0) {
1544 ret = -EINVAL;
1545 goto done;
1547 if (cpu_to_node(cpu) ==
1548 pcibus_to_node(dd->pcidev->bus)) {
1549 *unit = ndev;
1550 goto done;
1554 done:
1555 return ret;
1558 static int do_qib_user_sdma_queue_create(struct file *fp)
1560 struct qib_filedata *fd = fp->private_data;
1561 struct qib_ctxtdata *rcd = fd->rcd;
1562 struct qib_devdata *dd = rcd->dd;
1564 if (dd->flags & QIB_HAS_SEND_DMA) {
1566 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1567 dd->unit,
1568 rcd->ctxt,
1569 fd->subctxt);
1570 if (!fd->pq)
1571 return -ENOMEM;
1574 return 0;
1578 * Get ctxt early, so can set affinity prior to memory allocation.
1580 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1582 int ret;
1583 int i_minor;
1584 unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1586 /* Check to be sure we haven't already initialized this file */
1587 if (ctxt_fp(fp)) {
1588 ret = -EINVAL;
1589 goto done;
1592 /* for now, if major version is different, bail */
1593 swmajor = uinfo->spu_userversion >> 16;
1594 if (swmajor != QIB_USER_SWMAJOR) {
1595 ret = -ENODEV;
1596 goto done;
1599 swminor = uinfo->spu_userversion & 0xffff;
1601 if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1602 alg = uinfo->spu_port_alg;
1604 mutex_lock(&qib_mutex);
1606 if (qib_compatible_subctxts(swmajor, swminor) &&
1607 uinfo->spu_subctxt_cnt) {
1608 ret = find_shared_ctxt(fp, uinfo);
1609 if (ret > 0) {
1610 ret = do_qib_user_sdma_queue_create(fp);
1611 if (!ret)
1612 assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1613 goto done_ok;
1617 i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1618 if (i_minor)
1619 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1620 else {
1621 int unit;
1622 const unsigned int cpu = cpumask_first(&current->cpus_allowed);
1623 const unsigned int weight =
1624 cpumask_weight(&current->cpus_allowed);
1626 if (weight == 1 && !test_bit(cpu, qib_cpulist))
1627 if (!find_hca(cpu, &unit) && unit >= 0)
1628 if (!find_free_ctxt(unit, fp, uinfo)) {
1629 ret = 0;
1630 goto done_chk_sdma;
1632 ret = get_a_ctxt(fp, uinfo, alg);
1635 done_chk_sdma:
1636 if (!ret)
1637 ret = do_qib_user_sdma_queue_create(fp);
1638 done_ok:
1639 mutex_unlock(&qib_mutex);
1641 done:
1642 return ret;
1646 static int qib_do_user_init(struct file *fp,
1647 const struct qib_user_info *uinfo)
1649 int ret;
1650 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1651 struct qib_devdata *dd;
1652 unsigned uctxt;
1654 /* Subctxts don't need to initialize anything since master did it. */
1655 if (subctxt_fp(fp)) {
1656 ret = wait_event_interruptible(rcd->wait,
1657 !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1658 goto bail;
1661 dd = rcd->dd;
1663 /* some ctxts may get extra buffers, calculate that here */
1664 uctxt = rcd->ctxt - dd->first_user_ctxt;
1665 if (uctxt < dd->ctxts_extrabuf) {
1666 rcd->piocnt = dd->pbufsctxt + 1;
1667 rcd->pio_base = rcd->piocnt * uctxt;
1668 } else {
1669 rcd->piocnt = dd->pbufsctxt;
1670 rcd->pio_base = rcd->piocnt * uctxt +
1671 dd->ctxts_extrabuf;
1675 * All user buffers are 2KB buffers. If we ever support
1676 * giving 4KB buffers to user processes, this will need some
1677 * work. Can't use piobufbase directly, because it has
1678 * both 2K and 4K buffer base values. So check and handle.
1680 if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1681 if (rcd->pio_base >= dd->piobcnt2k) {
1682 qib_dev_err(dd,
1683 "%u:ctxt%u: no 2KB buffers available\n",
1684 dd->unit, rcd->ctxt);
1685 ret = -ENOBUFS;
1686 goto bail;
1688 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1689 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1690 rcd->ctxt, rcd->piocnt);
1693 rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1694 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1695 TXCHK_CHG_TYPE_USER, rcd);
1697 * try to ensure that processes start up with consistent avail update
1698 * for their own range, at least. If system very quiet, it might
1699 * have the in-memory copy out of date at startup for this range of
1700 * buffers, when a context gets re-used. Do after the chg_pioavail
1701 * and before the rest of setup, so it's "almost certain" the dma
1702 * will have occurred (can't 100% guarantee, but should be many
1703 * decimals of 9s, with this ordering), given how much else happens
1704 * after this.
1706 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1709 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1710 * array for time being. If rcd->ctxt > chip-supported,
1711 * we need to do extra stuff here to handle by handling overflow
1712 * through ctxt 0, someday
1714 ret = qib_create_rcvhdrq(dd, rcd);
1715 if (!ret)
1716 ret = qib_setup_eagerbufs(rcd);
1717 if (ret)
1718 goto bail_pio;
1720 rcd->tidcursor = 0; /* start at beginning after open */
1722 /* initialize poll variables... */
1723 rcd->urgent = 0;
1724 rcd->urgent_poll = 0;
1727 * Now enable the ctxt for receive.
1728 * For chips that are set to DMA the tail register to memory
1729 * when they change (and when the update bit transitions from
1730 * 0 to 1. So for those chips, we turn it off and then back on.
1731 * This will (very briefly) affect any other open ctxts, but the
1732 * duration is very short, and therefore isn't an issue. We
1733 * explicitly set the in-memory tail copy to 0 beforehand, so we
1734 * don't have to wait to be sure the DMA update has happened
1735 * (chip resets head/tail to 0 on transition to enable).
1737 if (rcd->rcvhdrtail_kvaddr)
1738 qib_clear_rcvhdrtail(rcd);
1740 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1741 rcd->ctxt);
1743 /* Notify any waiting slaves */
1744 if (rcd->subctxt_cnt) {
1745 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1746 wake_up(&rcd->wait);
1748 return 0;
1750 bail_pio:
1751 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1752 TXCHK_CHG_TYPE_KERN, rcd);
1753 bail:
1754 return ret;
1758 * unlock_exptid - unlock any expected TID entries context still had in use
1759 * @rcd: ctxt
1761 * We don't actually update the chip here, because we do a bulk update
1762 * below, using f_clear_tids.
1764 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1766 struct qib_devdata *dd = rcd->dd;
1767 int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1768 int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1770 for (i = ctxt_tidbase; i < maxtid; i++) {
1771 struct page *p = dd->pageshadow[i];
1772 dma_addr_t phys;
1774 if (!p)
1775 continue;
1777 phys = dd->physshadow[i];
1778 dd->physshadow[i] = dd->tidinvalid;
1779 dd->pageshadow[i] = NULL;
1780 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1781 PCI_DMA_FROMDEVICE);
1782 qib_release_user_pages(&p, 1);
1783 cnt++;
1787 static int qib_close(struct inode *in, struct file *fp)
1789 int ret = 0;
1790 struct qib_filedata *fd;
1791 struct qib_ctxtdata *rcd;
1792 struct qib_devdata *dd;
1793 unsigned long flags;
1794 unsigned ctxt;
1796 mutex_lock(&qib_mutex);
1798 fd = fp->private_data;
1799 fp->private_data = NULL;
1800 rcd = fd->rcd;
1801 if (!rcd) {
1802 mutex_unlock(&qib_mutex);
1803 goto bail;
1806 dd = rcd->dd;
1808 /* ensure all pio buffer writes in progress are flushed */
1809 qib_flush_wc();
1811 /* drain user sdma queue */
1812 if (fd->pq) {
1813 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1814 qib_user_sdma_queue_destroy(fd->pq);
1817 if (fd->rec_cpu_num != -1)
1818 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1820 if (--rcd->cnt) {
1822 * XXX If the master closes the context before the slave(s),
1823 * revoke the mmap for the eager receive queue so
1824 * the slave(s) don't wait for receive data forever.
1826 rcd->active_slaves &= ~(1 << fd->subctxt);
1827 rcd->subpid[fd->subctxt] = 0;
1828 mutex_unlock(&qib_mutex);
1829 goto bail;
1832 /* early; no interrupt users after this */
1833 spin_lock_irqsave(&dd->uctxt_lock, flags);
1834 ctxt = rcd->ctxt;
1835 dd->rcd[ctxt] = NULL;
1836 rcd->pid = 0;
1837 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1839 if (rcd->rcvwait_to || rcd->piowait_to ||
1840 rcd->rcvnowait || rcd->pionowait) {
1841 rcd->rcvwait_to = 0;
1842 rcd->piowait_to = 0;
1843 rcd->rcvnowait = 0;
1844 rcd->pionowait = 0;
1846 if (rcd->flag)
1847 rcd->flag = 0;
1849 if (dd->kregbase) {
1850 /* atomically clear receive enable ctxt and intr avail. */
1851 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1852 QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1854 /* clean up the pkeys for this ctxt user */
1855 qib_clean_part_key(rcd, dd);
1856 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1857 qib_chg_pioavailkernel(dd, rcd->pio_base,
1858 rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1860 dd->f_clear_tids(dd, rcd);
1862 if (dd->pageshadow)
1863 unlock_expected_tids(rcd);
1864 qib_stats.sps_ctxts--;
1865 dd->freectxts++;
1868 mutex_unlock(&qib_mutex);
1869 qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1871 bail:
1872 kfree(fd);
1873 return ret;
1876 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1878 struct qib_ctxt_info info;
1879 int ret;
1880 size_t sz;
1881 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1882 struct qib_filedata *fd;
1884 fd = fp->private_data;
1886 info.num_active = qib_count_active_units();
1887 info.unit = rcd->dd->unit;
1888 info.port = rcd->ppd->port;
1889 info.ctxt = rcd->ctxt;
1890 info.subctxt = subctxt_fp(fp);
1891 /* Number of user ctxts available for this device. */
1892 info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1893 info.num_subctxts = rcd->subctxt_cnt;
1894 info.rec_cpu = fd->rec_cpu_num;
1895 sz = sizeof(info);
1897 if (copy_to_user(uinfo, &info, sz)) {
1898 ret = -EFAULT;
1899 goto bail;
1901 ret = 0;
1903 bail:
1904 return ret;
1907 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1908 u32 __user *inflightp)
1910 const u32 val = qib_user_sdma_inflight_counter(pq);
1912 if (put_user(val, inflightp))
1913 return -EFAULT;
1915 return 0;
1918 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1919 struct qib_user_sdma_queue *pq,
1920 u32 __user *completep)
1922 u32 val;
1923 int err;
1925 if (!pq)
1926 return -EINVAL;
1928 err = qib_user_sdma_make_progress(ppd, pq);
1929 if (err < 0)
1930 return err;
1932 val = qib_user_sdma_complete_counter(pq);
1933 if (put_user(val, completep))
1934 return -EFAULT;
1936 return 0;
1939 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1941 int ret = 0;
1943 if (!usable(rcd->ppd)) {
1944 int i;
1946 * if link is down, or otherwise not usable, delay
1947 * the caller up to 30 seconds, so we don't thrash
1948 * in trying to get the chip back to ACTIVE, and
1949 * set flag so they make the call again.
1951 if (rcd->user_event_mask) {
1953 * subctxt_cnt is 0 if not shared, so do base
1954 * separately, first, then remaining subctxt, if any
1956 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1957 &rcd->user_event_mask[0]);
1958 for (i = 1; i < rcd->subctxt_cnt; i++)
1959 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1960 &rcd->user_event_mask[i]);
1962 for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1963 msleep(100);
1964 ret = -ENETDOWN;
1966 return ret;
1970 * Find all user contexts in use, and set the specified bit in their
1971 * event mask.
1972 * See also find_ctxt() for a similar use, that is specific to send buffers.
1974 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
1976 struct qib_ctxtdata *rcd;
1977 unsigned ctxt;
1978 int ret = 0;
1979 unsigned long flags;
1981 spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
1982 for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
1983 ctxt++) {
1984 rcd = ppd->dd->rcd[ctxt];
1985 if (!rcd)
1986 continue;
1987 if (rcd->user_event_mask) {
1988 int i;
1990 * subctxt_cnt is 0 if not shared, so do base
1991 * separately, first, then remaining subctxt, if any
1993 set_bit(evtbit, &rcd->user_event_mask[0]);
1994 for (i = 1; i < rcd->subctxt_cnt; i++)
1995 set_bit(evtbit, &rcd->user_event_mask[i]);
1997 ret = 1;
1998 break;
2000 spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2002 return ret;
2006 * clear the event notifier events for this context.
2007 * For the DISARM_BUFS case, we also take action (this obsoletes
2008 * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2009 * compatibility.
2010 * Other bits don't currently require actions, just atomically clear.
2011 * User process then performs actions appropriate to bit having been
2012 * set, if desired, and checks again in future.
2014 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2015 unsigned long events)
2017 int ret = 0, i;
2019 for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2020 if (!test_bit(i, &events))
2021 continue;
2022 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2023 (void)qib_disarm_piobufs_ifneeded(rcd);
2024 ret = disarm_req_delay(rcd);
2025 } else
2026 clear_bit(i, &rcd->user_event_mask[subctxt]);
2028 return ret;
2031 static ssize_t qib_write(struct file *fp, const char __user *data,
2032 size_t count, loff_t *off)
2034 const struct qib_cmd __user *ucmd;
2035 struct qib_ctxtdata *rcd;
2036 const void __user *src;
2037 size_t consumed, copy = 0;
2038 struct qib_cmd cmd;
2039 ssize_t ret = 0;
2040 void *dest;
2042 if (!ib_safe_file_access(fp)) {
2043 pr_err_once("qib_write: process %d (%s) changed security contexts after opening file descriptor, this is not allowed.\n",
2044 task_tgid_vnr(current), current->comm);
2045 return -EACCES;
2048 if (count < sizeof(cmd.type)) {
2049 ret = -EINVAL;
2050 goto bail;
2053 ucmd = (const struct qib_cmd __user *) data;
2055 if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2056 ret = -EFAULT;
2057 goto bail;
2060 consumed = sizeof(cmd.type);
2062 switch (cmd.type) {
2063 case QIB_CMD_ASSIGN_CTXT:
2064 case QIB_CMD_USER_INIT:
2065 copy = sizeof(cmd.cmd.user_info);
2066 dest = &cmd.cmd.user_info;
2067 src = &ucmd->cmd.user_info;
2068 break;
2070 case QIB_CMD_RECV_CTRL:
2071 copy = sizeof(cmd.cmd.recv_ctrl);
2072 dest = &cmd.cmd.recv_ctrl;
2073 src = &ucmd->cmd.recv_ctrl;
2074 break;
2076 case QIB_CMD_CTXT_INFO:
2077 copy = sizeof(cmd.cmd.ctxt_info);
2078 dest = &cmd.cmd.ctxt_info;
2079 src = &ucmd->cmd.ctxt_info;
2080 break;
2082 case QIB_CMD_TID_UPDATE:
2083 case QIB_CMD_TID_FREE:
2084 copy = sizeof(cmd.cmd.tid_info);
2085 dest = &cmd.cmd.tid_info;
2086 src = &ucmd->cmd.tid_info;
2087 break;
2089 case QIB_CMD_SET_PART_KEY:
2090 copy = sizeof(cmd.cmd.part_key);
2091 dest = &cmd.cmd.part_key;
2092 src = &ucmd->cmd.part_key;
2093 break;
2095 case QIB_CMD_DISARM_BUFS:
2096 case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2097 copy = 0;
2098 src = NULL;
2099 dest = NULL;
2100 break;
2102 case QIB_CMD_POLL_TYPE:
2103 copy = sizeof(cmd.cmd.poll_type);
2104 dest = &cmd.cmd.poll_type;
2105 src = &ucmd->cmd.poll_type;
2106 break;
2108 case QIB_CMD_ARMLAUNCH_CTRL:
2109 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2110 dest = &cmd.cmd.armlaunch_ctrl;
2111 src = &ucmd->cmd.armlaunch_ctrl;
2112 break;
2114 case QIB_CMD_SDMA_INFLIGHT:
2115 copy = sizeof(cmd.cmd.sdma_inflight);
2116 dest = &cmd.cmd.sdma_inflight;
2117 src = &ucmd->cmd.sdma_inflight;
2118 break;
2120 case QIB_CMD_SDMA_COMPLETE:
2121 copy = sizeof(cmd.cmd.sdma_complete);
2122 dest = &cmd.cmd.sdma_complete;
2123 src = &ucmd->cmd.sdma_complete;
2124 break;
2126 case QIB_CMD_ACK_EVENT:
2127 copy = sizeof(cmd.cmd.event_mask);
2128 dest = &cmd.cmd.event_mask;
2129 src = &ucmd->cmd.event_mask;
2130 break;
2132 default:
2133 ret = -EINVAL;
2134 goto bail;
2137 if (copy) {
2138 if ((count - consumed) < copy) {
2139 ret = -EINVAL;
2140 goto bail;
2142 if (copy_from_user(dest, src, copy)) {
2143 ret = -EFAULT;
2144 goto bail;
2146 consumed += copy;
2149 rcd = ctxt_fp(fp);
2150 if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2151 ret = -EINVAL;
2152 goto bail;
2155 switch (cmd.type) {
2156 case QIB_CMD_ASSIGN_CTXT:
2157 if (rcd) {
2158 ret = -EINVAL;
2159 goto bail;
2162 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2163 if (ret)
2164 goto bail;
2165 break;
2167 case QIB_CMD_USER_INIT:
2168 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2169 if (ret)
2170 goto bail;
2171 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2172 cmd.cmd.user_info.spu_base_info,
2173 cmd.cmd.user_info.spu_base_info_size);
2174 break;
2176 case QIB_CMD_RECV_CTRL:
2177 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2178 break;
2180 case QIB_CMD_CTXT_INFO:
2181 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2182 (unsigned long) cmd.cmd.ctxt_info);
2183 break;
2185 case QIB_CMD_TID_UPDATE:
2186 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2187 break;
2189 case QIB_CMD_TID_FREE:
2190 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2191 break;
2193 case QIB_CMD_SET_PART_KEY:
2194 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2195 break;
2197 case QIB_CMD_DISARM_BUFS:
2198 (void)qib_disarm_piobufs_ifneeded(rcd);
2199 ret = disarm_req_delay(rcd);
2200 break;
2202 case QIB_CMD_PIOAVAILUPD:
2203 qib_force_pio_avail_update(rcd->dd);
2204 break;
2206 case QIB_CMD_POLL_TYPE:
2207 rcd->poll_type = cmd.cmd.poll_type;
2208 break;
2210 case QIB_CMD_ARMLAUNCH_CTRL:
2211 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2212 break;
2214 case QIB_CMD_SDMA_INFLIGHT:
2215 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2216 (u32 __user *) (unsigned long)
2217 cmd.cmd.sdma_inflight);
2218 break;
2220 case QIB_CMD_SDMA_COMPLETE:
2221 ret = qib_sdma_get_complete(rcd->ppd,
2222 user_sdma_queue_fp(fp),
2223 (u32 __user *) (unsigned long)
2224 cmd.cmd.sdma_complete);
2225 break;
2227 case QIB_CMD_ACK_EVENT:
2228 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2229 cmd.cmd.event_mask);
2230 break;
2233 if (ret >= 0)
2234 ret = consumed;
2236 bail:
2237 return ret;
2240 static ssize_t qib_write_iter(struct kiocb *iocb, struct iov_iter *from)
2242 struct qib_filedata *fp = iocb->ki_filp->private_data;
2243 struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2244 struct qib_user_sdma_queue *pq = fp->pq;
2246 if (!iter_is_iovec(from) || !from->nr_segs || !pq)
2247 return -EINVAL;
2249 return qib_user_sdma_writev(rcd, pq, from->iov, from->nr_segs);
2252 static struct class *qib_class;
2253 static dev_t qib_dev;
2255 int qib_cdev_init(int minor, const char *name,
2256 const struct file_operations *fops,
2257 struct cdev **cdevp, struct device **devp)
2259 const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2260 struct cdev *cdev;
2261 struct device *device = NULL;
2262 int ret;
2264 cdev = cdev_alloc();
2265 if (!cdev) {
2266 pr_err("Could not allocate cdev for minor %d, %s\n",
2267 minor, name);
2268 ret = -ENOMEM;
2269 goto done;
2272 cdev->owner = THIS_MODULE;
2273 cdev->ops = fops;
2274 kobject_set_name(&cdev->kobj, name);
2276 ret = cdev_add(cdev, dev, 1);
2277 if (ret < 0) {
2278 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2279 minor, name, -ret);
2280 goto err_cdev;
2283 device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2284 if (!IS_ERR(device))
2285 goto done;
2286 ret = PTR_ERR(device);
2287 device = NULL;
2288 pr_err("Could not create device for minor %d, %s (err %d)\n",
2289 minor, name, -ret);
2290 err_cdev:
2291 cdev_del(cdev);
2292 cdev = NULL;
2293 done:
2294 *cdevp = cdev;
2295 *devp = device;
2296 return ret;
2299 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2301 struct device *device = *devp;
2303 if (device) {
2304 device_unregister(device);
2305 *devp = NULL;
2308 if (*cdevp) {
2309 cdev_del(*cdevp);
2310 *cdevp = NULL;
2314 static struct cdev *wildcard_cdev;
2315 static struct device *wildcard_device;
2317 int __init qib_dev_init(void)
2319 int ret;
2321 ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2322 if (ret < 0) {
2323 pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2324 goto done;
2327 qib_class = class_create(THIS_MODULE, "ipath");
2328 if (IS_ERR(qib_class)) {
2329 ret = PTR_ERR(qib_class);
2330 pr_err("Could not create device class (err %d)\n", -ret);
2331 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2334 done:
2335 return ret;
2338 void qib_dev_cleanup(void)
2340 if (qib_class) {
2341 class_destroy(qib_class);
2342 qib_class = NULL;
2345 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2348 static atomic_t user_count = ATOMIC_INIT(0);
2350 static void qib_user_remove(struct qib_devdata *dd)
2352 if (atomic_dec_return(&user_count) == 0)
2353 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2355 qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2358 static int qib_user_add(struct qib_devdata *dd)
2360 char name[10];
2361 int ret;
2363 if (atomic_inc_return(&user_count) == 1) {
2364 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2365 &wildcard_cdev, &wildcard_device);
2366 if (ret)
2367 goto done;
2370 snprintf(name, sizeof(name), "ipath%d", dd->unit);
2371 ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2372 &dd->user_cdev, &dd->user_device);
2373 if (ret)
2374 qib_user_remove(dd);
2375 done:
2376 return ret;
2380 * Create per-unit files in /dev
2382 int qib_device_create(struct qib_devdata *dd)
2384 int r, ret;
2386 r = qib_user_add(dd);
2387 ret = qib_diag_add(dd);
2388 if (r && !ret)
2389 ret = r;
2390 return ret;
2394 * Remove per-unit files in /dev
2395 * void, core kernel returns no errors for this stuff
2397 void qib_device_remove(struct qib_devdata *dd)
2399 qib_user_remove(dd);
2400 qib_diag_remove(dd);