2 * V4L2 subdevice driver for OmniVision OV6650 Camera Sensor
4 * Copyright (C) 2010 Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
6 * Based on OmniVision OV96xx Camera Driver
7 * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
9 * Based on ov772x camera driver:
10 * Copyright (C) 2008 Renesas Solutions Corp.
11 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
13 * Based on ov7670 and soc_camera_platform driver,
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
15 * Copyright (C) 2008 Magnus Damm
16 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
18 * Hardware specific bits initialy based on former work by Matt Callow
19 * drivers/media/video/omap/sensor_ov6650.c
20 * Copyright (C) 2006 Matt Callow
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
27 #include <linux/bitops.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/v4l2-mediabus.h>
32 #include <linux/module.h>
34 #include <media/v4l2-clk.h>
35 #include <media/v4l2-ctrls.h>
36 #include <media/v4l2-device.h>
38 /* Register definitions */
39 #define REG_GAIN 0x00 /* range 00 - 3F */
42 #define REG_SAT 0x03 /* [7:4] saturation [0:3] reserved */
43 #define REG_HUE 0x04 /* [7:6] rsrvd [5] hue en [4:0] hue */
51 #define REG_CLKRC 0x11 /* Data Format and Internal Clock */
52 /* [7:6] Input system clock (MHz)*/
53 /* 00=8, 01=12, 10=16, 11=24 */
54 /* [5:0]: Internal Clock Pre-Scaler */
55 #define REG_COMA 0x12 /* [7] Reset */
60 #define REG_HSTRT 0x17
61 #define REG_HSTOP 0x18
62 #define REG_VSTRT 0x19
63 #define REG_VSTOP 0x1a
64 #define REG_PSHFT 0x1b
67 #define REG_HSYNS 0x1e
68 #define REG_HSYNE 0x1f
80 #define REG_FRARL 0x2b
87 #define REG_FRAJH 0x32
88 #define REG_FRAJL 0x33
90 #define REG_L1AEC 0x35
101 #define REG_SPCE 0x68
102 #define REG_ADCL 0x69
104 #define REG_RMCO 0x6c
105 #define REG_GMCO 0x6d
106 #define REG_BMCO 0x6e
109 /* Register bits, values, etc. */
110 #define OV6650_PIDH 0x66 /* high byte of product ID number */
111 #define OV6650_PIDL 0x50 /* low byte of product ID number */
112 #define OV6650_MIDH 0x7F /* high byte of mfg ID */
113 #define OV6650_MIDL 0xA2 /* low byte of mfg ID */
115 #define DEF_GAIN 0x00
116 #define DEF_BLUE 0x80
120 #define SAT_MASK (0xf << SAT_SHIFT)
121 #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK)
123 #define HUE_EN BIT(5)
124 #define HUE_MASK 0x1f
126 #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK))
128 #define DEF_AECH 0x4D
130 #define CLKRC_6MHz 0x00
131 #define CLKRC_12MHz 0x40
132 #define CLKRC_16MHz 0x80
133 #define CLKRC_24MHz 0xc0
134 #define CLKRC_DIV_MASK 0x3f
135 #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
137 #define COMA_RESET BIT(7)
138 #define COMA_QCIF BIT(5)
139 #define COMA_RAW_RGB BIT(4)
140 #define COMA_RGB BIT(3)
141 #define COMA_BW BIT(2)
142 #define COMA_WORD_SWAP BIT(1)
143 #define COMA_BYTE_SWAP BIT(0)
144 #define DEF_COMA 0x00
146 #define COMB_FLIP_V BIT(7)
147 #define COMB_FLIP_H BIT(5)
148 #define COMB_BAND_FILTER BIT(4)
149 #define COMB_AWB BIT(2)
150 #define COMB_AGC BIT(1)
151 #define COMB_AEC BIT(0)
152 #define DEF_COMB 0x5f
154 #define COML_ONE_CHANNEL BIT(7)
156 #define DEF_HSTRT 0x24
157 #define DEF_HSTOP 0xd4
158 #define DEF_VSTRT 0x04
159 #define DEF_VSTOP 0x94
161 #define COMF_HREF_LOW BIT(4)
163 #define COMJ_PCLK_RISING BIT(4)
164 #define COMJ_VSYNC_HIGH BIT(0)
166 /* supported resolutions */
167 #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
168 #define W_CIF (W_QCIF << 1)
169 #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
170 #define H_CIF (H_QCIF << 1)
172 #define FRAME_RATE_MAX 30
181 struct v4l2_subdev subdev
;
182 struct v4l2_ctrl_handler hdl
;
184 /* exposure/autoexposure cluster */
185 struct v4l2_ctrl
*autoexposure
;
186 struct v4l2_ctrl
*exposure
;
189 /* gain/autogain cluster */
190 struct v4l2_ctrl
*autogain
;
191 struct v4l2_ctrl
*gain
;
194 /* blue/red/autowhitebalance cluster */
195 struct v4l2_ctrl
*autowb
;
196 struct v4l2_ctrl
*blue
;
197 struct v4l2_ctrl
*red
;
199 struct v4l2_clk
*clk
;
200 bool half_scale
; /* scale down output by 2 */
201 struct v4l2_rect rect
; /* sensor cropping window */
202 unsigned long pclk_limit
; /* from host */
203 unsigned long pclk_max
; /* from resolution and format */
204 struct v4l2_fract tpf
; /* as requested with s_parm */
206 enum v4l2_colorspace colorspace
;
210 static u32 ov6650_codes
[] = {
211 MEDIA_BUS_FMT_YUYV8_2X8
,
212 MEDIA_BUS_FMT_UYVY8_2X8
,
213 MEDIA_BUS_FMT_YVYU8_2X8
,
214 MEDIA_BUS_FMT_VYUY8_2X8
,
215 MEDIA_BUS_FMT_SBGGR8_1X8
,
216 MEDIA_BUS_FMT_Y8_1X8
,
219 /* read a register */
220 static int ov6650_reg_read(struct i2c_client
*client
, u8 reg
, u8
*val
)
224 struct i2c_msg msg
= {
225 .addr
= client
->addr
,
231 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
235 msg
.flags
= I2C_M_RD
;
236 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
244 dev_err(&client
->dev
, "Failed reading register 0x%02x!\n", reg
);
248 /* write a register */
249 static int ov6650_reg_write(struct i2c_client
*client
, u8 reg
, u8 val
)
252 unsigned char data
[2] = { reg
, val
};
253 struct i2c_msg msg
= {
254 .addr
= client
->addr
,
260 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
264 dev_err(&client
->dev
, "Failed writing register 0x%02x!\n", reg
);
271 /* Read a register, alter its bits, write it back */
272 static int ov6650_reg_rmw(struct i2c_client
*client
, u8 reg
, u8 set
, u8 mask
)
277 ret
= ov6650_reg_read(client
, reg
, &val
);
279 dev_err(&client
->dev
,
280 "[Read]-Modify-Write of register 0x%02x failed!\n",
288 ret
= ov6650_reg_write(client
, reg
, val
);
290 dev_err(&client
->dev
,
291 "Read-Modify-[Write] of register 0x%02x failed!\n",
297 static struct ov6650
*to_ov6650(const struct i2c_client
*client
)
299 return container_of(i2c_get_clientdata(client
), struct ov6650
, subdev
);
302 /* Start/Stop streaming from the device */
303 static int ov6650_s_stream(struct v4l2_subdev
*sd
, int enable
)
308 /* Get status of additional camera capabilities */
309 static int ov6550_g_volatile_ctrl(struct v4l2_ctrl
*ctrl
)
311 struct ov6650
*priv
= container_of(ctrl
->handler
, struct ov6650
, hdl
);
312 struct v4l2_subdev
*sd
= &priv
->subdev
;
313 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
318 case V4L2_CID_AUTOGAIN
:
319 ret
= ov6650_reg_read(client
, REG_GAIN
, ®
);
321 priv
->gain
->val
= reg
;
323 case V4L2_CID_AUTO_WHITE_BALANCE
:
324 ret
= ov6650_reg_read(client
, REG_BLUE
, ®
);
326 ret
= ov6650_reg_read(client
, REG_RED
, ®2
);
328 priv
->blue
->val
= reg
;
329 priv
->red
->val
= reg2
;
332 case V4L2_CID_EXPOSURE_AUTO
:
333 ret
= ov6650_reg_read(client
, REG_AECH
, ®
);
335 priv
->exposure
->val
= reg
;
341 /* Set status of additional camera capabilities */
342 static int ov6550_s_ctrl(struct v4l2_ctrl
*ctrl
)
344 struct ov6650
*priv
= container_of(ctrl
->handler
, struct ov6650
, hdl
);
345 struct v4l2_subdev
*sd
= &priv
->subdev
;
346 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
350 case V4L2_CID_AUTOGAIN
:
351 ret
= ov6650_reg_rmw(client
, REG_COMB
,
352 ctrl
->val
? COMB_AGC
: 0, COMB_AGC
);
353 if (!ret
&& !ctrl
->val
)
354 ret
= ov6650_reg_write(client
, REG_GAIN
, priv
->gain
->val
);
356 case V4L2_CID_AUTO_WHITE_BALANCE
:
357 ret
= ov6650_reg_rmw(client
, REG_COMB
,
358 ctrl
->val
? COMB_AWB
: 0, COMB_AWB
);
359 if (!ret
&& !ctrl
->val
) {
360 ret
= ov6650_reg_write(client
, REG_BLUE
, priv
->blue
->val
);
362 ret
= ov6650_reg_write(client
, REG_RED
,
366 case V4L2_CID_SATURATION
:
367 return ov6650_reg_rmw(client
, REG_SAT
, SET_SAT(ctrl
->val
),
370 return ov6650_reg_rmw(client
, REG_HUE
, SET_HUE(ctrl
->val
),
372 case V4L2_CID_BRIGHTNESS
:
373 return ov6650_reg_write(client
, REG_BRT
, ctrl
->val
);
374 case V4L2_CID_EXPOSURE_AUTO
:
375 ret
= ov6650_reg_rmw(client
, REG_COMB
, ctrl
->val
==
376 V4L2_EXPOSURE_AUTO
? COMB_AEC
: 0, COMB_AEC
);
377 if (!ret
&& ctrl
->val
== V4L2_EXPOSURE_MANUAL
)
378 ret
= ov6650_reg_write(client
, REG_AECH
,
379 priv
->exposure
->val
);
382 return ov6650_reg_write(client
, REG_GAM1
, ctrl
->val
);
384 return ov6650_reg_rmw(client
, REG_COMB
,
385 ctrl
->val
? COMB_FLIP_V
: 0, COMB_FLIP_V
);
387 return ov6650_reg_rmw(client
, REG_COMB
,
388 ctrl
->val
? COMB_FLIP_H
: 0, COMB_FLIP_H
);
394 #ifdef CONFIG_VIDEO_ADV_DEBUG
395 static int ov6650_get_register(struct v4l2_subdev
*sd
,
396 struct v4l2_dbg_register
*reg
)
398 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
402 if (reg
->reg
& ~0xff)
407 ret
= ov6650_reg_read(client
, reg
->reg
, &val
);
409 reg
->val
= (__u64
)val
;
414 static int ov6650_set_register(struct v4l2_subdev
*sd
,
415 const struct v4l2_dbg_register
*reg
)
417 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
419 if (reg
->reg
& ~0xff || reg
->val
& ~0xff)
422 return ov6650_reg_write(client
, reg
->reg
, reg
->val
);
426 static int ov6650_s_power(struct v4l2_subdev
*sd
, int on
)
428 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
429 struct ov6650
*priv
= to_ov6650(client
);
433 ret
= v4l2_clk_enable(priv
->clk
);
435 v4l2_clk_disable(priv
->clk
);
440 static int ov6650_get_selection(struct v4l2_subdev
*sd
,
441 struct v4l2_subdev_pad_config
*cfg
,
442 struct v4l2_subdev_selection
*sel
)
444 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
445 struct ov6650
*priv
= to_ov6650(client
);
447 if (sel
->which
!= V4L2_SUBDEV_FORMAT_ACTIVE
)
450 switch (sel
->target
) {
451 case V4L2_SEL_TGT_CROP_BOUNDS
:
452 case V4L2_SEL_TGT_CROP_DEFAULT
:
453 sel
->r
.left
= DEF_HSTRT
<< 1;
454 sel
->r
.top
= DEF_VSTRT
<< 1;
455 sel
->r
.width
= W_CIF
;
456 sel
->r
.height
= H_CIF
;
458 case V4L2_SEL_TGT_CROP
:
466 static int ov6650_set_selection(struct v4l2_subdev
*sd
,
467 struct v4l2_subdev_pad_config
*cfg
,
468 struct v4l2_subdev_selection
*sel
)
470 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
471 struct ov6650
*priv
= to_ov6650(client
);
472 struct v4l2_rect rect
= sel
->r
;
475 if (sel
->which
!= V4L2_SUBDEV_FORMAT_ACTIVE
||
476 sel
->target
!= V4L2_SEL_TGT_CROP
)
479 v4l_bound_align_image(&rect
.width
, 2, W_CIF
, 1,
480 &rect
.height
, 2, H_CIF
, 1, 0);
481 v4l_bound_align_image(&rect
.left
, DEF_HSTRT
<< 1,
482 (DEF_HSTRT
<< 1) + W_CIF
- (__s32
)rect
.width
, 1,
483 &rect
.top
, DEF_VSTRT
<< 1,
484 (DEF_VSTRT
<< 1) + H_CIF
- (__s32
)rect
.height
, 1,
487 ret
= ov6650_reg_write(client
, REG_HSTRT
, rect
.left
>> 1);
489 priv
->rect
.left
= rect
.left
;
490 ret
= ov6650_reg_write(client
, REG_HSTOP
,
491 (rect
.left
+ rect
.width
) >> 1);
494 priv
->rect
.width
= rect
.width
;
495 ret
= ov6650_reg_write(client
, REG_VSTRT
, rect
.top
>> 1);
498 priv
->rect
.top
= rect
.top
;
499 ret
= ov6650_reg_write(client
, REG_VSTOP
,
500 (rect
.top
+ rect
.height
) >> 1);
503 priv
->rect
.height
= rect
.height
;
508 static int ov6650_get_fmt(struct v4l2_subdev
*sd
,
509 struct v4l2_subdev_pad_config
*cfg
,
510 struct v4l2_subdev_format
*format
)
512 struct v4l2_mbus_framefmt
*mf
= &format
->format
;
513 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
514 struct ov6650
*priv
= to_ov6650(client
);
519 mf
->width
= priv
->rect
.width
>> priv
->half_scale
;
520 mf
->height
= priv
->rect
.height
>> priv
->half_scale
;
521 mf
->code
= priv
->code
;
522 mf
->colorspace
= priv
->colorspace
;
523 mf
->field
= V4L2_FIELD_NONE
;
528 static bool is_unscaled_ok(int width
, int height
, struct v4l2_rect
*rect
)
530 return width
> rect
->width
>> 1 || height
> rect
->height
>> 1;
533 static u8
to_clkrc(struct v4l2_fract
*timeperframe
,
534 unsigned long pclk_limit
, unsigned long pclk_max
)
538 if (timeperframe
->numerator
&& timeperframe
->denominator
)
539 pclk
= pclk_max
* timeperframe
->denominator
/
540 (FRAME_RATE_MAX
* timeperframe
->numerator
);
544 if (pclk_limit
&& pclk_limit
< pclk
)
547 return (pclk_max
- 1) / pclk
;
550 /* set the format we will capture in */
551 static int ov6650_s_fmt(struct v4l2_subdev
*sd
, struct v4l2_mbus_framefmt
*mf
)
553 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
554 struct ov6650
*priv
= to_ov6650(client
);
555 bool half_scale
= !is_unscaled_ok(mf
->width
, mf
->height
, &priv
->rect
);
556 struct v4l2_subdev_selection sel
= {
557 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
558 .target
= V4L2_SEL_TGT_CROP
,
559 .r
.left
= priv
->rect
.left
+ (priv
->rect
.width
>> 1) -
560 (mf
->width
>> (1 - half_scale
)),
561 .r
.top
= priv
->rect
.top
+ (priv
->rect
.height
>> 1) -
562 (mf
->height
>> (1 - half_scale
)),
563 .r
.width
= mf
->width
<< half_scale
,
564 .r
.height
= mf
->height
<< half_scale
,
567 unsigned long mclk
, pclk
;
568 u8 coma_set
= 0, coma_mask
= 0, coml_set
, coml_mask
, clkrc
;
571 /* select color matrix configuration for given color encoding */
573 case MEDIA_BUS_FMT_Y8_1X8
:
574 dev_dbg(&client
->dev
, "pixel format GREY8_1X8\n");
575 coma_mask
|= COMA_RGB
| COMA_WORD_SWAP
| COMA_BYTE_SWAP
;
578 case MEDIA_BUS_FMT_YUYV8_2X8
:
579 dev_dbg(&client
->dev
, "pixel format YUYV8_2X8_LE\n");
580 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_BYTE_SWAP
;
581 coma_set
|= COMA_WORD_SWAP
;
583 case MEDIA_BUS_FMT_YVYU8_2X8
:
584 dev_dbg(&client
->dev
, "pixel format YVYU8_2X8_LE (untested)\n");
585 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
|
588 case MEDIA_BUS_FMT_UYVY8_2X8
:
589 dev_dbg(&client
->dev
, "pixel format YUYV8_2X8_BE\n");
591 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
;
592 coma_set
|= COMA_BYTE_SWAP
;
594 coma_mask
|= COMA_RGB
| COMA_BW
;
595 coma_set
|= COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
598 case MEDIA_BUS_FMT_VYUY8_2X8
:
599 dev_dbg(&client
->dev
, "pixel format YVYU8_2X8_BE (untested)\n");
601 coma_mask
|= COMA_RGB
| COMA_BW
;
602 coma_set
|= COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
604 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
;
605 coma_set
|= COMA_BYTE_SWAP
;
608 case MEDIA_BUS_FMT_SBGGR8_1X8
:
609 dev_dbg(&client
->dev
, "pixel format SBGGR8_1X8 (untested)\n");
610 coma_mask
|= COMA_BW
| COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
611 coma_set
|= COMA_RAW_RGB
| COMA_RGB
;
614 dev_err(&client
->dev
, "Pixel format not handled: 0x%x\n", code
);
619 if (code
== MEDIA_BUS_FMT_Y8_1X8
||
620 code
== MEDIA_BUS_FMT_SBGGR8_1X8
) {
621 coml_mask
= COML_ONE_CHANNEL
;
623 priv
->pclk_max
= 4000000;
626 coml_set
= COML_ONE_CHANNEL
;
627 priv
->pclk_max
= 8000000;
630 if (code
== MEDIA_BUS_FMT_SBGGR8_1X8
)
631 priv
->colorspace
= V4L2_COLORSPACE_SRGB
;
633 priv
->colorspace
= V4L2_COLORSPACE_JPEG
;
636 dev_dbg(&client
->dev
, "max resolution: QCIF\n");
637 coma_set
|= COMA_QCIF
;
640 dev_dbg(&client
->dev
, "max resolution: CIF\n");
641 coma_mask
|= COMA_QCIF
;
643 priv
->half_scale
= half_scale
;
647 priv
->pclk_limit
= 1334000;
648 dev_dbg(&client
->dev
, "using 12MHz input clock\n");
650 clkrc
|= to_clkrc(&priv
->tpf
, priv
->pclk_limit
, priv
->pclk_max
);
652 pclk
= priv
->pclk_max
/ GET_CLKRC_DIV(clkrc
);
653 dev_dbg(&client
->dev
, "pixel clock divider: %ld.%ld\n",
654 mclk
/ pclk
, 10 * mclk
% pclk
/ pclk
);
656 ret
= ov6650_set_selection(sd
, NULL
, &sel
);
658 ret
= ov6650_reg_rmw(client
, REG_COMA
, coma_set
, coma_mask
);
660 ret
= ov6650_reg_write(client
, REG_CLKRC
, clkrc
);
662 ret
= ov6650_reg_rmw(client
, REG_COML
, coml_set
, coml_mask
);
665 mf
->colorspace
= priv
->colorspace
;
666 mf
->width
= priv
->rect
.width
>> half_scale
;
667 mf
->height
= priv
->rect
.height
>> half_scale
;
672 static int ov6650_set_fmt(struct v4l2_subdev
*sd
,
673 struct v4l2_subdev_pad_config
*cfg
,
674 struct v4l2_subdev_format
*format
)
676 struct v4l2_mbus_framefmt
*mf
= &format
->format
;
677 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
678 struct ov6650
*priv
= to_ov6650(client
);
683 if (is_unscaled_ok(mf
->width
, mf
->height
, &priv
->rect
))
684 v4l_bound_align_image(&mf
->width
, 2, W_CIF
, 1,
685 &mf
->height
, 2, H_CIF
, 1, 0);
687 mf
->field
= V4L2_FIELD_NONE
;
690 case MEDIA_BUS_FMT_Y10_1X10
:
691 mf
->code
= MEDIA_BUS_FMT_Y8_1X8
;
693 case MEDIA_BUS_FMT_Y8_1X8
:
694 case MEDIA_BUS_FMT_YVYU8_2X8
:
695 case MEDIA_BUS_FMT_YUYV8_2X8
:
696 case MEDIA_BUS_FMT_VYUY8_2X8
:
697 case MEDIA_BUS_FMT_UYVY8_2X8
:
698 mf
->colorspace
= V4L2_COLORSPACE_JPEG
;
701 mf
->code
= MEDIA_BUS_FMT_SBGGR8_1X8
;
703 case MEDIA_BUS_FMT_SBGGR8_1X8
:
704 mf
->colorspace
= V4L2_COLORSPACE_SRGB
;
708 if (format
->which
== V4L2_SUBDEV_FORMAT_ACTIVE
)
709 return ov6650_s_fmt(sd
, mf
);
715 static int ov6650_enum_mbus_code(struct v4l2_subdev
*sd
,
716 struct v4l2_subdev_pad_config
*cfg
,
717 struct v4l2_subdev_mbus_code_enum
*code
)
719 if (code
->pad
|| code
->index
>= ARRAY_SIZE(ov6650_codes
))
722 code
->code
= ov6650_codes
[code
->index
];
726 static int ov6650_g_parm(struct v4l2_subdev
*sd
, struct v4l2_streamparm
*parms
)
728 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
729 struct ov6650
*priv
= to_ov6650(client
);
730 struct v4l2_captureparm
*cp
= &parms
->parm
.capture
;
732 if (parms
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
735 memset(cp
, 0, sizeof(*cp
));
736 cp
->capability
= V4L2_CAP_TIMEPERFRAME
;
737 cp
->timeperframe
.numerator
= GET_CLKRC_DIV(to_clkrc(&priv
->tpf
,
738 priv
->pclk_limit
, priv
->pclk_max
));
739 cp
->timeperframe
.denominator
= FRAME_RATE_MAX
;
741 dev_dbg(&client
->dev
, "Frame interval: %u/%u s\n",
742 cp
->timeperframe
.numerator
, cp
->timeperframe
.denominator
);
747 static int ov6650_s_parm(struct v4l2_subdev
*sd
, struct v4l2_streamparm
*parms
)
749 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
750 struct ov6650
*priv
= to_ov6650(client
);
751 struct v4l2_captureparm
*cp
= &parms
->parm
.capture
;
752 struct v4l2_fract
*tpf
= &cp
->timeperframe
;
756 if (parms
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
759 if (cp
->extendedmode
!= 0)
762 if (tpf
->numerator
== 0 || tpf
->denominator
== 0)
763 div
= 1; /* Reset to full rate */
765 div
= (tpf
->numerator
* FRAME_RATE_MAX
) / tpf
->denominator
;
769 else if (div
> GET_CLKRC_DIV(CLKRC_DIV_MASK
))
770 div
= GET_CLKRC_DIV(CLKRC_DIV_MASK
);
773 * Keep result to be used as tpf limit
774 * for subseqent clock divider calculations
776 priv
->tpf
.numerator
= div
;
777 priv
->tpf
.denominator
= FRAME_RATE_MAX
;
779 clkrc
= to_clkrc(&priv
->tpf
, priv
->pclk_limit
, priv
->pclk_max
);
781 ret
= ov6650_reg_rmw(client
, REG_CLKRC
, clkrc
, CLKRC_DIV_MASK
);
783 tpf
->numerator
= GET_CLKRC_DIV(clkrc
);
784 tpf
->denominator
= FRAME_RATE_MAX
;
790 /* Soft reset the camera. This has nothing to do with the RESET pin! */
791 static int ov6650_reset(struct i2c_client
*client
)
795 dev_dbg(&client
->dev
, "reset\n");
797 ret
= ov6650_reg_rmw(client
, REG_COMA
, COMA_RESET
, 0);
799 dev_err(&client
->dev
,
800 "An error occurred while entering soft reset!\n");
805 /* program default register values */
806 static int ov6650_prog_dflt(struct i2c_client
*client
)
810 dev_dbg(&client
->dev
, "initializing\n");
812 ret
= ov6650_reg_write(client
, REG_COMA
, 0); /* ~COMA_RESET */
814 ret
= ov6650_reg_rmw(client
, REG_COMB
, 0, COMB_BAND_FILTER
);
819 static int ov6650_video_probe(struct i2c_client
*client
)
821 struct ov6650
*priv
= to_ov6650(client
);
822 u8 pidh
, pidl
, midh
, midl
;
825 ret
= ov6650_s_power(&priv
->subdev
, 1);
830 * check and show product ID and manufacturer ID
832 ret
= ov6650_reg_read(client
, REG_PIDH
, &pidh
);
834 ret
= ov6650_reg_read(client
, REG_PIDL
, &pidl
);
836 ret
= ov6650_reg_read(client
, REG_MIDH
, &midh
);
838 ret
= ov6650_reg_read(client
, REG_MIDL
, &midl
);
843 if ((pidh
!= OV6650_PIDH
) || (pidl
!= OV6650_PIDL
)) {
844 dev_err(&client
->dev
, "Product ID error 0x%02x:0x%02x\n",
850 dev_info(&client
->dev
,
851 "ov6650 Product ID 0x%02x:0x%02x Manufacturer ID 0x%02x:0x%02x\n",
852 pidh
, pidl
, midh
, midl
);
854 ret
= ov6650_reset(client
);
856 ret
= ov6650_prog_dflt(client
);
858 ret
= v4l2_ctrl_handler_setup(&priv
->hdl
);
861 ov6650_s_power(&priv
->subdev
, 0);
865 static const struct v4l2_ctrl_ops ov6550_ctrl_ops
= {
866 .g_volatile_ctrl
= ov6550_g_volatile_ctrl
,
867 .s_ctrl
= ov6550_s_ctrl
,
870 static const struct v4l2_subdev_core_ops ov6650_core_ops
= {
871 #ifdef CONFIG_VIDEO_ADV_DEBUG
872 .g_register
= ov6650_get_register
,
873 .s_register
= ov6650_set_register
,
875 .s_power
= ov6650_s_power
,
878 /* Request bus settings on camera side */
879 static int ov6650_g_mbus_config(struct v4l2_subdev
*sd
,
880 struct v4l2_mbus_config
*cfg
)
883 cfg
->flags
= V4L2_MBUS_MASTER
|
884 V4L2_MBUS_PCLK_SAMPLE_RISING
| V4L2_MBUS_PCLK_SAMPLE_FALLING
|
885 V4L2_MBUS_HSYNC_ACTIVE_HIGH
| V4L2_MBUS_HSYNC_ACTIVE_LOW
|
886 V4L2_MBUS_VSYNC_ACTIVE_HIGH
| V4L2_MBUS_VSYNC_ACTIVE_LOW
|
887 V4L2_MBUS_DATA_ACTIVE_HIGH
;
888 cfg
->type
= V4L2_MBUS_PARALLEL
;
893 /* Alter bus settings on camera side */
894 static int ov6650_s_mbus_config(struct v4l2_subdev
*sd
,
895 const struct v4l2_mbus_config
*cfg
)
897 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
900 if (cfg
->flags
& V4L2_MBUS_PCLK_SAMPLE_RISING
)
901 ret
= ov6650_reg_rmw(client
, REG_COMJ
, COMJ_PCLK_RISING
, 0);
903 ret
= ov6650_reg_rmw(client
, REG_COMJ
, 0, COMJ_PCLK_RISING
);
907 if (cfg
->flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)
908 ret
= ov6650_reg_rmw(client
, REG_COMF
, COMF_HREF_LOW
, 0);
910 ret
= ov6650_reg_rmw(client
, REG_COMF
, 0, COMF_HREF_LOW
);
914 if (cfg
->flags
& V4L2_MBUS_VSYNC_ACTIVE_HIGH
)
915 ret
= ov6650_reg_rmw(client
, REG_COMJ
, COMJ_VSYNC_HIGH
, 0);
917 ret
= ov6650_reg_rmw(client
, REG_COMJ
, 0, COMJ_VSYNC_HIGH
);
922 static const struct v4l2_subdev_video_ops ov6650_video_ops
= {
923 .s_stream
= ov6650_s_stream
,
924 .g_parm
= ov6650_g_parm
,
925 .s_parm
= ov6650_s_parm
,
926 .g_mbus_config
= ov6650_g_mbus_config
,
927 .s_mbus_config
= ov6650_s_mbus_config
,
930 static const struct v4l2_subdev_pad_ops ov6650_pad_ops
= {
931 .enum_mbus_code
= ov6650_enum_mbus_code
,
932 .get_selection
= ov6650_get_selection
,
933 .set_selection
= ov6650_set_selection
,
934 .get_fmt
= ov6650_get_fmt
,
935 .set_fmt
= ov6650_set_fmt
,
938 static const struct v4l2_subdev_ops ov6650_subdev_ops
= {
939 .core
= &ov6650_core_ops
,
940 .video
= &ov6650_video_ops
,
941 .pad
= &ov6650_pad_ops
,
945 * i2c_driver function
947 static int ov6650_probe(struct i2c_client
*client
,
948 const struct i2c_device_id
*did
)
953 priv
= devm_kzalloc(&client
->dev
, sizeof(*priv
), GFP_KERNEL
);
957 v4l2_i2c_subdev_init(&priv
->subdev
, client
, &ov6650_subdev_ops
);
958 v4l2_ctrl_handler_init(&priv
->hdl
, 13);
959 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
960 V4L2_CID_VFLIP
, 0, 1, 1, 0);
961 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
962 V4L2_CID_HFLIP
, 0, 1, 1, 0);
963 priv
->autogain
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
964 V4L2_CID_AUTOGAIN
, 0, 1, 1, 1);
965 priv
->gain
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
966 V4L2_CID_GAIN
, 0, 0x3f, 1, DEF_GAIN
);
967 priv
->autowb
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
968 V4L2_CID_AUTO_WHITE_BALANCE
, 0, 1, 1, 1);
969 priv
->blue
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
970 V4L2_CID_BLUE_BALANCE
, 0, 0xff, 1, DEF_BLUE
);
971 priv
->red
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
972 V4L2_CID_RED_BALANCE
, 0, 0xff, 1, DEF_RED
);
973 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
974 V4L2_CID_SATURATION
, 0, 0xf, 1, 0x8);
975 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
976 V4L2_CID_HUE
, 0, HUE_MASK
, 1, DEF_HUE
);
977 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
978 V4L2_CID_BRIGHTNESS
, 0, 0xff, 1, 0x80);
979 priv
->autoexposure
= v4l2_ctrl_new_std_menu(&priv
->hdl
,
980 &ov6550_ctrl_ops
, V4L2_CID_EXPOSURE_AUTO
,
981 V4L2_EXPOSURE_MANUAL
, 0, V4L2_EXPOSURE_AUTO
);
982 priv
->exposure
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
983 V4L2_CID_EXPOSURE
, 0, 0xff, 1, DEF_AECH
);
984 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
985 V4L2_CID_GAMMA
, 0, 0xff, 1, 0x12);
987 priv
->subdev
.ctrl_handler
= &priv
->hdl
;
989 return priv
->hdl
.error
;
991 v4l2_ctrl_auto_cluster(2, &priv
->autogain
, 0, true);
992 v4l2_ctrl_auto_cluster(3, &priv
->autowb
, 0, true);
993 v4l2_ctrl_auto_cluster(2, &priv
->autoexposure
,
994 V4L2_EXPOSURE_MANUAL
, true);
996 priv
->rect
.left
= DEF_HSTRT
<< 1;
997 priv
->rect
.top
= DEF_VSTRT
<< 1;
998 priv
->rect
.width
= W_CIF
;
999 priv
->rect
.height
= H_CIF
;
1000 priv
->half_scale
= false;
1001 priv
->code
= MEDIA_BUS_FMT_YUYV8_2X8
;
1002 priv
->colorspace
= V4L2_COLORSPACE_JPEG
;
1004 priv
->clk
= v4l2_clk_get(&client
->dev
, NULL
);
1005 if (IS_ERR(priv
->clk
)) {
1006 ret
= PTR_ERR(priv
->clk
);
1010 ret
= ov6650_video_probe(client
);
1012 v4l2_clk_put(priv
->clk
);
1014 v4l2_ctrl_handler_free(&priv
->hdl
);
1020 static int ov6650_remove(struct i2c_client
*client
)
1022 struct ov6650
*priv
= to_ov6650(client
);
1024 v4l2_clk_put(priv
->clk
);
1025 v4l2_device_unregister_subdev(&priv
->subdev
);
1026 v4l2_ctrl_handler_free(&priv
->hdl
);
1030 static const struct i2c_device_id ov6650_id
[] = {
1034 MODULE_DEVICE_TABLE(i2c
, ov6650_id
);
1036 static struct i2c_driver ov6650_i2c_driver
= {
1040 .probe
= ov6650_probe
,
1041 .remove
= ov6650_remove
,
1042 .id_table
= ov6650_id
,
1045 module_i2c_driver(ov6650_i2c_driver
);
1047 MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
1048 MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
1049 MODULE_LICENSE("GPL v2");