Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / mtd / nand / gpmi-nand / gpmi-nand.c
blob61fdd733492f678ea51f5ecc4414b62dd05b3171
1 /*
2 * Freescale GPMI NAND Flash Driver
4 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include <linux/clk.h>
22 #include <linux/slab.h>
23 #include <linux/sched/task_stack.h>
24 #include <linux/interrupt.h>
25 #include <linux/module.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/of.h>
28 #include <linux/of_device.h>
29 #include "gpmi-nand.h"
30 #include "bch-regs.h"
32 /* Resource names for the GPMI NAND driver. */
33 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
34 #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
35 #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
37 /* add our owner bbt descriptor */
38 static uint8_t scan_ff_pattern[] = { 0xff };
39 static struct nand_bbt_descr gpmi_bbt_descr = {
40 .options = 0,
41 .offs = 0,
42 .len = 1,
43 .pattern = scan_ff_pattern
47 * We may change the layout if we can get the ECC info from the datasheet,
48 * else we will use all the (page + OOB).
50 static int gpmi_ooblayout_ecc(struct mtd_info *mtd, int section,
51 struct mtd_oob_region *oobregion)
53 struct nand_chip *chip = mtd_to_nand(mtd);
54 struct gpmi_nand_data *this = nand_get_controller_data(chip);
55 struct bch_geometry *geo = &this->bch_geometry;
57 if (section)
58 return -ERANGE;
60 oobregion->offset = 0;
61 oobregion->length = geo->page_size - mtd->writesize;
63 return 0;
66 static int gpmi_ooblayout_free(struct mtd_info *mtd, int section,
67 struct mtd_oob_region *oobregion)
69 struct nand_chip *chip = mtd_to_nand(mtd);
70 struct gpmi_nand_data *this = nand_get_controller_data(chip);
71 struct bch_geometry *geo = &this->bch_geometry;
73 if (section)
74 return -ERANGE;
76 /* The available oob size we have. */
77 if (geo->page_size < mtd->writesize + mtd->oobsize) {
78 oobregion->offset = geo->page_size - mtd->writesize;
79 oobregion->length = mtd->oobsize - oobregion->offset;
82 return 0;
85 static const char * const gpmi_clks_for_mx2x[] = {
86 "gpmi_io",
89 static const struct mtd_ooblayout_ops gpmi_ooblayout_ops = {
90 .ecc = gpmi_ooblayout_ecc,
91 .free = gpmi_ooblayout_free,
94 static const struct gpmi_devdata gpmi_devdata_imx23 = {
95 .type = IS_MX23,
96 .bch_max_ecc_strength = 20,
97 .max_chain_delay = 16,
98 .clks = gpmi_clks_for_mx2x,
99 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx2x),
102 static const struct gpmi_devdata gpmi_devdata_imx28 = {
103 .type = IS_MX28,
104 .bch_max_ecc_strength = 20,
105 .max_chain_delay = 16,
106 .clks = gpmi_clks_for_mx2x,
107 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx2x),
110 static const char * const gpmi_clks_for_mx6[] = {
111 "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
114 static const struct gpmi_devdata gpmi_devdata_imx6q = {
115 .type = IS_MX6Q,
116 .bch_max_ecc_strength = 40,
117 .max_chain_delay = 12,
118 .clks = gpmi_clks_for_mx6,
119 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx6),
122 static const struct gpmi_devdata gpmi_devdata_imx6sx = {
123 .type = IS_MX6SX,
124 .bch_max_ecc_strength = 62,
125 .max_chain_delay = 12,
126 .clks = gpmi_clks_for_mx6,
127 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx6),
130 static const char * const gpmi_clks_for_mx7d[] = {
131 "gpmi_io", "gpmi_bch_apb",
134 static const struct gpmi_devdata gpmi_devdata_imx7d = {
135 .type = IS_MX7D,
136 .bch_max_ecc_strength = 62,
137 .max_chain_delay = 12,
138 .clks = gpmi_clks_for_mx7d,
139 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx7d),
142 static irqreturn_t bch_irq(int irq, void *cookie)
144 struct gpmi_nand_data *this = cookie;
146 gpmi_clear_bch(this);
147 complete(&this->bch_done);
148 return IRQ_HANDLED;
152 * Calculate the ECC strength by hand:
153 * E : The ECC strength.
154 * G : the length of Galois Field.
155 * N : The chunk count of per page.
156 * O : the oobsize of the NAND chip.
157 * M : the metasize of per page.
159 * The formula is :
160 * E * G * N
161 * ------------ <= (O - M)
164 * So, we get E by:
165 * (O - M) * 8
166 * E <= -------------
167 * G * N
169 static inline int get_ecc_strength(struct gpmi_nand_data *this)
171 struct bch_geometry *geo = &this->bch_geometry;
172 struct mtd_info *mtd = nand_to_mtd(&this->nand);
173 int ecc_strength;
175 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
176 / (geo->gf_len * geo->ecc_chunk_count);
178 /* We need the minor even number. */
179 return round_down(ecc_strength, 2);
182 static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
184 struct bch_geometry *geo = &this->bch_geometry;
186 /* Do the sanity check. */
187 if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
188 /* The mx23/mx28 only support the GF13. */
189 if (geo->gf_len == 14)
190 return false;
192 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength;
196 * If we can get the ECC information from the nand chip, we do not
197 * need to calculate them ourselves.
199 * We may have available oob space in this case.
201 static int set_geometry_by_ecc_info(struct gpmi_nand_data *this)
203 struct bch_geometry *geo = &this->bch_geometry;
204 struct nand_chip *chip = &this->nand;
205 struct mtd_info *mtd = nand_to_mtd(chip);
206 unsigned int block_mark_bit_offset;
208 if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
209 return -EINVAL;
211 switch (chip->ecc_step_ds) {
212 case SZ_512:
213 geo->gf_len = 13;
214 break;
215 case SZ_1K:
216 geo->gf_len = 14;
217 break;
218 default:
219 dev_err(this->dev,
220 "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
221 chip->ecc_strength_ds, chip->ecc_step_ds);
222 return -EINVAL;
224 geo->ecc_chunk_size = chip->ecc_step_ds;
225 geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
226 if (!gpmi_check_ecc(this))
227 return -EINVAL;
229 /* Keep the C >= O */
230 if (geo->ecc_chunk_size < mtd->oobsize) {
231 dev_err(this->dev,
232 "unsupported nand chip. ecc size: %d, oob size : %d\n",
233 chip->ecc_step_ds, mtd->oobsize);
234 return -EINVAL;
237 /* The default value, see comment in the legacy_set_geometry(). */
238 geo->metadata_size = 10;
240 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
243 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below:
245 * | P |
246 * |<----------------------------------------------------->|
247 * | |
248 * | (Block Mark) |
249 * | P' | | | |
250 * |<-------------------------------------------->| D | | O' |
251 * | |<---->| |<--->|
252 * V V V V V
253 * +---+----------+-+----------+-+----------+-+----------+-+-----+
254 * | M | data |E| data |E| data |E| data |E| |
255 * +---+----------+-+----------+-+----------+-+----------+-+-----+
256 * ^ ^
257 * | O |
258 * |<------------>|
259 * | |
261 * P : the page size for BCH module.
262 * E : The ECC strength.
263 * G : the length of Galois Field.
264 * N : The chunk count of per page.
265 * M : the metasize of per page.
266 * C : the ecc chunk size, aka the "data" above.
267 * P': the nand chip's page size.
268 * O : the nand chip's oob size.
269 * O': the free oob.
271 * The formula for P is :
273 * E * G * N
274 * P = ------------ + P' + M
277 * The position of block mark moves forward in the ECC-based view
278 * of page, and the delta is:
280 * E * G * (N - 1)
281 * D = (---------------- + M)
284 * Please see the comment in legacy_set_geometry().
285 * With the condition C >= O , we still can get same result.
286 * So the bit position of the physical block mark within the ECC-based
287 * view of the page is :
288 * (P' - D) * 8
290 geo->page_size = mtd->writesize + geo->metadata_size +
291 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
293 geo->payload_size = mtd->writesize;
295 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
296 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
297 + ALIGN(geo->ecc_chunk_count, 4);
299 if (!this->swap_block_mark)
300 return 0;
302 /* For bit swap. */
303 block_mark_bit_offset = mtd->writesize * 8 -
304 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
305 + geo->metadata_size * 8);
307 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
308 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
309 return 0;
312 static int legacy_set_geometry(struct gpmi_nand_data *this)
314 struct bch_geometry *geo = &this->bch_geometry;
315 struct mtd_info *mtd = nand_to_mtd(&this->nand);
316 unsigned int metadata_size;
317 unsigned int status_size;
318 unsigned int block_mark_bit_offset;
321 * The size of the metadata can be changed, though we set it to 10
322 * bytes now. But it can't be too large, because we have to save
323 * enough space for BCH.
325 geo->metadata_size = 10;
327 /* The default for the length of Galois Field. */
328 geo->gf_len = 13;
330 /* The default for chunk size. */
331 geo->ecc_chunk_size = 512;
332 while (geo->ecc_chunk_size < mtd->oobsize) {
333 geo->ecc_chunk_size *= 2; /* keep C >= O */
334 geo->gf_len = 14;
337 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
339 /* We use the same ECC strength for all chunks. */
340 geo->ecc_strength = get_ecc_strength(this);
341 if (!gpmi_check_ecc(this)) {
342 dev_err(this->dev,
343 "ecc strength: %d cannot be supported by the controller (%d)\n"
344 "try to use minimum ecc strength that NAND chip required\n",
345 geo->ecc_strength,
346 this->devdata->bch_max_ecc_strength);
347 return -EINVAL;
350 geo->page_size = mtd->writesize + geo->metadata_size +
351 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
352 geo->payload_size = mtd->writesize;
355 * The auxiliary buffer contains the metadata and the ECC status. The
356 * metadata is padded to the nearest 32-bit boundary. The ECC status
357 * contains one byte for every ECC chunk, and is also padded to the
358 * nearest 32-bit boundary.
360 metadata_size = ALIGN(geo->metadata_size, 4);
361 status_size = ALIGN(geo->ecc_chunk_count, 4);
363 geo->auxiliary_size = metadata_size + status_size;
364 geo->auxiliary_status_offset = metadata_size;
366 if (!this->swap_block_mark)
367 return 0;
370 * We need to compute the byte and bit offsets of
371 * the physical block mark within the ECC-based view of the page.
373 * NAND chip with 2K page shows below:
374 * (Block Mark)
375 * | |
376 * | D |
377 * |<---->|
378 * V V
379 * +---+----------+-+----------+-+----------+-+----------+-+
380 * | M | data |E| data |E| data |E| data |E|
381 * +---+----------+-+----------+-+----------+-+----------+-+
383 * The position of block mark moves forward in the ECC-based view
384 * of page, and the delta is:
386 * E * G * (N - 1)
387 * D = (---------------- + M)
390 * With the formula to compute the ECC strength, and the condition
391 * : C >= O (C is the ecc chunk size)
393 * It's easy to deduce to the following result:
395 * E * G (O - M) C - M C - M
396 * ----------- <= ------- <= -------- < ---------
397 * 8 N N (N - 1)
399 * So, we get:
401 * E * G * (N - 1)
402 * D = (---------------- + M) < C
405 * The above inequality means the position of block mark
406 * within the ECC-based view of the page is still in the data chunk,
407 * and it's NOT in the ECC bits of the chunk.
409 * Use the following to compute the bit position of the
410 * physical block mark within the ECC-based view of the page:
411 * (page_size - D) * 8
413 * --Huang Shijie
415 block_mark_bit_offset = mtd->writesize * 8 -
416 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
417 + geo->metadata_size * 8);
419 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
420 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
421 return 0;
424 int common_nfc_set_geometry(struct gpmi_nand_data *this)
426 if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc"))
427 || legacy_set_geometry(this))
428 return set_geometry_by_ecc_info(this);
430 return 0;
433 struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
435 /* We use the DMA channel 0 to access all the nand chips. */
436 return this->dma_chans[0];
439 /* Can we use the upper's buffer directly for DMA? */
440 void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
442 struct scatterlist *sgl = &this->data_sgl;
443 int ret;
445 /* first try to map the upper buffer directly */
446 if (virt_addr_valid(this->upper_buf) &&
447 !object_is_on_stack(this->upper_buf)) {
448 sg_init_one(sgl, this->upper_buf, this->upper_len);
449 ret = dma_map_sg(this->dev, sgl, 1, dr);
450 if (ret == 0)
451 goto map_fail;
453 this->direct_dma_map_ok = true;
454 return;
457 map_fail:
458 /* We have to use our own DMA buffer. */
459 sg_init_one(sgl, this->data_buffer_dma, this->upper_len);
461 if (dr == DMA_TO_DEVICE)
462 memcpy(this->data_buffer_dma, this->upper_buf, this->upper_len);
464 dma_map_sg(this->dev, sgl, 1, dr);
466 this->direct_dma_map_ok = false;
469 /* This will be called after the DMA operation is finished. */
470 static void dma_irq_callback(void *param)
472 struct gpmi_nand_data *this = param;
473 struct completion *dma_c = &this->dma_done;
475 switch (this->dma_type) {
476 case DMA_FOR_COMMAND:
477 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
478 break;
480 case DMA_FOR_READ_DATA:
481 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
482 if (this->direct_dma_map_ok == false)
483 memcpy(this->upper_buf, this->data_buffer_dma,
484 this->upper_len);
485 break;
487 case DMA_FOR_WRITE_DATA:
488 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
489 break;
491 case DMA_FOR_READ_ECC_PAGE:
492 case DMA_FOR_WRITE_ECC_PAGE:
493 /* We have to wait the BCH interrupt to finish. */
494 break;
496 default:
497 dev_err(this->dev, "in wrong DMA operation.\n");
500 complete(dma_c);
503 int start_dma_without_bch_irq(struct gpmi_nand_data *this,
504 struct dma_async_tx_descriptor *desc)
506 struct completion *dma_c = &this->dma_done;
507 unsigned long timeout;
509 init_completion(dma_c);
511 desc->callback = dma_irq_callback;
512 desc->callback_param = this;
513 dmaengine_submit(desc);
514 dma_async_issue_pending(get_dma_chan(this));
516 /* Wait for the interrupt from the DMA block. */
517 timeout = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
518 if (!timeout) {
519 dev_err(this->dev, "DMA timeout, last DMA :%d\n",
520 this->last_dma_type);
521 gpmi_dump_info(this);
522 return -ETIMEDOUT;
524 return 0;
528 * This function is used in BCH reading or BCH writing pages.
529 * It will wait for the BCH interrupt as long as ONE second.
530 * Actually, we must wait for two interrupts :
531 * [1] firstly the DMA interrupt and
532 * [2] secondly the BCH interrupt.
534 int start_dma_with_bch_irq(struct gpmi_nand_data *this,
535 struct dma_async_tx_descriptor *desc)
537 struct completion *bch_c = &this->bch_done;
538 unsigned long timeout;
540 /* Prepare to receive an interrupt from the BCH block. */
541 init_completion(bch_c);
543 /* start the DMA */
544 start_dma_without_bch_irq(this, desc);
546 /* Wait for the interrupt from the BCH block. */
547 timeout = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
548 if (!timeout) {
549 dev_err(this->dev, "BCH timeout, last DMA :%d\n",
550 this->last_dma_type);
551 gpmi_dump_info(this);
552 return -ETIMEDOUT;
554 return 0;
557 static int acquire_register_block(struct gpmi_nand_data *this,
558 const char *res_name)
560 struct platform_device *pdev = this->pdev;
561 struct resources *res = &this->resources;
562 struct resource *r;
563 void __iomem *p;
565 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
566 p = devm_ioremap_resource(&pdev->dev, r);
567 if (IS_ERR(p))
568 return PTR_ERR(p);
570 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
571 res->gpmi_regs = p;
572 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
573 res->bch_regs = p;
574 else
575 dev_err(this->dev, "unknown resource name : %s\n", res_name);
577 return 0;
580 static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
582 struct platform_device *pdev = this->pdev;
583 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
584 struct resource *r;
585 int err;
587 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
588 if (!r) {
589 dev_err(this->dev, "Can't get resource for %s\n", res_name);
590 return -ENODEV;
593 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this);
594 if (err)
595 dev_err(this->dev, "error requesting BCH IRQ\n");
597 return err;
600 static void release_dma_channels(struct gpmi_nand_data *this)
602 unsigned int i;
603 for (i = 0; i < DMA_CHANS; i++)
604 if (this->dma_chans[i]) {
605 dma_release_channel(this->dma_chans[i]);
606 this->dma_chans[i] = NULL;
610 static int acquire_dma_channels(struct gpmi_nand_data *this)
612 struct platform_device *pdev = this->pdev;
613 struct dma_chan *dma_chan;
615 /* request dma channel */
616 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
617 if (!dma_chan) {
618 dev_err(this->dev, "Failed to request DMA channel.\n");
619 goto acquire_err;
622 this->dma_chans[0] = dma_chan;
623 return 0;
625 acquire_err:
626 release_dma_channels(this);
627 return -EINVAL;
630 static int gpmi_get_clks(struct gpmi_nand_data *this)
632 struct resources *r = &this->resources;
633 struct clk *clk;
634 int err, i;
636 for (i = 0; i < this->devdata->clks_count; i++) {
637 clk = devm_clk_get(this->dev, this->devdata->clks[i]);
638 if (IS_ERR(clk)) {
639 err = PTR_ERR(clk);
640 goto err_clock;
643 r->clock[i] = clk;
646 if (GPMI_IS_MX6(this))
648 * Set the default value for the gpmi clock.
650 * If you want to use the ONFI nand which is in the
651 * Synchronous Mode, you should change the clock as you need.
653 clk_set_rate(r->clock[0], 22000000);
655 return 0;
657 err_clock:
658 dev_dbg(this->dev, "failed in finding the clocks.\n");
659 return err;
662 static int acquire_resources(struct gpmi_nand_data *this)
664 int ret;
666 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
667 if (ret)
668 goto exit_regs;
670 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
671 if (ret)
672 goto exit_regs;
674 ret = acquire_bch_irq(this, bch_irq);
675 if (ret)
676 goto exit_regs;
678 ret = acquire_dma_channels(this);
679 if (ret)
680 goto exit_regs;
682 ret = gpmi_get_clks(this);
683 if (ret)
684 goto exit_clock;
685 return 0;
687 exit_clock:
688 release_dma_channels(this);
689 exit_regs:
690 return ret;
693 static void release_resources(struct gpmi_nand_data *this)
695 release_dma_channels(this);
698 static int init_hardware(struct gpmi_nand_data *this)
700 int ret;
703 * This structure contains the "safe" GPMI timing that should succeed
704 * with any NAND Flash device
705 * (although, with less-than-optimal performance).
707 struct nand_timing safe_timing = {
708 .data_setup_in_ns = 80,
709 .data_hold_in_ns = 60,
710 .address_setup_in_ns = 25,
711 .gpmi_sample_delay_in_ns = 6,
712 .tREA_in_ns = -1,
713 .tRLOH_in_ns = -1,
714 .tRHOH_in_ns = -1,
717 /* Initialize the hardwares. */
718 ret = gpmi_init(this);
719 if (ret)
720 return ret;
722 this->timing = safe_timing;
723 return 0;
726 static int read_page_prepare(struct gpmi_nand_data *this,
727 void *destination, unsigned length,
728 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
729 void **use_virt, dma_addr_t *use_phys)
731 struct device *dev = this->dev;
733 if (virt_addr_valid(destination)) {
734 dma_addr_t dest_phys;
736 dest_phys = dma_map_single(dev, destination,
737 length, DMA_FROM_DEVICE);
738 if (dma_mapping_error(dev, dest_phys)) {
739 if (alt_size < length) {
740 dev_err(dev, "Alternate buffer is too small\n");
741 return -ENOMEM;
743 goto map_failed;
745 *use_virt = destination;
746 *use_phys = dest_phys;
747 this->direct_dma_map_ok = true;
748 return 0;
751 map_failed:
752 *use_virt = alt_virt;
753 *use_phys = alt_phys;
754 this->direct_dma_map_ok = false;
755 return 0;
758 static inline void read_page_end(struct gpmi_nand_data *this,
759 void *destination, unsigned length,
760 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
761 void *used_virt, dma_addr_t used_phys)
763 if (this->direct_dma_map_ok)
764 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
767 static inline void read_page_swap_end(struct gpmi_nand_data *this,
768 void *destination, unsigned length,
769 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
770 void *used_virt, dma_addr_t used_phys)
772 if (!this->direct_dma_map_ok)
773 memcpy(destination, alt_virt, length);
776 static int send_page_prepare(struct gpmi_nand_data *this,
777 const void *source, unsigned length,
778 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
779 const void **use_virt, dma_addr_t *use_phys)
781 struct device *dev = this->dev;
783 if (virt_addr_valid(source)) {
784 dma_addr_t source_phys;
786 source_phys = dma_map_single(dev, (void *)source, length,
787 DMA_TO_DEVICE);
788 if (dma_mapping_error(dev, source_phys)) {
789 if (alt_size < length) {
790 dev_err(dev, "Alternate buffer is too small\n");
791 return -ENOMEM;
793 goto map_failed;
795 *use_virt = source;
796 *use_phys = source_phys;
797 return 0;
799 map_failed:
801 * Copy the content of the source buffer into the alternate
802 * buffer and set up the return values accordingly.
804 memcpy(alt_virt, source, length);
806 *use_virt = alt_virt;
807 *use_phys = alt_phys;
808 return 0;
811 static void send_page_end(struct gpmi_nand_data *this,
812 const void *source, unsigned length,
813 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
814 const void *used_virt, dma_addr_t used_phys)
816 struct device *dev = this->dev;
817 if (used_virt == source)
818 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
821 static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
823 struct device *dev = this->dev;
825 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
826 dma_free_coherent(dev, this->page_buffer_size,
827 this->page_buffer_virt,
828 this->page_buffer_phys);
829 kfree(this->cmd_buffer);
830 kfree(this->data_buffer_dma);
831 kfree(this->raw_buffer);
833 this->cmd_buffer = NULL;
834 this->data_buffer_dma = NULL;
835 this->raw_buffer = NULL;
836 this->page_buffer_virt = NULL;
837 this->page_buffer_size = 0;
840 /* Allocate the DMA buffers */
841 static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
843 struct bch_geometry *geo = &this->bch_geometry;
844 struct device *dev = this->dev;
845 struct mtd_info *mtd = nand_to_mtd(&this->nand);
847 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
848 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
849 if (this->cmd_buffer == NULL)
850 goto error_alloc;
853 * [2] Allocate a read/write data buffer.
854 * The gpmi_alloc_dma_buffer can be called twice.
855 * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
856 * is called before the nand_scan_ident; and we allocate a buffer
857 * of the real NAND page size when the gpmi_alloc_dma_buffer is
858 * called after the nand_scan_ident.
860 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
861 GFP_DMA | GFP_KERNEL);
862 if (this->data_buffer_dma == NULL)
863 goto error_alloc;
866 * [3] Allocate the page buffer.
868 * Both the payload buffer and the auxiliary buffer must appear on
869 * 32-bit boundaries. We presume the size of the payload buffer is a
870 * power of two and is much larger than four, which guarantees the
871 * auxiliary buffer will appear on a 32-bit boundary.
873 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
874 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
875 &this->page_buffer_phys, GFP_DMA);
876 if (!this->page_buffer_virt)
877 goto error_alloc;
879 this->raw_buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
880 if (!this->raw_buffer)
881 goto error_alloc;
883 /* Slice up the page buffer. */
884 this->payload_virt = this->page_buffer_virt;
885 this->payload_phys = this->page_buffer_phys;
886 this->auxiliary_virt = this->payload_virt + geo->payload_size;
887 this->auxiliary_phys = this->payload_phys + geo->payload_size;
888 return 0;
890 error_alloc:
891 gpmi_free_dma_buffer(this);
892 return -ENOMEM;
895 static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
897 struct nand_chip *chip = mtd_to_nand(mtd);
898 struct gpmi_nand_data *this = nand_get_controller_data(chip);
899 int ret;
902 * Every operation begins with a command byte and a series of zero or
903 * more address bytes. These are distinguished by either the Address
904 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
905 * asserted. When MTD is ready to execute the command, it will deassert
906 * both latch enables.
908 * Rather than run a separate DMA operation for every single byte, we
909 * queue them up and run a single DMA operation for the entire series
910 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
912 if ((ctrl & (NAND_ALE | NAND_CLE))) {
913 if (data != NAND_CMD_NONE)
914 this->cmd_buffer[this->command_length++] = data;
915 return;
918 if (!this->command_length)
919 return;
921 ret = gpmi_send_command(this);
922 if (ret)
923 dev_err(this->dev, "Chip: %u, Error %d\n",
924 this->current_chip, ret);
926 this->command_length = 0;
929 static int gpmi_dev_ready(struct mtd_info *mtd)
931 struct nand_chip *chip = mtd_to_nand(mtd);
932 struct gpmi_nand_data *this = nand_get_controller_data(chip);
934 return gpmi_is_ready(this, this->current_chip);
937 static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
939 struct nand_chip *chip = mtd_to_nand(mtd);
940 struct gpmi_nand_data *this = nand_get_controller_data(chip);
942 if ((this->current_chip < 0) && (chipnr >= 0))
943 gpmi_begin(this);
944 else if ((this->current_chip >= 0) && (chipnr < 0))
945 gpmi_end(this);
947 this->current_chip = chipnr;
950 static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
952 struct nand_chip *chip = mtd_to_nand(mtd);
953 struct gpmi_nand_data *this = nand_get_controller_data(chip);
955 dev_dbg(this->dev, "len is %d\n", len);
956 this->upper_buf = buf;
957 this->upper_len = len;
959 gpmi_read_data(this);
962 static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
964 struct nand_chip *chip = mtd_to_nand(mtd);
965 struct gpmi_nand_data *this = nand_get_controller_data(chip);
967 dev_dbg(this->dev, "len is %d\n", len);
968 this->upper_buf = (uint8_t *)buf;
969 this->upper_len = len;
971 gpmi_send_data(this);
974 static uint8_t gpmi_read_byte(struct mtd_info *mtd)
976 struct nand_chip *chip = mtd_to_nand(mtd);
977 struct gpmi_nand_data *this = nand_get_controller_data(chip);
978 uint8_t *buf = this->data_buffer_dma;
980 gpmi_read_buf(mtd, buf, 1);
981 return buf[0];
985 * Handles block mark swapping.
986 * It can be called in swapping the block mark, or swapping it back,
987 * because the the operations are the same.
989 static void block_mark_swapping(struct gpmi_nand_data *this,
990 void *payload, void *auxiliary)
992 struct bch_geometry *nfc_geo = &this->bch_geometry;
993 unsigned char *p;
994 unsigned char *a;
995 unsigned int bit;
996 unsigned char mask;
997 unsigned char from_data;
998 unsigned char from_oob;
1000 if (!this->swap_block_mark)
1001 return;
1004 * If control arrives here, we're swapping. Make some convenience
1005 * variables.
1007 bit = nfc_geo->block_mark_bit_offset;
1008 p = payload + nfc_geo->block_mark_byte_offset;
1009 a = auxiliary;
1012 * Get the byte from the data area that overlays the block mark. Since
1013 * the ECC engine applies its own view to the bits in the page, the
1014 * physical block mark won't (in general) appear on a byte boundary in
1015 * the data.
1017 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
1019 /* Get the byte from the OOB. */
1020 from_oob = a[0];
1022 /* Swap them. */
1023 a[0] = from_data;
1025 mask = (0x1 << bit) - 1;
1026 p[0] = (p[0] & mask) | (from_oob << bit);
1028 mask = ~0 << bit;
1029 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
1032 static int gpmi_ecc_read_page_data(struct nand_chip *chip,
1033 uint8_t *buf, int oob_required,
1034 int page)
1036 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1037 struct bch_geometry *nfc_geo = &this->bch_geometry;
1038 struct mtd_info *mtd = nand_to_mtd(chip);
1039 void *payload_virt;
1040 dma_addr_t payload_phys;
1041 void *auxiliary_virt;
1042 dma_addr_t auxiliary_phys;
1043 unsigned int i;
1044 unsigned char *status;
1045 unsigned int max_bitflips = 0;
1046 int ret;
1048 dev_dbg(this->dev, "page number is : %d\n", page);
1049 ret = read_page_prepare(this, buf, nfc_geo->payload_size,
1050 this->payload_virt, this->payload_phys,
1051 nfc_geo->payload_size,
1052 &payload_virt, &payload_phys);
1053 if (ret) {
1054 dev_err(this->dev, "Inadequate DMA buffer\n");
1055 ret = -ENOMEM;
1056 return ret;
1058 auxiliary_virt = this->auxiliary_virt;
1059 auxiliary_phys = this->auxiliary_phys;
1061 /* go! */
1062 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
1063 read_page_end(this, buf, nfc_geo->payload_size,
1064 this->payload_virt, this->payload_phys,
1065 nfc_geo->payload_size,
1066 payload_virt, payload_phys);
1067 if (ret) {
1068 dev_err(this->dev, "Error in ECC-based read: %d\n", ret);
1069 return ret;
1072 /* Loop over status bytes, accumulating ECC status. */
1073 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
1075 read_page_swap_end(this, buf, nfc_geo->payload_size,
1076 this->payload_virt, this->payload_phys,
1077 nfc_geo->payload_size,
1078 payload_virt, payload_phys);
1080 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
1081 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
1082 continue;
1084 if (*status == STATUS_UNCORRECTABLE) {
1085 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1086 u8 *eccbuf = this->raw_buffer;
1087 int offset, bitoffset;
1088 int eccbytes;
1089 int flips;
1091 /* Read ECC bytes into our internal raw_buffer */
1092 offset = nfc_geo->metadata_size * 8;
1093 offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1);
1094 offset -= eccbits;
1095 bitoffset = offset % 8;
1096 eccbytes = DIV_ROUND_UP(offset + eccbits, 8);
1097 offset /= 8;
1098 eccbytes -= offset;
1099 nand_change_read_column_op(chip, offset, eccbuf,
1100 eccbytes, false);
1103 * ECC data are not byte aligned and we may have
1104 * in-band data in the first and last byte of
1105 * eccbuf. Set non-eccbits to one so that
1106 * nand_check_erased_ecc_chunk() does not count them
1107 * as bitflips.
1109 if (bitoffset)
1110 eccbuf[0] |= GENMASK(bitoffset - 1, 0);
1112 bitoffset = (bitoffset + eccbits) % 8;
1113 if (bitoffset)
1114 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset);
1117 * The ECC hardware has an uncorrectable ECC status
1118 * code in case we have bitflips in an erased page. As
1119 * nothing was written into this subpage the ECC is
1120 * obviously wrong and we can not trust it. We assume
1121 * at this point that we are reading an erased page and
1122 * try to correct the bitflips in buffer up to
1123 * ecc_strength bitflips. If this is a page with random
1124 * data, we exceed this number of bitflips and have a
1125 * ECC failure. Otherwise we use the corrected buffer.
1127 if (i == 0) {
1128 /* The first block includes metadata */
1129 flips = nand_check_erased_ecc_chunk(
1130 buf + i * nfc_geo->ecc_chunk_size,
1131 nfc_geo->ecc_chunk_size,
1132 eccbuf, eccbytes,
1133 auxiliary_virt,
1134 nfc_geo->metadata_size,
1135 nfc_geo->ecc_strength);
1136 } else {
1137 flips = nand_check_erased_ecc_chunk(
1138 buf + i * nfc_geo->ecc_chunk_size,
1139 nfc_geo->ecc_chunk_size,
1140 eccbuf, eccbytes,
1141 NULL, 0,
1142 nfc_geo->ecc_strength);
1145 if (flips > 0) {
1146 max_bitflips = max_t(unsigned int, max_bitflips,
1147 flips);
1148 mtd->ecc_stats.corrected += flips;
1149 continue;
1152 mtd->ecc_stats.failed++;
1153 continue;
1156 mtd->ecc_stats.corrected += *status;
1157 max_bitflips = max_t(unsigned int, max_bitflips, *status);
1160 /* handle the block mark swapping */
1161 block_mark_swapping(this, buf, auxiliary_virt);
1163 if (oob_required) {
1165 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
1166 * for details about our policy for delivering the OOB.
1168 * We fill the caller's buffer with set bits, and then copy the
1169 * block mark to th caller's buffer. Note that, if block mark
1170 * swapping was necessary, it has already been done, so we can
1171 * rely on the first byte of the auxiliary buffer to contain
1172 * the block mark.
1174 memset(chip->oob_poi, ~0, mtd->oobsize);
1175 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
1178 return max_bitflips;
1181 static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1182 uint8_t *buf, int oob_required, int page)
1184 nand_read_page_op(chip, page, 0, NULL, 0);
1186 return gpmi_ecc_read_page_data(chip, buf, oob_required, page);
1189 /* Fake a virtual small page for the subpage read */
1190 static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1191 uint32_t offs, uint32_t len, uint8_t *buf, int page)
1193 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1194 void __iomem *bch_regs = this->resources.bch_regs;
1195 struct bch_geometry old_geo = this->bch_geometry;
1196 struct bch_geometry *geo = &this->bch_geometry;
1197 int size = chip->ecc.size; /* ECC chunk size */
1198 int meta, n, page_size;
1199 u32 r1_old, r2_old, r1_new, r2_new;
1200 unsigned int max_bitflips;
1201 int first, last, marker_pos;
1202 int ecc_parity_size;
1203 int col = 0;
1204 int old_swap_block_mark = this->swap_block_mark;
1206 /* The size of ECC parity */
1207 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
1209 /* Align it with the chunk size */
1210 first = offs / size;
1211 last = (offs + len - 1) / size;
1213 if (this->swap_block_mark) {
1215 * Find the chunk which contains the Block Marker.
1216 * If this chunk is in the range of [first, last],
1217 * we have to read out the whole page.
1218 * Why? since we had swapped the data at the position of Block
1219 * Marker to the metadata which is bound with the chunk 0.
1221 marker_pos = geo->block_mark_byte_offset / size;
1222 if (last >= marker_pos && first <= marker_pos) {
1223 dev_dbg(this->dev,
1224 "page:%d, first:%d, last:%d, marker at:%d\n",
1225 page, first, last, marker_pos);
1226 return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
1230 meta = geo->metadata_size;
1231 if (first) {
1232 col = meta + (size + ecc_parity_size) * first;
1233 meta = 0;
1234 buf = buf + first * size;
1237 nand_read_page_op(chip, page, col, NULL, 0);
1239 /* Save the old environment */
1240 r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
1241 r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
1243 /* change the BCH registers and bch_geometry{} */
1244 n = last - first + 1;
1245 page_size = meta + (size + ecc_parity_size) * n;
1247 r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
1248 BM_BCH_FLASH0LAYOUT0_META_SIZE);
1249 r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
1250 | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
1251 writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
1253 r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
1254 r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
1255 writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
1257 geo->ecc_chunk_count = n;
1258 geo->payload_size = n * size;
1259 geo->page_size = page_size;
1260 geo->auxiliary_status_offset = ALIGN(meta, 4);
1262 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
1263 page, offs, len, col, first, n, page_size);
1265 /* Read the subpage now */
1266 this->swap_block_mark = false;
1267 max_bitflips = gpmi_ecc_read_page_data(chip, buf, 0, page);
1269 /* Restore */
1270 writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
1271 writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
1272 this->bch_geometry = old_geo;
1273 this->swap_block_mark = old_swap_block_mark;
1275 return max_bitflips;
1278 static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1279 const uint8_t *buf, int oob_required, int page)
1281 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1282 struct bch_geometry *nfc_geo = &this->bch_geometry;
1283 const void *payload_virt;
1284 dma_addr_t payload_phys;
1285 const void *auxiliary_virt;
1286 dma_addr_t auxiliary_phys;
1287 int ret;
1289 dev_dbg(this->dev, "ecc write page.\n");
1291 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
1293 if (this->swap_block_mark) {
1295 * If control arrives here, we're doing block mark swapping.
1296 * Since we can't modify the caller's buffers, we must copy them
1297 * into our own.
1299 memcpy(this->payload_virt, buf, mtd->writesize);
1300 payload_virt = this->payload_virt;
1301 payload_phys = this->payload_phys;
1303 memcpy(this->auxiliary_virt, chip->oob_poi,
1304 nfc_geo->auxiliary_size);
1305 auxiliary_virt = this->auxiliary_virt;
1306 auxiliary_phys = this->auxiliary_phys;
1308 /* Handle block mark swapping. */
1309 block_mark_swapping(this,
1310 (void *)payload_virt, (void *)auxiliary_virt);
1311 } else {
1313 * If control arrives here, we're not doing block mark swapping,
1314 * so we can to try and use the caller's buffers.
1316 ret = send_page_prepare(this,
1317 buf, mtd->writesize,
1318 this->payload_virt, this->payload_phys,
1319 nfc_geo->payload_size,
1320 &payload_virt, &payload_phys);
1321 if (ret) {
1322 dev_err(this->dev, "Inadequate payload DMA buffer\n");
1323 return 0;
1326 ret = send_page_prepare(this,
1327 chip->oob_poi, mtd->oobsize,
1328 this->auxiliary_virt, this->auxiliary_phys,
1329 nfc_geo->auxiliary_size,
1330 &auxiliary_virt, &auxiliary_phys);
1331 if (ret) {
1332 dev_err(this->dev, "Inadequate auxiliary DMA buffer\n");
1333 goto exit_auxiliary;
1337 /* Ask the NFC. */
1338 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
1339 if (ret)
1340 dev_err(this->dev, "Error in ECC-based write: %d\n", ret);
1342 if (!this->swap_block_mark) {
1343 send_page_end(this, chip->oob_poi, mtd->oobsize,
1344 this->auxiliary_virt, this->auxiliary_phys,
1345 nfc_geo->auxiliary_size,
1346 auxiliary_virt, auxiliary_phys);
1347 exit_auxiliary:
1348 send_page_end(this, buf, mtd->writesize,
1349 this->payload_virt, this->payload_phys,
1350 nfc_geo->payload_size,
1351 payload_virt, payload_phys);
1354 if (ret)
1355 return ret;
1357 return nand_prog_page_end_op(chip);
1361 * There are several places in this driver where we have to handle the OOB and
1362 * block marks. This is the function where things are the most complicated, so
1363 * this is where we try to explain it all. All the other places refer back to
1364 * here.
1366 * These are the rules, in order of decreasing importance:
1368 * 1) Nothing the caller does can be allowed to imperil the block mark.
1370 * 2) In read operations, the first byte of the OOB we return must reflect the
1371 * true state of the block mark, no matter where that block mark appears in
1372 * the physical page.
1374 * 3) ECC-based read operations return an OOB full of set bits (since we never
1375 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1376 * return).
1378 * 4) "Raw" read operations return a direct view of the physical bytes in the
1379 * page, using the conventional definition of which bytes are data and which
1380 * are OOB. This gives the caller a way to see the actual, physical bytes
1381 * in the page, without the distortions applied by our ECC engine.
1384 * What we do for this specific read operation depends on two questions:
1386 * 1) Are we doing a "raw" read, or an ECC-based read?
1388 * 2) Are we using block mark swapping or transcription?
1390 * There are four cases, illustrated by the following Karnaugh map:
1392 * | Raw | ECC-based |
1393 * -------------+-------------------------+-------------------------+
1394 * | Read the conventional | |
1395 * | OOB at the end of the | |
1396 * Swapping | page and return it. It | |
1397 * | contains exactly what | |
1398 * | we want. | Read the block mark and |
1399 * -------------+-------------------------+ return it in a buffer |
1400 * | Read the conventional | full of set bits. |
1401 * | OOB at the end of the | |
1402 * | page and also the block | |
1403 * Transcribing | mark in the metadata. | |
1404 * | Copy the block mark | |
1405 * | into the first byte of | |
1406 * | the OOB. | |
1407 * -------------+-------------------------+-------------------------+
1409 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1410 * giving an accurate view of the actual, physical bytes in the page (we're
1411 * overwriting the block mark). That's OK because it's more important to follow
1412 * rule #2.
1414 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1415 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1416 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1417 * ECC-based or raw view of the page is implicit in which function it calls
1418 * (there is a similar pair of ECC-based/raw functions for writing).
1420 static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1421 int page)
1423 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1425 dev_dbg(this->dev, "page number is %d\n", page);
1426 /* clear the OOB buffer */
1427 memset(chip->oob_poi, ~0, mtd->oobsize);
1429 /* Read out the conventional OOB. */
1430 nand_read_page_op(chip, page, mtd->writesize, NULL, 0);
1431 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1434 * Now, we want to make sure the block mark is correct. In the
1435 * non-transcribing case (!GPMI_IS_MX23()), we already have it.
1436 * Otherwise, we need to explicitly read it.
1438 if (GPMI_IS_MX23(this)) {
1439 /* Read the block mark into the first byte of the OOB buffer. */
1440 nand_read_page_op(chip, page, 0, NULL, 0);
1441 chip->oob_poi[0] = chip->read_byte(mtd);
1444 return 0;
1447 static int
1448 gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1450 struct mtd_oob_region of = { };
1452 /* Do we have available oob area? */
1453 mtd_ooblayout_free(mtd, 0, &of);
1454 if (!of.length)
1455 return -EPERM;
1457 if (!nand_is_slc(chip))
1458 return -EPERM;
1460 return nand_prog_page_op(chip, page, mtd->writesize + of.offset,
1461 chip->oob_poi + of.offset, of.length);
1465 * This function reads a NAND page without involving the ECC engine (no HW
1466 * ECC correction).
1467 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1468 * inline (interleaved with payload DATA), and do not align data chunk on
1469 * byte boundaries.
1470 * We thus need to take care moving the payload data and ECC bits stored in the
1471 * page into the provided buffers, which is why we're using gpmi_copy_bits.
1473 * See set_geometry_by_ecc_info inline comments to have a full description
1474 * of the layout used by the GPMI controller.
1476 static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
1477 struct nand_chip *chip, uint8_t *buf,
1478 int oob_required, int page)
1480 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1481 struct bch_geometry *nfc_geo = &this->bch_geometry;
1482 int eccsize = nfc_geo->ecc_chunk_size;
1483 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1484 u8 *tmp_buf = this->raw_buffer;
1485 size_t src_bit_off;
1486 size_t oob_bit_off;
1487 size_t oob_byte_off;
1488 uint8_t *oob = chip->oob_poi;
1489 int step;
1491 nand_read_page_op(chip, page, 0, tmp_buf,
1492 mtd->writesize + mtd->oobsize);
1495 * If required, swap the bad block marker and the data stored in the
1496 * metadata section, so that we don't wrongly consider a block as bad.
1498 * See the layout description for a detailed explanation on why this
1499 * is needed.
1501 if (this->swap_block_mark)
1502 swap(tmp_buf[0], tmp_buf[mtd->writesize]);
1505 * Copy the metadata section into the oob buffer (this section is
1506 * guaranteed to be aligned on a byte boundary).
1508 if (oob_required)
1509 memcpy(oob, tmp_buf, nfc_geo->metadata_size);
1511 oob_bit_off = nfc_geo->metadata_size * 8;
1512 src_bit_off = oob_bit_off;
1514 /* Extract interleaved payload data and ECC bits */
1515 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1516 if (buf)
1517 gpmi_copy_bits(buf, step * eccsize * 8,
1518 tmp_buf, src_bit_off,
1519 eccsize * 8);
1520 src_bit_off += eccsize * 8;
1522 /* Align last ECC block to align a byte boundary */
1523 if (step == nfc_geo->ecc_chunk_count - 1 &&
1524 (oob_bit_off + eccbits) % 8)
1525 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1527 if (oob_required)
1528 gpmi_copy_bits(oob, oob_bit_off,
1529 tmp_buf, src_bit_off,
1530 eccbits);
1532 src_bit_off += eccbits;
1533 oob_bit_off += eccbits;
1536 if (oob_required) {
1537 oob_byte_off = oob_bit_off / 8;
1539 if (oob_byte_off < mtd->oobsize)
1540 memcpy(oob + oob_byte_off,
1541 tmp_buf + mtd->writesize + oob_byte_off,
1542 mtd->oobsize - oob_byte_off);
1545 return 0;
1549 * This function writes a NAND page without involving the ECC engine (no HW
1550 * ECC generation).
1551 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1552 * inline (interleaved with payload DATA), and do not align data chunk on
1553 * byte boundaries.
1554 * We thus need to take care moving the OOB area at the right place in the
1555 * final page, which is why we're using gpmi_copy_bits.
1557 * See set_geometry_by_ecc_info inline comments to have a full description
1558 * of the layout used by the GPMI controller.
1560 static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
1561 struct nand_chip *chip,
1562 const uint8_t *buf,
1563 int oob_required, int page)
1565 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1566 struct bch_geometry *nfc_geo = &this->bch_geometry;
1567 int eccsize = nfc_geo->ecc_chunk_size;
1568 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1569 u8 *tmp_buf = this->raw_buffer;
1570 uint8_t *oob = chip->oob_poi;
1571 size_t dst_bit_off;
1572 size_t oob_bit_off;
1573 size_t oob_byte_off;
1574 int step;
1577 * Initialize all bits to 1 in case we don't have a buffer for the
1578 * payload or oob data in order to leave unspecified bits of data
1579 * to their initial state.
1581 if (!buf || !oob_required)
1582 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize);
1585 * First copy the metadata section (stored in oob buffer) at the
1586 * beginning of the page, as imposed by the GPMI layout.
1588 memcpy(tmp_buf, oob, nfc_geo->metadata_size);
1589 oob_bit_off = nfc_geo->metadata_size * 8;
1590 dst_bit_off = oob_bit_off;
1592 /* Interleave payload data and ECC bits */
1593 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1594 if (buf)
1595 gpmi_copy_bits(tmp_buf, dst_bit_off,
1596 buf, step * eccsize * 8, eccsize * 8);
1597 dst_bit_off += eccsize * 8;
1599 /* Align last ECC block to align a byte boundary */
1600 if (step == nfc_geo->ecc_chunk_count - 1 &&
1601 (oob_bit_off + eccbits) % 8)
1602 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1604 if (oob_required)
1605 gpmi_copy_bits(tmp_buf, dst_bit_off,
1606 oob, oob_bit_off, eccbits);
1608 dst_bit_off += eccbits;
1609 oob_bit_off += eccbits;
1612 oob_byte_off = oob_bit_off / 8;
1614 if (oob_required && oob_byte_off < mtd->oobsize)
1615 memcpy(tmp_buf + mtd->writesize + oob_byte_off,
1616 oob + oob_byte_off, mtd->oobsize - oob_byte_off);
1619 * If required, swap the bad block marker and the first byte of the
1620 * metadata section, so that we don't modify the bad block marker.
1622 * See the layout description for a detailed explanation on why this
1623 * is needed.
1625 if (this->swap_block_mark)
1626 swap(tmp_buf[0], tmp_buf[mtd->writesize]);
1628 return nand_prog_page_op(chip, page, 0, tmp_buf,
1629 mtd->writesize + mtd->oobsize);
1632 static int gpmi_ecc_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1633 int page)
1635 return gpmi_ecc_read_page_raw(mtd, chip, NULL, 1, page);
1638 static int gpmi_ecc_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1639 int page)
1641 return gpmi_ecc_write_page_raw(mtd, chip, NULL, 1, page);
1644 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1646 struct nand_chip *chip = mtd_to_nand(mtd);
1647 struct gpmi_nand_data *this = nand_get_controller_data(chip);
1648 int ret = 0;
1649 uint8_t *block_mark;
1650 int column, page, chipnr;
1652 chipnr = (int)(ofs >> chip->chip_shift);
1653 chip->select_chip(mtd, chipnr);
1655 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0;
1657 /* Write the block mark. */
1658 block_mark = this->data_buffer_dma;
1659 block_mark[0] = 0; /* bad block marker */
1661 /* Shift to get page */
1662 page = (int)(ofs >> chip->page_shift);
1664 ret = nand_prog_page_op(chip, page, column, block_mark, 1);
1666 chip->select_chip(mtd, -1);
1668 return ret;
1671 static int nand_boot_set_geometry(struct gpmi_nand_data *this)
1673 struct boot_rom_geometry *geometry = &this->rom_geometry;
1676 * Set the boot block stride size.
1678 * In principle, we should be reading this from the OTP bits, since
1679 * that's where the ROM is going to get it. In fact, we don't have any
1680 * way to read the OTP bits, so we go with the default and hope for the
1681 * best.
1683 geometry->stride_size_in_pages = 64;
1686 * Set the search area stride exponent.
1688 * In principle, we should be reading this from the OTP bits, since
1689 * that's where the ROM is going to get it. In fact, we don't have any
1690 * way to read the OTP bits, so we go with the default and hope for the
1691 * best.
1693 geometry->search_area_stride_exponent = 2;
1694 return 0;
1697 static const char *fingerprint = "STMP";
1698 static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
1700 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1701 struct device *dev = this->dev;
1702 struct nand_chip *chip = &this->nand;
1703 struct mtd_info *mtd = nand_to_mtd(chip);
1704 unsigned int search_area_size_in_strides;
1705 unsigned int stride;
1706 unsigned int page;
1707 uint8_t *buffer = chip->data_buf;
1708 int saved_chip_number;
1709 int found_an_ncb_fingerprint = false;
1711 /* Compute the number of strides in a search area. */
1712 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1714 saved_chip_number = this->current_chip;
1715 chip->select_chip(mtd, 0);
1718 * Loop through the first search area, looking for the NCB fingerprint.
1720 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1722 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1723 /* Compute the page addresses. */
1724 page = stride * rom_geo->stride_size_in_pages;
1726 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1729 * Read the NCB fingerprint. The fingerprint is four bytes long
1730 * and starts in the 12th byte of the page.
1732 nand_read_page_op(chip, page, 12, NULL, 0);
1733 chip->read_buf(mtd, buffer, strlen(fingerprint));
1735 /* Look for the fingerprint. */
1736 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1737 found_an_ncb_fingerprint = true;
1738 break;
1743 chip->select_chip(mtd, saved_chip_number);
1745 if (found_an_ncb_fingerprint)
1746 dev_dbg(dev, "\tFound a fingerprint\n");
1747 else
1748 dev_dbg(dev, "\tNo fingerprint found\n");
1749 return found_an_ncb_fingerprint;
1752 /* Writes a transcription stamp. */
1753 static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
1755 struct device *dev = this->dev;
1756 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1757 struct nand_chip *chip = &this->nand;
1758 struct mtd_info *mtd = nand_to_mtd(chip);
1759 unsigned int block_size_in_pages;
1760 unsigned int search_area_size_in_strides;
1761 unsigned int search_area_size_in_pages;
1762 unsigned int search_area_size_in_blocks;
1763 unsigned int block;
1764 unsigned int stride;
1765 unsigned int page;
1766 uint8_t *buffer = chip->data_buf;
1767 int saved_chip_number;
1768 int status;
1770 /* Compute the search area geometry. */
1771 block_size_in_pages = mtd->erasesize / mtd->writesize;
1772 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1773 search_area_size_in_pages = search_area_size_in_strides *
1774 rom_geo->stride_size_in_pages;
1775 search_area_size_in_blocks =
1776 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1777 block_size_in_pages;
1779 dev_dbg(dev, "Search Area Geometry :\n");
1780 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1781 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1782 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1784 /* Select chip 0. */
1785 saved_chip_number = this->current_chip;
1786 chip->select_chip(mtd, 0);
1788 /* Loop over blocks in the first search area, erasing them. */
1789 dev_dbg(dev, "Erasing the search area...\n");
1791 for (block = 0; block < search_area_size_in_blocks; block++) {
1792 /* Erase this block. */
1793 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1794 status = nand_erase_op(chip, block);
1795 if (status)
1796 dev_err(dev, "[%s] Erase failed.\n", __func__);
1799 /* Write the NCB fingerprint into the page buffer. */
1800 memset(buffer, ~0, mtd->writesize);
1801 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1803 /* Loop through the first search area, writing NCB fingerprints. */
1804 dev_dbg(dev, "Writing NCB fingerprints...\n");
1805 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1806 /* Compute the page addresses. */
1807 page = stride * rom_geo->stride_size_in_pages;
1809 /* Write the first page of the current stride. */
1810 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1812 status = chip->ecc.write_page_raw(mtd, chip, buffer, 0, page);
1813 if (status)
1814 dev_err(dev, "[%s] Write failed.\n", __func__);
1817 /* Deselect chip 0. */
1818 chip->select_chip(mtd, saved_chip_number);
1819 return 0;
1822 static int mx23_boot_init(struct gpmi_nand_data *this)
1824 struct device *dev = this->dev;
1825 struct nand_chip *chip = &this->nand;
1826 struct mtd_info *mtd = nand_to_mtd(chip);
1827 unsigned int block_count;
1828 unsigned int block;
1829 int chipnr;
1830 int page;
1831 loff_t byte;
1832 uint8_t block_mark;
1833 int ret = 0;
1836 * If control arrives here, we can't use block mark swapping, which
1837 * means we're forced to use transcription. First, scan for the
1838 * transcription stamp. If we find it, then we don't have to do
1839 * anything -- the block marks are already transcribed.
1841 if (mx23_check_transcription_stamp(this))
1842 return 0;
1845 * If control arrives here, we couldn't find a transcription stamp, so
1846 * so we presume the block marks are in the conventional location.
1848 dev_dbg(dev, "Transcribing bad block marks...\n");
1850 /* Compute the number of blocks in the entire medium. */
1851 block_count = chip->chipsize >> chip->phys_erase_shift;
1854 * Loop over all the blocks in the medium, transcribing block marks as
1855 * we go.
1857 for (block = 0; block < block_count; block++) {
1859 * Compute the chip, page and byte addresses for this block's
1860 * conventional mark.
1862 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1863 page = block << (chip->phys_erase_shift - chip->page_shift);
1864 byte = block << chip->phys_erase_shift;
1866 /* Send the command to read the conventional block mark. */
1867 chip->select_chip(mtd, chipnr);
1868 nand_read_page_op(chip, page, mtd->writesize, NULL, 0);
1869 block_mark = chip->read_byte(mtd);
1870 chip->select_chip(mtd, -1);
1873 * Check if the block is marked bad. If so, we need to mark it
1874 * again, but this time the result will be a mark in the
1875 * location where we transcribe block marks.
1877 if (block_mark != 0xff) {
1878 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1879 ret = chip->block_markbad(mtd, byte);
1880 if (ret)
1881 dev_err(dev,
1882 "Failed to mark block bad with ret %d\n",
1883 ret);
1887 /* Write the stamp that indicates we've transcribed the block marks. */
1888 mx23_write_transcription_stamp(this);
1889 return 0;
1892 static int nand_boot_init(struct gpmi_nand_data *this)
1894 nand_boot_set_geometry(this);
1896 /* This is ROM arch-specific initilization before the BBT scanning. */
1897 if (GPMI_IS_MX23(this))
1898 return mx23_boot_init(this);
1899 return 0;
1902 static int gpmi_set_geometry(struct gpmi_nand_data *this)
1904 int ret;
1906 /* Free the temporary DMA memory for reading ID. */
1907 gpmi_free_dma_buffer(this);
1909 /* Set up the NFC geometry which is used by BCH. */
1910 ret = bch_set_geometry(this);
1911 if (ret) {
1912 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret);
1913 return ret;
1916 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1917 return gpmi_alloc_dma_buffer(this);
1920 static int gpmi_init_last(struct gpmi_nand_data *this)
1922 struct nand_chip *chip = &this->nand;
1923 struct mtd_info *mtd = nand_to_mtd(chip);
1924 struct nand_ecc_ctrl *ecc = &chip->ecc;
1925 struct bch_geometry *bch_geo = &this->bch_geometry;
1926 int ret;
1928 /* Set up the medium geometry */
1929 ret = gpmi_set_geometry(this);
1930 if (ret)
1931 return ret;
1933 /* Init the nand_ecc_ctrl{} */
1934 ecc->read_page = gpmi_ecc_read_page;
1935 ecc->write_page = gpmi_ecc_write_page;
1936 ecc->read_oob = gpmi_ecc_read_oob;
1937 ecc->write_oob = gpmi_ecc_write_oob;
1938 ecc->read_page_raw = gpmi_ecc_read_page_raw;
1939 ecc->write_page_raw = gpmi_ecc_write_page_raw;
1940 ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
1941 ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
1942 ecc->mode = NAND_ECC_HW;
1943 ecc->size = bch_geo->ecc_chunk_size;
1944 ecc->strength = bch_geo->ecc_strength;
1945 mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops);
1948 * We only enable the subpage read when:
1949 * (1) the chip is imx6, and
1950 * (2) the size of the ECC parity is byte aligned.
1952 if (GPMI_IS_MX6(this) &&
1953 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
1954 ecc->read_subpage = gpmi_ecc_read_subpage;
1955 chip->options |= NAND_SUBPAGE_READ;
1959 * Can we enable the extra features? such as EDO or Sync mode.
1961 * We do not check the return value now. That's means if we fail in
1962 * enable the extra features, we still can run in the normal way.
1964 gpmi_extra_init(this);
1966 return 0;
1969 static int gpmi_nand_init(struct gpmi_nand_data *this)
1971 struct nand_chip *chip = &this->nand;
1972 struct mtd_info *mtd = nand_to_mtd(chip);
1973 int ret;
1975 /* init current chip */
1976 this->current_chip = -1;
1978 /* init the MTD data structures */
1979 mtd->name = "gpmi-nand";
1980 mtd->dev.parent = this->dev;
1982 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1983 nand_set_controller_data(chip, this);
1984 nand_set_flash_node(chip, this->pdev->dev.of_node);
1985 chip->select_chip = gpmi_select_chip;
1986 chip->cmd_ctrl = gpmi_cmd_ctrl;
1987 chip->dev_ready = gpmi_dev_ready;
1988 chip->read_byte = gpmi_read_byte;
1989 chip->read_buf = gpmi_read_buf;
1990 chip->write_buf = gpmi_write_buf;
1991 chip->badblock_pattern = &gpmi_bbt_descr;
1992 chip->block_markbad = gpmi_block_markbad;
1993 chip->options |= NAND_NO_SUBPAGE_WRITE;
1995 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1996 this->swap_block_mark = !GPMI_IS_MX23(this);
1999 * Allocate a temporary DMA buffer for reading ID in the
2000 * nand_scan_ident().
2002 this->bch_geometry.payload_size = 1024;
2003 this->bch_geometry.auxiliary_size = 128;
2004 ret = gpmi_alloc_dma_buffer(this);
2005 if (ret)
2006 goto err_out;
2008 ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
2009 if (ret)
2010 goto err_out;
2012 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
2013 chip->bbt_options |= NAND_BBT_NO_OOB;
2015 if (of_property_read_bool(this->dev->of_node,
2016 "fsl,no-blockmark-swap"))
2017 this->swap_block_mark = false;
2019 dev_dbg(this->dev, "Blockmark swapping %sabled\n",
2020 this->swap_block_mark ? "en" : "dis");
2022 ret = gpmi_init_last(this);
2023 if (ret)
2024 goto err_out;
2026 chip->options |= NAND_SKIP_BBTSCAN;
2027 ret = nand_scan_tail(mtd);
2028 if (ret)
2029 goto err_out;
2031 ret = nand_boot_init(this);
2032 if (ret)
2033 goto err_nand_cleanup;
2034 ret = chip->scan_bbt(mtd);
2035 if (ret)
2036 goto err_nand_cleanup;
2038 ret = mtd_device_register(mtd, NULL, 0);
2039 if (ret)
2040 goto err_nand_cleanup;
2041 return 0;
2043 err_nand_cleanup:
2044 nand_cleanup(chip);
2045 err_out:
2046 gpmi_free_dma_buffer(this);
2047 return ret;
2050 static const struct of_device_id gpmi_nand_id_table[] = {
2052 .compatible = "fsl,imx23-gpmi-nand",
2053 .data = &gpmi_devdata_imx23,
2054 }, {
2055 .compatible = "fsl,imx28-gpmi-nand",
2056 .data = &gpmi_devdata_imx28,
2057 }, {
2058 .compatible = "fsl,imx6q-gpmi-nand",
2059 .data = &gpmi_devdata_imx6q,
2060 }, {
2061 .compatible = "fsl,imx6sx-gpmi-nand",
2062 .data = &gpmi_devdata_imx6sx,
2063 }, {
2064 .compatible = "fsl,imx7d-gpmi-nand",
2065 .data = &gpmi_devdata_imx7d,
2066 }, {}
2068 MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
2070 static int gpmi_nand_probe(struct platform_device *pdev)
2072 struct gpmi_nand_data *this;
2073 const struct of_device_id *of_id;
2074 int ret;
2076 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
2077 if (!this)
2078 return -ENOMEM;
2080 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
2081 if (of_id) {
2082 this->devdata = of_id->data;
2083 } else {
2084 dev_err(&pdev->dev, "Failed to find the right device id.\n");
2085 return -ENODEV;
2088 platform_set_drvdata(pdev, this);
2089 this->pdev = pdev;
2090 this->dev = &pdev->dev;
2092 ret = acquire_resources(this);
2093 if (ret)
2094 goto exit_acquire_resources;
2096 ret = init_hardware(this);
2097 if (ret)
2098 goto exit_nfc_init;
2100 ret = gpmi_nand_init(this);
2101 if (ret)
2102 goto exit_nfc_init;
2104 dev_info(this->dev, "driver registered.\n");
2106 return 0;
2108 exit_nfc_init:
2109 release_resources(this);
2110 exit_acquire_resources:
2112 return ret;
2115 static int gpmi_nand_remove(struct platform_device *pdev)
2117 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
2119 nand_release(nand_to_mtd(&this->nand));
2120 gpmi_free_dma_buffer(this);
2121 release_resources(this);
2122 return 0;
2125 #ifdef CONFIG_PM_SLEEP
2126 static int gpmi_pm_suspend(struct device *dev)
2128 struct gpmi_nand_data *this = dev_get_drvdata(dev);
2130 release_dma_channels(this);
2131 return 0;
2134 static int gpmi_pm_resume(struct device *dev)
2136 struct gpmi_nand_data *this = dev_get_drvdata(dev);
2137 int ret;
2139 ret = acquire_dma_channels(this);
2140 if (ret < 0)
2141 return ret;
2143 /* re-init the GPMI registers */
2144 this->flags &= ~GPMI_TIMING_INIT_OK;
2145 ret = gpmi_init(this);
2146 if (ret) {
2147 dev_err(this->dev, "Error setting GPMI : %d\n", ret);
2148 return ret;
2151 /* re-init the BCH registers */
2152 ret = bch_set_geometry(this);
2153 if (ret) {
2154 dev_err(this->dev, "Error setting BCH : %d\n", ret);
2155 return ret;
2158 /* re-init others */
2159 gpmi_extra_init(this);
2161 return 0;
2163 #endif /* CONFIG_PM_SLEEP */
2165 static const struct dev_pm_ops gpmi_pm_ops = {
2166 SET_SYSTEM_SLEEP_PM_OPS(gpmi_pm_suspend, gpmi_pm_resume)
2169 static struct platform_driver gpmi_nand_driver = {
2170 .driver = {
2171 .name = "gpmi-nand",
2172 .pm = &gpmi_pm_ops,
2173 .of_match_table = gpmi_nand_id_table,
2175 .probe = gpmi_nand_probe,
2176 .remove = gpmi_nand_remove,
2178 module_platform_driver(gpmi_nand_driver);
2180 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
2181 MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
2182 MODULE_LICENSE("GPL");