drivers/net/wireless/ti/wlcore/wlcore.h

   1 /*
   2  * This file is part of wlcore
   3  *
   4  * Copyright (C) 2011 Texas Instruments Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18  * 02110-1301 USA
  19  *
  20  */
  21
  22 #ifndef __WLCORE_H__
  23 #define __WLCORE_H__
  24
  25 #include <linux/platform_device.h>
  26
  27 #include "wlcore_i.h"
  28 #include "event.h"
  29 #include "boot.h"
  30
  31 /* The maximum number of Tx descriptors in all chip families */
  32 #define WLCORE_MAX_TX_DESCRIPTORS 32
  33
  34 /*
  35  * We always allocate this number of mac addresses. If we don't
  36  * have enough allocated addresses, the LAA bit is used
  37  */
  38 #define WLCORE_NUM_MAC_ADDRESSES 3
  39
  40 /* wl12xx/wl18xx maximum transmission power (in dBm) */
  41 #define WLCORE_MAX_TXPWR        25
  42
  43 /* Texas Instruments pre assigned OUI */
  44 #define WLCORE_TI_OUI_ADDRESS 0x080028
  45
  46 /* forward declaration */
  47 struct wl1271_tx_hw_descr;
  48 enum wl_rx_buf_align;
  49 struct wl1271_rx_descriptor;
  50
  51 struct wlcore_ops {
  52         int (*setup)(struct wl1271 *wl);
  53         int (*identify_chip)(struct wl1271 *wl);
  54         int (*identify_fw)(struct wl1271 *wl);
  55         int (*boot)(struct wl1271 *wl);
  56         int (*plt_init)(struct wl1271 *wl);
  57         int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
  58                            void *buf, size_t len);
  59         int (*ack_event)(struct wl1271 *wl);
  60         int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event,
  61                               bool *timeout);
  62         int (*process_mailbox_events)(struct wl1271 *wl);
  63         u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
  64         void (*set_tx_desc_blocks)(struct wl1271 *wl,
  65                                    struct wl1271_tx_hw_descr *desc,
  66                                    u32 blks, u32 spare_blks);
  67         void (*set_tx_desc_data_len)(struct wl1271 *wl,
  68                                      struct wl1271_tx_hw_descr *desc,
  69                                      struct sk_buff *skb);
  70         enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
  71                                                  u32 rx_desc);
  72         int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
  73         u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
  74                                  u32 data_len);
  75         int (*tx_delayed_compl)(struct wl1271 *wl);
  76         void (*tx_immediate_compl)(struct wl1271 *wl);
  77         int (*hw_init)(struct wl1271 *wl);
  78         int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
  79         void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status,
  80                                   struct wl_fw_status *fw_status);
  81         u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
  82                                     struct wl12xx_vif *wlvif);
  83         int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
  84         int (*get_mac)(struct wl1271 *wl);
  85         void (*set_tx_desc_csum)(struct wl1271 *wl,
  86                                  struct wl1271_tx_hw_descr *desc,
  87                                  struct sk_buff *skb);
  88         void (*set_rx_csum)(struct wl1271 *wl,
  89                             struct wl1271_rx_descriptor *desc,
  90                             struct sk_buff *skb);
  91         u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
  92                                           struct wl12xx_vif *wlvif);
  93         int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
  94         int (*handle_static_data)(struct wl1271 *wl,
  95                                   struct wl1271_static_data *static_data);
  96         int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
  97                           struct cfg80211_scan_request *req);
  98         int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
  99         int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
 100                                 struct cfg80211_sched_scan_request *req,
 101                                 struct ieee80211_scan_ies *ies);
 102         void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
 103         int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
 104         int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
 105                        struct ieee80211_vif *vif,
 106                        struct ieee80211_sta *sta,
 107                        struct ieee80211_key_conf *key_conf);
 108         int (*channel_switch)(struct wl1271 *wl,
 109                               struct wl12xx_vif *wlvif,
 110                               struct ieee80211_channel_switch *ch_switch);
 111         u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
 112         void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
 113         int (*set_peer_cap)(struct wl1271 *wl,
 114                             struct ieee80211_sta_ht_cap *ht_cap,
 115                             bool allow_ht_operation,
 116                             u32 rate_set, u8 hlid);
 117         u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr);
 118         bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid,
 119                               struct wl1271_link *lnk);
 120         bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid,
 121                              struct wl1271_link *lnk);
 122         int (*interrupt_notify)(struct wl1271 *wl, bool action);
 123         int (*rx_ba_filter)(struct wl1271 *wl, bool action);
 124         int (*ap_sleep)(struct wl1271 *wl);
 125         int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap);
 126         int (*smart_config_stop)(struct wl1271 *wl);
 127         int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id,
 128                                           u8 key_len, u8 *key);
 129         int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
 130                        bool start);
 131         int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
 132 };
 133
 134 enum wlcore_partitions {
 135         PART_DOWN,
 136         PART_WORK,
 137         PART_BOOT,
 138         PART_DRPW,
 139         PART_TOP_PRCM_ELP_SOC,
 140         PART_PHY_INIT,
 141
 142         PART_TABLE_LEN,
 143 };
 144
 145 struct wlcore_partition {
 146         u32 size;
 147         u32 start;
 148 };
 149
 150 struct wlcore_partition_set {
 151         struct wlcore_partition mem;
 152         struct wlcore_partition reg;
 153         struct wlcore_partition mem2;
 154         struct wlcore_partition mem3;
 155 };
 156
 157 enum wlcore_registers {
 158         /* register addresses, used with partition translation */
 159         REG_ECPU_CONTROL,
 160         REG_INTERRUPT_NO_CLEAR,
 161         REG_INTERRUPT_ACK,
 162         REG_COMMAND_MAILBOX_PTR,
 163         REG_EVENT_MAILBOX_PTR,
 164         REG_INTERRUPT_TRIG,
 165         REG_INTERRUPT_MASK,
 166         REG_PC_ON_RECOVERY,
 167         REG_CHIP_ID_B,
 168         REG_CMD_MBOX_ADDRESS,
 169
 170         /* data access memory addresses, used with partition translation */
 171         REG_SLV_MEM_DATA,
 172         REG_SLV_REG_DATA,
 173
 174         /* raw data access memory addresses */
 175         REG_RAW_FW_STATUS_ADDR,
 176
 177         REG_TABLE_LEN,
 178 };
 179
 180 struct wl1271_stats {
 181         void *fw_stats;
 182         unsigned long fw_stats_update;
 183         size_t fw_stats_len;
 184
 185         unsigned int retry_count;
 186         unsigned int excessive_retries;
 187 };
 188
 189 struct wl1271 {
 190         bool initialized;
 191         struct ieee80211_hw *hw;
 192         bool mac80211_registered;
 193
 194         struct device *dev;
 195         struct platform_device *pdev;
 196
 197         void *if_priv;
 198
 199         struct wl1271_if_operations *if_ops;
 200
 201         int irq;
 202
 203         int irq_flags;
 204
 205         spinlock_t wl_lock;
 206
 207         enum wlcore_state state;
 208         enum wl12xx_fw_type fw_type;
 209         bool plt;
 210         enum plt_mode plt_mode;
 211         u8 fem_manuf;
 212         u8 last_vif_count;
 213         struct mutex mutex;
 214
 215         unsigned long flags;
 216
 217         struct wlcore_partition_set curr_part;
 218
 219         struct wl1271_chip chip;
 220
 221         int cmd_box_addr;
 222
 223         u8 *fw;
 224         size_t fw_len;
 225         void *nvs;
 226         size_t nvs_len;
 227
 228         s8 hw_pg_ver;
 229
 230         /* address read from the fuse ROM */
 231         u32 fuse_oui_addr;
 232         u32 fuse_nic_addr;
 233
 234         /* we have up to 2 MAC addresses */
 235         struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES];
 236         int channel;
 237         u8 system_hlid;
 238
 239         unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)];
 240         unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 241         unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 242         unsigned long rate_policies_map[
 243                         BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
 244         unsigned long klv_templates_map[
 245                         BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)];
 246
 247         u8 session_ids[WLCORE_MAX_LINKS];
 248
 249         struct list_head wlvif_list;
 250
 251         u8 sta_count;
 252         u8 ap_count;
 253
 254         struct wl1271_acx_mem_map *target_mem_map;
 255
 256         /* Accounting for allocated / available TX blocks on HW */
 257         u32 tx_blocks_freed;
 258         u32 tx_blocks_available;
 259         u32 tx_allocated_blocks;
 260         u32 tx_results_count;
 261
 262         /* Accounting for allocated / available Tx packets in HW */
 263         u32 tx_pkts_freed[NUM_TX_QUEUES];
 264         u32 tx_allocated_pkts[NUM_TX_QUEUES];
 265
 266         /* Transmitted TX packets counter for chipset interface */
 267         u32 tx_packets_count;
 268
 269         /* Time-offset between host and chipset clocks */
 270         s64 time_offset;
 271
 272         /* Frames scheduled for transmission, not handled yet */
 273         int tx_queue_count[NUM_TX_QUEUES];
 274         unsigned long queue_stop_reasons[
 275                                 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES];
 276
 277         /* Frames received, not handled yet by mac80211 */
 278         struct sk_buff_head deferred_rx_queue;
 279
 280         /* Frames sent, not returned yet to mac80211 */
 281         struct sk_buff_head deferred_tx_queue;
 282
 283         struct work_struct tx_work;
 284         struct workqueue_struct *freezable_wq;
 285
 286         /* Pending TX frames */
 287         unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
 288         struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
 289         int tx_frames_cnt;
 290
 291         /* FW Rx counter */
 292         u32 rx_counter;
 293
 294         /* Intermediate buffer, used for packet aggregation */
 295         u8 *aggr_buf;
 296         u32 aggr_buf_size;
 297
 298         /* Reusable dummy packet template */
 299         struct sk_buff *dummy_packet;
 300
 301         /* Network stack work  */
 302         struct work_struct netstack_work;
 303
 304         /* FW log buffer */
 305         u8 *fwlog;
 306
 307         /* Number of valid bytes in the FW log buffer */
 308         ssize_t fwlog_size;
 309
 310         /* FW log end marker */
 311         u32 fwlog_end;
 312
 313         /* FW memory block size */
 314         u32 fw_mem_block_size;
 315
 316         /* Hardware recovery work */
 317         struct work_struct recovery_work;
 318         bool watchdog_recovery;
 319
 320         /* Reg domain last configuration */
 321         u32 reg_ch_conf_last[2]  __aligned(8);
 322         /* Reg domain pending configuration */
 323         u32 reg_ch_conf_pending[2];
 324
 325         /* Pointer that holds DMA-friendly block for the mailbox */
 326         void *mbox;
 327
 328         /* The mbox event mask */
 329         u32 event_mask;
 330         /* events to unmask only when ap interface is up */
 331         u32 ap_event_mask;
 332
 333         /* Mailbox pointers */
 334         u32 mbox_size;
 335         u32 mbox_ptr[2];
 336
 337         /* Are we currently scanning */
 338         struct wl12xx_vif *scan_wlvif;
 339         struct wl1271_scan scan;
 340         struct delayed_work scan_complete_work;
 341
 342         struct ieee80211_vif *roc_vif;
 343         struct delayed_work roc_complete_work;
 344
 345         struct wl12xx_vif *sched_vif;
 346
 347         /* The current band */
 348         enum nl80211_band band;
 349
 350         struct completion *elp_compl;
 351         struct delayed_work elp_work;
 352
 353         /* in dBm */
 354         int power_level;
 355
 356         struct wl1271_stats stats;
 357
 358         __le32 *buffer_32;
 359         u32 buffer_cmd;
 360         u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
 361
 362         void *raw_fw_status;
 363         struct wl_fw_status *fw_status;
 364         struct wl1271_tx_hw_res_if *tx_res_if;
 365
 366         /* Current chipset configuration */
 367         struct wlcore_conf conf;
 368
 369         bool sg_enabled;
 370
 371         bool enable_11a;
 372
 373         int recovery_count;
 374
 375         /* Most recently reported noise in dBm */
 376         s8 noise;
 377
 378         /* bands supported by this instance of wl12xx */
 379         struct ieee80211_supported_band bands[WLCORE_NUM_BANDS];
 380
 381         /*
 382          * wowlan trigger was configured during suspend.
 383          * (currently, only "ANY" trigger is supported)
 384          */
 385         bool wow_enabled;
 386         bool irq_wake_enabled;
 387
 388         /*
 389          * AP-mode - links indexed by HLID. The global and broadcast links
 390          * are always active.
 391          */
 392         struct wl1271_link links[WLCORE_MAX_LINKS];
 393
 394         /* number of currently active links */
 395         int active_link_count;
 396
 397         /* Fast/slow links bitmap according to FW */
 398         unsigned long fw_fast_lnk_map;
 399
 400         /* AP-mode - a bitmap of links currently in PS mode according to FW */
 401         unsigned long ap_fw_ps_map;
 402
 403         /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
 404         unsigned long ap_ps_map;
 405
 406         /* Quirks of specific hardware revisions */
 407         unsigned int quirks;
 408
 409         /* number of currently active RX BA sessions */
 410         int ba_rx_session_count;
 411
 412         /* Maximum number of supported RX BA sessions */
 413         int ba_rx_session_count_max;
 414
 415         /* AP-mode - number of currently connected stations */
 416         int active_sta_count;
 417
 418         /* Flag determining whether AP should broadcast OFDM-only rates */
 419         bool ofdm_only_ap;
 420
 421         /* last wlvif we transmitted from */
 422         struct wl12xx_vif *last_wlvif;
 423
 424         /* work to fire when Tx is stuck */
 425         struct delayed_work tx_watchdog_work;
 426
 427         struct wlcore_ops *ops;
 428         /* pointer to the lower driver partition table */
 429         const struct wlcore_partition_set *ptable;
 430         /* pointer to the lower driver register table */
 431         const int *rtable;
 432         /* name of the firmwares to load - for PLT, single role, multi-role */
 433         const char *plt_fw_name;
 434         const char *sr_fw_name;
 435         const char *mr_fw_name;
 436
 437         u8 scan_templ_id_2_4;
 438         u8 scan_templ_id_5;
 439         u8 sched_scan_templ_id_2_4;
 440         u8 sched_scan_templ_id_5;
 441         u8 max_channels_5;
 442
 443         /* per-chip-family private structure */
 444         void *priv;
 445
 446         /* number of TX descriptors the HW supports. */
 447         u32 num_tx_desc;
 448         /* number of RX descriptors the HW supports. */
 449         u32 num_rx_desc;
 450         /* number of links the HW supports */
 451         u8 num_links;
 452         /* max stations a single AP can support */
 453         u8 max_ap_stations;
 454
 455         /* translate HW Tx rates to standard rate-indices */
 456         const u8 **band_rate_to_idx;
 457
 458         /* size of table for HW rates that can be received from chip */
 459         u8 hw_tx_rate_tbl_size;
 460
 461         /* this HW rate and below are considered HT rates for this chip */
 462         u8 hw_min_ht_rate;
 463
 464         /* HW HT (11n) capabilities */
 465         struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS];
 466
 467         /* the current dfs region */
 468         enum nl80211_dfs_regions dfs_region;
 469         bool radar_debug_mode;
 470
 471         /* size of the private FW status data */
 472         size_t fw_status_len;
 473         size_t fw_status_priv_len;
 474
 475         /* RX Data filter rule state - enabled/disabled */
 476         unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)];
 477
 478         /* size of the private static data */
 479         size_t static_data_priv_len;
 480
 481         /* the current channel type */
 482         enum nl80211_channel_type channel_type;
 483
 484         /* mutex for protecting the tx_flush function */
 485         struct mutex flush_mutex;
 486
 487         /* sleep auth value currently configured to FW */
 488         int sleep_auth;
 489
 490         /* the number of allocated MAC addresses in this chip */
 491         int num_mac_addr;
 492
 493         /* minimum FW version required for the driver to work in single-role */
 494         unsigned int min_sr_fw_ver[NUM_FW_VER];
 495
 496         /* minimum FW version required for the driver to work in multi-role */
 497         unsigned int min_mr_fw_ver[NUM_FW_VER];
 498
 499         struct completion nvs_loading_complete;
 500
 501         /* interface combinations supported by the hw */
 502         const struct ieee80211_iface_combination *iface_combinations;
 503         u8 n_iface_combinations;
 504
 505         /* dynamic fw traces */
 506         u32 dynamic_fw_traces;
 507
 508         /* time sync zone master */
 509         u8 zone_master_mac_addr[ETH_ALEN];
 510 };
 511
 512 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
 513 int wlcore_remove(struct platform_device *pdev);
 514 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size,
 515                                      u32 mbox_size);
 516 int wlcore_free_hw(struct wl1271 *wl);
 517 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
 518                    struct ieee80211_vif *vif,
 519                    struct ieee80211_sta *sta,
 520                    struct ieee80211_key_conf *key_conf);
 521 void wlcore_regdomain_config(struct wl1271 *wl);
 522 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif,
 523                               struct wl1271_station *wl_sta, bool in_conn);
 524
 525 static inline void
 526 wlcore_set_ht_cap(struct wl1271 *wl, enum nl80211_band band,
 527                   struct ieee80211_sta_ht_cap *ht_cap)
 528 {
 529         memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
 530 }
 531
 532 /* Tell wlcore not to care about this element when checking the version */
 533 #define WLCORE_FW_VER_IGNORE    -1
 534
 535 static inline void
 536 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
 537                       unsigned int iftype_sr, unsigned int major_sr,
 538                       unsigned int subtype_sr, unsigned int minor_sr,
 539                       unsigned int iftype_mr, unsigned int major_mr,
 540                       unsigned int subtype_mr, unsigned int minor_mr)
 541 {
 542         wl->min_sr_fw_ver[FW_VER_CHIP] = chip;
 543         wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr;
 544         wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr;
 545         wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr;
 546         wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr;
 547
 548         wl->min_mr_fw_ver[FW_VER_CHIP] = chip;
 549         wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr;
 550         wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr;
 551         wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr;
 552         wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr;
 553 }
 554
 555 /* Firmware image load chunk size */
 556 #define CHUNK_SIZE      16384
 557
 558 /* Quirks */
 559
 560 /* Each RX/TX transaction requires an end-of-transaction transfer */
 561 #define WLCORE_QUIRK_END_OF_TRANSACTION         BIT(0)
 562
 563 /* the first start_role(sta) sometimes doesn't work on wl12xx */
 564 #define WLCORE_QUIRK_START_STA_FAILS            BIT(1)
 565
 566 /* wl127x and SPI don't support SDIO block size alignment */
 567 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN         BIT(2)
 568
 569 /* means aggregated Rx packets are aligned to a SDIO block */
 570 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN         BIT(3)
 571
 572 /* Older firmwares did not implement the FW logger over bus feature */
 573 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED      BIT(4)
 574
 575 /* Older firmwares use an old NVS format */
 576 #define WLCORE_QUIRK_LEGACY_NVS                 BIT(5)
 577
 578 /* pad only the last frame in the aggregate buffer */
 579 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME          BIT(7)
 580
 581 /* extra header space is required for TKIP */
 582 #define WLCORE_QUIRK_TKIP_HEADER_SPACE          BIT(8)
 583
 584 /* Some firmwares not support sched scans while connected */
 585 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN   BIT(9)
 586
 587 /* separate probe response templates for one-shot and sched scans */
 588 #define WLCORE_QUIRK_DUAL_PROBE_TMPL            BIT(10)
 589
 590 /* Firmware requires reg domain configuration for active calibration */
 591 #define WLCORE_QUIRK_REGDOMAIN_CONF             BIT(11)
 592
 593 /* The FW only support a zero session id for AP */
 594 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID         BIT(12)
 595
 596 /* TODO: move all these common registers and values elsewhere */
 597 #define HW_ACCESS_ELP_CTRL_REG          0x1FFFC
 598
 599 /* ELP register commands */
 600 #define ELPCTRL_WAKE_UP             0x1
 601 #define ELPCTRL_WAKE_UP_WLAN_READY  0x5
 602 #define ELPCTRL_SLEEP               0x0
 603 /* ELP WLAN_READY bit */
 604 #define ELPCTRL_WLAN_READY          0x2
 605
 606 /*************************************************************************
 607
 608     Interrupt Trigger Register (Host -> WiLink)
 609
 610 **************************************************************************/
 611
 612 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
 613
 614 /*
 615  * The host sets this bit to inform the Wlan
 616  * FW that a TX packet is in the XFER
 617  * Buffer #0.
 618  */
 619 #define INTR_TRIG_TX_PROC0 BIT(2)
 620
 621 /*
 622  * The host sets this bit to inform the FW
 623  * that it read a packet from RX XFER
 624  * Buffer #0.
 625  */
 626 #define INTR_TRIG_RX_PROC0 BIT(3)
 627
 628 #define INTR_TRIG_DEBUG_ACK BIT(4)
 629
 630 #define INTR_TRIG_STATE_CHANGED BIT(5)
 631
 632 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
 633
 634 /*
 635  * The host sets this bit to inform the FW
 636  * that it read a packet from RX XFER
 637  * Buffer #1.
 638  */
 639 #define INTR_TRIG_RX_PROC1 BIT(17)
 640
 641 /*
 642  * The host sets this bit to inform the Wlan
 643  * hardware that a TX packet is in the XFER
 644  * Buffer #1.
 645  */
 646 #define INTR_TRIG_TX_PROC1 BIT(18)
 647
 648 #define ACX_SLV_SOFT_RESET_BIT  BIT(1)
 649 #define SOFT_RESET_MAX_TIME     1000000
 650 #define SOFT_RESET_STALL_TIME   1000
 651
 652 #define ECPU_CONTROL_HALT       0x00000101
 653
 654 #define WELP_ARM_COMMAND_VAL    0x4
 655
 656 #endif /* __WLCORE_H__ */