1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
5 * Copyright (c) 2012 Intel Corporation
7 * Author: Alexander Shishkin
10 #include <linux/kernel.h>
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
15 #include <linux/regulator/consumer.h>
17 #include "../host/ehci.h"
23 static struct hc_driver __read_mostly ci_ehci_hc_driver
;
24 static int (*orig_bus_suspend
)(struct usb_hcd
*hcd
);
27 struct regulator
*reg_vbus
;
30 static int ehci_ci_portpower(struct usb_hcd
*hcd
, int portnum
, bool enable
)
32 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
33 struct ehci_ci_priv
*priv
= (struct ehci_ci_priv
*)ehci
->priv
;
34 struct device
*dev
= hcd
->self
.controller
;
35 struct ci_hdrc
*ci
= dev_get_drvdata(dev
);
37 int port
= HCS_N_PORTS(ehci
->hcs_params
);
42 "Not support multi-port regulator control\n");
46 ret
= regulator_enable(priv
->reg_vbus
);
48 ret
= regulator_disable(priv
->reg_vbus
);
51 "Failed to %s vbus regulator, ret=%d\n",
52 enable
? "enable" : "disable", ret
);
57 if (enable
&& (ci
->platdata
->phy_mode
== USBPHY_INTERFACE_MODE_HSIC
)) {
59 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
60 * As HSIC is always HS, this should be safe for others.
62 hw_port_test_set(ci
, 5);
63 hw_port_test_set(ci
, 0);
68 static int ehci_ci_reset(struct usb_hcd
*hcd
)
70 struct device
*dev
= hcd
->self
.controller
;
71 struct ci_hdrc
*ci
= dev_get_drvdata(dev
);
72 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
75 ret
= ehci_setup(hcd
);
79 ehci
->need_io_watchdog
= 0;
81 if (ci
->platdata
->notify_event
) {
82 ret
= ci
->platdata
->notify_event(ci
,
83 CI_HDRC_CONTROLLER_RESET_EVENT
);
88 ci_platform_configure(ci
);
93 static const struct ehci_driver_overrides ehci_ci_overrides
= {
94 .extra_priv_size
= sizeof(struct ehci_ci_priv
),
95 .port_power
= ehci_ci_portpower
,
96 .reset
= ehci_ci_reset
,
99 static irqreturn_t
host_irq(struct ci_hdrc
*ci
)
101 return usb_hcd_irq(ci
->irq
, ci
->hcd
);
104 static int host_start(struct ci_hdrc
*ci
)
107 struct ehci_hcd
*ehci
;
108 struct ehci_ci_priv
*priv
;
114 hcd
= __usb_create_hcd(&ci_ehci_hc_driver
, ci
->dev
->parent
,
115 ci
->dev
, dev_name(ci
->dev
), NULL
);
119 dev_set_drvdata(ci
->dev
, ci
);
120 hcd
->rsrc_start
= ci
->hw_bank
.phys
;
121 hcd
->rsrc_len
= ci
->hw_bank
.size
;
122 hcd
->regs
= ci
->hw_bank
.abs
;
125 hcd
->power_budget
= ci
->platdata
->power_budget
;
126 hcd
->tpl_support
= ci
->platdata
->tpl_support
;
130 hcd
->usb_phy
= ci
->usb_phy
;
132 ehci
= hcd_to_ehci(hcd
);
133 ehci
->caps
= ci
->hw_bank
.cap
;
134 ehci
->has_hostpc
= ci
->hw_bank
.lpm
;
135 ehci
->has_tdi_phy_lpm
= ci
->hw_bank
.lpm
;
136 ehci
->imx28_write_fix
= ci
->imx28_write_fix
;
138 priv
= (struct ehci_ci_priv
*)ehci
->priv
;
139 priv
->reg_vbus
= NULL
;
141 if (ci
->platdata
->reg_vbus
&& !ci_otg_is_fsm_mode(ci
)) {
142 if (ci
->platdata
->flags
& CI_HDRC_TURN_VBUS_EARLY_ON
) {
143 ret
= regulator_enable(ci
->platdata
->reg_vbus
);
146 "Failed to enable vbus regulator, ret=%d\n",
151 priv
->reg_vbus
= ci
->platdata
->reg_vbus
;
155 ret
= usb_add_hcd(hcd
, 0, 0);
159 struct usb_otg
*otg
= &ci
->otg
;
163 if (ci_otg_is_fsm_mode(ci
)) {
164 otg
->host
= &hcd
->self
;
165 hcd
->self
.otg_port
= 1;
172 if (ci
->platdata
->reg_vbus
&& !ci_otg_is_fsm_mode(ci
) &&
173 (ci
->platdata
->flags
& CI_HDRC_TURN_VBUS_EARLY_ON
))
174 regulator_disable(ci
->platdata
->reg_vbus
);
181 static void host_stop(struct ci_hdrc
*ci
)
183 struct usb_hcd
*hcd
= ci
->hcd
;
186 if (ci
->platdata
->notify_event
)
187 ci
->platdata
->notify_event(ci
,
188 CI_HDRC_CONTROLLER_STOPPED_EVENT
);
190 ci
->role
= CI_ROLE_END
;
191 synchronize_irq(ci
->irq
);
193 if (ci
->platdata
->reg_vbus
&& !ci_otg_is_fsm_mode(ci
) &&
194 (ci
->platdata
->flags
& CI_HDRC_TURN_VBUS_EARLY_ON
))
195 regulator_disable(ci
->platdata
->reg_vbus
);
202 void ci_hdrc_host_destroy(struct ci_hdrc
*ci
)
204 if (ci
->role
== CI_ROLE_HOST
&& ci
->hcd
)
208 static int ci_ehci_bus_suspend(struct usb_hcd
*hcd
)
210 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
214 int ret
= orig_bus_suspend(hcd
);
219 port
= HCS_N_PORTS(ehci
->hcs_params
);
221 u32 __iomem
*reg
= &ehci
->regs
->port_status
[port
];
222 u32 portsc
= ehci_readl(ehci
, reg
);
224 if (portsc
& PORT_CONNECT
) {
226 * For chipidea, the resume signal will be ended
227 * automatically, so for remote wakeup case, the
228 * usbcmd.rs may not be set before the resume has
229 * ended if other resume paths consumes too much
230 * time (~24ms), in that case, the SOF will not
231 * send out within 3ms after resume ends, then the
232 * high speed device will enter full speed mode.
235 tmp
= ehci_readl(ehci
, &ehci
->regs
->command
);
237 ehci_writel(ehci
, tmp
, &ehci
->regs
->command
);
239 * It needs a short delay between set RS bit and PHCD.
241 usleep_range(150, 200);
249 int ci_hdrc_host_init(struct ci_hdrc
*ci
)
251 struct ci_role_driver
*rdrv
;
253 if (!hw_read(ci
, CAP_DCCPARAMS
, DCCPARAMS_HC
))
256 rdrv
= devm_kzalloc(ci
->dev
, sizeof(struct ci_role_driver
), GFP_KERNEL
);
260 rdrv
->start
= host_start
;
261 rdrv
->stop
= host_stop
;
262 rdrv
->irq
= host_irq
;
264 ci
->roles
[CI_ROLE_HOST
] = rdrv
;
269 void ci_hdrc_host_driver_init(void)
271 ehci_init_driver(&ci_ehci_hc_driver
, &ehci_ci_overrides
);
272 orig_bus_suspend
= ci_ehci_hc_driver
.bus_suspend
;
273 ci_ehci_hc_driver
.bus_suspend
= ci_ehci_bus_suspend
;