sound/soc/codecs/uda1380.c

   1 /*
   2  * uda1380.c - Philips UDA1380 ALSA SoC audio driver
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
   9  *
  10  * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
  11  * codec model.
  12  *
  13  * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
  14  * Copyright 2005 Openedhand Ltd.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/types.h>
  20 #include <linux/slab.h>
  21 #include <linux/errno.h>
  22 #include <linux/gpio.h>
  23 #include <linux/delay.h>
  24 #include <linux/i2c.h>
  25 #include <linux/workqueue.h>
  26 #include <sound/core.h>
  27 #include <sound/control.h>
  28 #include <sound/initval.h>
  29 #include <sound/soc.h>
  30 #include <sound/tlv.h>
  31 #include <sound/uda1380.h>
  32
  33 #include "uda1380.h"
  34
  35 /* codec private data */
  36 struct uda1380_priv {
  37         struct snd_soc_codec *codec;
  38         unsigned int dac_clk;
  39         struct work_struct work;
  40         struct i2c_client *i2c;
  41         u16 *reg_cache;
  42 };
  43
  44 /*
  45  * uda1380 register cache
  46  */
  47 static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
  48         0x0502, 0x0000, 0x0000, 0x3f3f,
  49         0x0202, 0x0000, 0x0000, 0x0000,
  50         0x0000, 0x0000, 0x0000, 0x0000,
  51         0x0000, 0x0000, 0x0000, 0x0000,
  52         0x0000, 0xff00, 0x0000, 0x4800,
  53         0x0000, 0x0000, 0x0000, 0x0000,
  54         0x0000, 0x0000, 0x0000, 0x0000,
  55         0x0000, 0x0000, 0x0000, 0x0000,
  56         0x0000, 0x8000, 0x0002, 0x0000,
  57 };
  58
  59 static unsigned long uda1380_cache_dirty;
  60
  61 /*
  62  * read uda1380 register cache
  63  */
  64 static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
  65         unsigned int reg)
  66 {
  67         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
  68         u16 *cache = uda1380->reg_cache;
  69
  70         if (reg == UDA1380_RESET)
  71                 return 0;
  72         if (reg >= UDA1380_CACHEREGNUM)
  73                 return -1;
  74         return cache[reg];
  75 }
  76
  77 /*
  78  * write uda1380 register cache
  79  */
  80 static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
  81         u16 reg, unsigned int value)
  82 {
  83         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
  84         u16 *cache = uda1380->reg_cache;
  85
  86         if (reg >= UDA1380_CACHEREGNUM)
  87                 return;
  88         if ((reg >= 0x10) && (cache[reg] != value))
  89                 set_bit(reg - 0x10, &uda1380_cache_dirty);
  90         cache[reg] = value;
  91 }
  92
  93 /*
  94  * write to the UDA1380 register space
  95  */
  96 static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
  97         unsigned int value)
  98 {
  99         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
 100         u8 data[3];
 101
 102         /* data is
 103          *   data[0] is register offset
 104          *   data[1] is MS byte
 105          *   data[2] is LS byte
 106          */
 107         data[0] = reg;
 108         data[1] = (value & 0xff00) >> 8;
 109         data[2] = value & 0x00ff;
 110
 111         uda1380_write_reg_cache(codec, reg, value);
 112
 113         /* the interpolator & decimator regs must only be written when the
 114          * codec DAI is active.
 115          */
 116         if (!snd_soc_codec_is_active(codec) && (reg >= UDA1380_MVOL))
 117                 return 0;
 118         pr_debug("uda1380: hw write %x val %x\n", reg, value);
 119         if (i2c_master_send(uda1380->i2c, data, 3) == 3) {
 120                 unsigned int val;
 121                 i2c_master_send(uda1380->i2c, data, 1);
 122                 i2c_master_recv(uda1380->i2c, data, 2);
 123                 val = (data[0]<<8) | data[1];
 124                 if (val != value) {
 125                         pr_debug("uda1380: READ BACK VAL %x\n",
 126                                         (data[0]<<8) | data[1]);
 127                         return -EIO;
 128                 }
 129                 if (reg >= 0x10)
 130                         clear_bit(reg - 0x10, &uda1380_cache_dirty);
 131                 return 0;
 132         } else
 133                 return -EIO;
 134 }
 135
 136 static void uda1380_sync_cache(struct snd_soc_codec *codec)
 137 {
 138         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
 139         int reg;
 140         u8 data[3];
 141         u16 *cache = uda1380->reg_cache;
 142
 143         /* Sync reg_cache with the hardware */
 144         for (reg = 0; reg < UDA1380_MVOL; reg++) {
 145                 data[0] = reg;
 146                 data[1] = (cache[reg] & 0xff00) >> 8;
 147                 data[2] = cache[reg] & 0x00ff;
 148                 if (i2c_master_send(uda1380->i2c, data, 3) != 3)
 149                         dev_err(codec->dev, "%s: write to reg 0x%x failed\n",
 150                                 __func__, reg);
 151         }
 152 }
 153
 154 static int uda1380_reset(struct snd_soc_codec *codec)
 155 {
 156         struct uda1380_platform_data *pdata = codec->dev->platform_data;
 157         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
 158
 159         if (gpio_is_valid(pdata->gpio_reset)) {
 160                 gpio_set_value(pdata->gpio_reset, 1);
 161                 mdelay(1);
 162                 gpio_set_value(pdata->gpio_reset, 0);
 163         } else {
 164                 u8 data[3];
 165
 166                 data[0] = UDA1380_RESET;
 167                 data[1] = 0;
 168                 data[2] = 0;
 169
 170                 if (i2c_master_send(uda1380->i2c, data, 3) != 3) {
 171                         dev_err(codec->dev, "%s: failed\n", __func__);
 172                         return -EIO;
 173                 }
 174         }
 175
 176         return 0;
 177 }
 178
 179 static void uda1380_flush_work(struct work_struct *work)
 180 {
 181         struct uda1380_priv *uda1380 = container_of(work, struct uda1380_priv, work);
 182         struct snd_soc_codec *uda1380_codec = uda1380->codec;
 183         int bit, reg;
 184
 185         for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
 186                 reg = 0x10 + bit;
 187                 pr_debug("uda1380: flush reg %x val %x:\n", reg,
 188                                 uda1380_read_reg_cache(uda1380_codec, reg));
 189                 uda1380_write(uda1380_codec, reg,
 190                                 uda1380_read_reg_cache(uda1380_codec, reg));
 191                 clear_bit(bit, &uda1380_cache_dirty);
 192         }
 193
 194 }
 195
 196 /* declarations of ALSA reg_elem_REAL controls */
 197 static const char *uda1380_deemp[] = {
 198         "None",
 199         "32kHz",
 200         "44.1kHz",
 201         "48kHz",
 202         "96kHz",
 203 };
 204 static const char *uda1380_input_sel[] = {
 205         "Line",
 206         "Mic + Line R",
 207         "Line L",
 208         "Mic",
 209 };
 210 static const char *uda1380_output_sel[] = {
 211         "DAC",
 212         "Analog Mixer",
 213 };
 214 static const char *uda1380_spf_mode[] = {
 215         "Flat",
 216         "Minimum1",
 217         "Minimum2",
 218         "Maximum"
 219 };
 220 static const char *uda1380_capture_sel[] = {
 221         "ADC",
 222         "Digital Mixer"
 223 };
 224 static const char *uda1380_sel_ns[] = {
 225         "3rd-order",
 226         "5th-order"
 227 };
 228 static const char *uda1380_mix_control[] = {
 229         "off",
 230         "PCM only",
 231         "before sound processing",
 232         "after sound processing"
 233 };
 234 static const char *uda1380_sdet_setting[] = {
 235         "3200",
 236         "4800",
 237         "9600",
 238         "19200"
 239 };
 240 static const char *uda1380_os_setting[] = {
 241         "single-speed",
 242         "double-speed (no mixing)",
 243         "quad-speed (no mixing)"
 244 };
 245
 246 static const struct soc_enum uda1380_deemp_enum[] = {
 247         SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, ARRAY_SIZE(uda1380_deemp),
 248                         uda1380_deemp),
 249         SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, ARRAY_SIZE(uda1380_deemp),
 250                         uda1380_deemp),
 251 };
 252 static SOC_ENUM_SINGLE_DECL(uda1380_input_sel_enum,
 253                             UDA1380_ADC, 2, uda1380_input_sel);         /* SEL_MIC, SEL_LNA */
 254 static SOC_ENUM_SINGLE_DECL(uda1380_output_sel_enum,
 255                             UDA1380_PM, 7, uda1380_output_sel);         /* R02_EN_AVC */
 256 static SOC_ENUM_SINGLE_DECL(uda1380_spf_enum,
 257                             UDA1380_MODE, 14, uda1380_spf_mode);                /* M */
 258 static SOC_ENUM_SINGLE_DECL(uda1380_capture_sel_enum,
 259                             UDA1380_IFACE, 6, uda1380_capture_sel);     /* SEL_SOURCE */
 260 static SOC_ENUM_SINGLE_DECL(uda1380_sel_ns_enum,
 261                             UDA1380_MIXER, 14, uda1380_sel_ns);         /* SEL_NS */
 262 static SOC_ENUM_SINGLE_DECL(uda1380_mix_enum,
 263                             UDA1380_MIXER, 12, uda1380_mix_control);    /* MIX, MIX_POS */
 264 static SOC_ENUM_SINGLE_DECL(uda1380_sdet_enum,
 265                             UDA1380_MIXER, 4, uda1380_sdet_setting);    /* SD_VALUE */
 266 static SOC_ENUM_SINGLE_DECL(uda1380_os_enum,
 267                             UDA1380_MIXER, 0, uda1380_os_setting);      /* OS */
 268
 269 /*
 270  * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
 271  */
 272 static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
 273
 274 /*
 275  * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
 276  * from -66 dB in 0.5 dB steps (2 dB steps, really) and
 277  * from -52 dB in 0.25 dB steps
 278  */
 279 static const DECLARE_TLV_DB_RANGE(mvol_tlv,
 280         0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
 281         16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
 282         44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0)
 283 );
 284
 285 /*
 286  * from -72 dB in 1.5 dB steps (6 dB steps really),
 287  * from -66 dB in 0.75 dB steps (3 dB steps really),
 288  * from -60 dB in 0.5 dB steps (2 dB steps really) and
 289  * from -46 dB in 0.25 dB steps
 290  */
 291 static const DECLARE_TLV_DB_RANGE(vc_tlv,
 292         0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
 293         8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
 294         16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
 295         44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0)
 296 );
 297
 298 /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
 299 static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
 300
 301 /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
 302  * off at 18 dB max) */
 303 static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
 304
 305 /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
 306 static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
 307
 308 /* from 0 to 24 dB in 3 dB steps */
 309 static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
 310
 311 /* from 0 to 30 dB in 2 dB steps */
 312 static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
 313
 314 static const struct snd_kcontrol_new uda1380_snd_controls[] = {
 315         SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv),     /* AVCR, AVCL */
 316         SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
 317         SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv),       /* VC2 */
 318         SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv),       /* VC1 */
 319         SOC_ENUM("Sound Processing Filter", uda1380_spf_enum),                          /* M */
 320         SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv),     /* TRL, TRR */
 321         SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv),       /* BBL, BBR */
 322 /**/    SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1),          /* MTM */
 323         SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1),             /* MT2 from decimation filter */
 324         SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]),            /* DE2 */
 325         SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1),              /* MT1, from digital data input */
 326         SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]),            /* DE1 */
 327         SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0),   /* DA_POL_INV */
 328         SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum),                          /* SEL_NS */
 329         SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum),             /* MIX_POS, MIX */
 330         SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0),          /* SDET_ON */
 331         SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum),                /* SD_VALUE */
 332         SOC_ENUM("Oversampling Input", uda1380_os_enum),                        /* OS */
 333         SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv),        /* ML_DEC, MR_DEC */
 334 /**/    SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1),                /* MT_ADC */
 335         SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
 336         SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0),     /* ADCPOL_INV */
 337         SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv),   /* VGA_CTRL */
 338         SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0),            /* SKIP_DCFIL (before decimator) */
 339         SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0),            /* EN_DCFIL (at output of decimator) */
 340         SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0),                 /* TODO: enum, see table 62 */
 341         SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1),                   /* AGC_LEVEL */
 342         /* -5.5, -8, -11.5, -14 dBFS */
 343         SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
 344 };
 345
 346 /* Input mux */
 347 static const struct snd_kcontrol_new uda1380_input_mux_control =
 348         SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
 349
 350 /* Output mux */
 351 static const struct snd_kcontrol_new uda1380_output_mux_control =
 352         SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
 353
 354 /* Capture mux */
 355 static const struct snd_kcontrol_new uda1380_capture_mux_control =
 356         SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
 357
 358
 359 static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
 360         SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
 361                 &uda1380_input_mux_control),
 362         SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
 363                 &uda1380_output_mux_control),
 364         SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
 365                 &uda1380_capture_mux_control),
 366         SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
 367         SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
 368         SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
 369         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
 370         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
 371         SND_SOC_DAPM_INPUT("VINM"),
 372         SND_SOC_DAPM_INPUT("VINL"),
 373         SND_SOC_DAPM_INPUT("VINR"),
 374         SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
 375         SND_SOC_DAPM_OUTPUT("VOUTLHP"),
 376         SND_SOC_DAPM_OUTPUT("VOUTRHP"),
 377         SND_SOC_DAPM_OUTPUT("VOUTL"),
 378         SND_SOC_DAPM_OUTPUT("VOUTR"),
 379         SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
 380         SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
 381 };
 382
 383 static const struct snd_soc_dapm_route uda1380_dapm_routes[] = {
 384
 385         /* output mux */
 386         {"HeadPhone Driver", NULL, "Output Mux"},
 387         {"VOUTR", NULL, "Output Mux"},
 388         {"VOUTL", NULL, "Output Mux"},
 389
 390         {"Analog Mixer", NULL, "VINR"},
 391         {"Analog Mixer", NULL, "VINL"},
 392         {"Analog Mixer", NULL, "DAC"},
 393
 394         {"Output Mux", "DAC", "DAC"},
 395         {"Output Mux", "Analog Mixer", "Analog Mixer"},
 396
 397         /* {"DAC", "Digital Mixer", "I2S" } */
 398
 399         /* headphone driver */
 400         {"VOUTLHP", NULL, "HeadPhone Driver"},
 401         {"VOUTRHP", NULL, "HeadPhone Driver"},
 402
 403         /* input mux */
 404         {"Left ADC", NULL, "Input Mux"},
 405         {"Input Mux", "Mic", "Mic LNA"},
 406         {"Input Mux", "Mic + Line R", "Mic LNA"},
 407         {"Input Mux", "Line L", "Left PGA"},
 408         {"Input Mux", "Line", "Left PGA"},
 409
 410         /* right input */
 411         {"Right ADC", "Mic + Line R", "Right PGA"},
 412         {"Right ADC", "Line", "Right PGA"},
 413
 414         /* inputs */
 415         {"Mic LNA", NULL, "VINM"},
 416         {"Left PGA", NULL, "VINL"},
 417         {"Right PGA", NULL, "VINR"},
 418 };
 419
 420 static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
 421                 unsigned int fmt)
 422 {
 423         struct snd_soc_codec *codec = codec_dai->codec;
 424         int iface;
 425
 426         /* set up DAI based upon fmt */
 427         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 428         iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
 429
 430         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 431         case SND_SOC_DAIFMT_I2S:
 432                 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
 433                 break;
 434         case SND_SOC_DAIFMT_LSB:
 435                 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
 436                 break;
 437         case SND_SOC_DAIFMT_MSB:
 438                 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
 439         }
 440
 441         /* DATAI is slave only, so in single-link mode, this has to be slave */
 442         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
 443                 return -EINVAL;
 444
 445         uda1380_write_reg_cache(codec, UDA1380_IFACE, iface);
 446
 447         return 0;
 448 }
 449
 450 static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
 451                 unsigned int fmt)
 452 {
 453         struct snd_soc_codec *codec = codec_dai->codec;
 454         int iface;
 455
 456         /* set up DAI based upon fmt */
 457         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 458         iface &= ~R01_SFORI_MASK;
 459
 460         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 461         case SND_SOC_DAIFMT_I2S:
 462                 iface |= R01_SFORI_I2S;
 463                 break;
 464         case SND_SOC_DAIFMT_LSB:
 465                 iface |= R01_SFORI_LSB16;
 466                 break;
 467         case SND_SOC_DAIFMT_MSB:
 468                 iface |= R01_SFORI_MSB;
 469         }
 470
 471         /* DATAI is slave only, so this has to be slave */
 472         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
 473                 return -EINVAL;
 474
 475         uda1380_write(codec, UDA1380_IFACE, iface);
 476
 477         return 0;
 478 }
 479
 480 static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
 481                 unsigned int fmt)
 482 {
 483         struct snd_soc_codec *codec = codec_dai->codec;
 484         int iface;
 485
 486         /* set up DAI based upon fmt */
 487         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 488         iface &= ~(R01_SIM | R01_SFORO_MASK);
 489
 490         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 491         case SND_SOC_DAIFMT_I2S:
 492                 iface |= R01_SFORO_I2S;
 493                 break;
 494         case SND_SOC_DAIFMT_LSB:
 495                 iface |= R01_SFORO_LSB16;
 496                 break;
 497         case SND_SOC_DAIFMT_MSB:
 498                 iface |= R01_SFORO_MSB;
 499         }
 500
 501         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
 502                 iface |= R01_SIM;
 503
 504         uda1380_write(codec, UDA1380_IFACE, iface);
 505
 506         return 0;
 507 }
 508
 509 static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
 510                 struct snd_soc_dai *dai)
 511 {
 512         struct snd_soc_codec *codec = dai->codec;
 513         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
 514         int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
 515
 516         switch (cmd) {
 517         case SNDRV_PCM_TRIGGER_START:
 518         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 519                 uda1380_write_reg_cache(codec, UDA1380_MIXER,
 520                                         mixer & ~R14_SILENCE);
 521                 schedule_work(&uda1380->work);
 522                 break;
 523         case SNDRV_PCM_TRIGGER_STOP:
 524         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 525                 uda1380_write_reg_cache(codec, UDA1380_MIXER,
 526                                         mixer | R14_SILENCE);
 527                 schedule_work(&uda1380->work);
 528                 break;
 529         }
 530         return 0;
 531 }
 532
 533 static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
 534                                  struct snd_pcm_hw_params *params,
 535                                  struct snd_soc_dai *dai)
 536 {
 537         struct snd_soc_codec *codec = dai->codec;
 538         u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 539
 540         /* set WSPLL power and divider if running from this clock */
 541         if (clk & R00_DAC_CLK) {
 542                 int rate = params_rate(params);
 543                 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 544                 clk &= ~0x3; /* clear SEL_LOOP_DIV */
 545                 switch (rate) {
 546                 case 6250 ... 12500:
 547                         clk |= 0x0;
 548                         break;
 549                 case 12501 ... 25000:
 550                         clk |= 0x1;
 551                         break;
 552                 case 25001 ... 50000:
 553                         clk |= 0x2;
 554                         break;
 555                 case 50001 ... 100000:
 556                         clk |= 0x3;
 557                         break;
 558                 }
 559                 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
 560         }
 561
 562         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 563                 clk |= R00_EN_DAC | R00_EN_INT;
 564         else
 565                 clk |= R00_EN_ADC | R00_EN_DEC;
 566
 567         uda1380_write(codec, UDA1380_CLK, clk);
 568         return 0;
 569 }
 570
 571 static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
 572                                  struct snd_soc_dai *dai)
 573 {
 574         struct snd_soc_codec *codec = dai->codec;
 575         u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 576
 577         /* shut down WSPLL power if running from this clock */
 578         if (clk & R00_DAC_CLK) {
 579                 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 580                 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
 581         }
 582
 583         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 584                 clk &= ~(R00_EN_DAC | R00_EN_INT);
 585         else
 586                 clk &= ~(R00_EN_ADC | R00_EN_DEC);
 587
 588         uda1380_write(codec, UDA1380_CLK, clk);
 589 }
 590
 591 static int uda1380_set_bias_level(struct snd_soc_codec *codec,
 592         enum snd_soc_bias_level level)
 593 {
 594         int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 595         int reg;
 596         struct uda1380_platform_data *pdata = codec->dev->platform_data;
 597
 598         switch (level) {
 599         case SND_SOC_BIAS_ON:
 600         case SND_SOC_BIAS_PREPARE:
 601                 /* ADC, DAC on */
 602                 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
 603                 break;
 604         case SND_SOC_BIAS_STANDBY:
 605                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
 606                         if (gpio_is_valid(pdata->gpio_power)) {
 607                                 gpio_set_value(pdata->gpio_power, 1);
 608                                 mdelay(1);
 609                                 uda1380_reset(codec);
 610                         }
 611
 612                         uda1380_sync_cache(codec);
 613                 }
 614                 uda1380_write(codec, UDA1380_PM, 0x0);
 615                 break;
 616         case SND_SOC_BIAS_OFF:
 617                 if (!gpio_is_valid(pdata->gpio_power))
 618                         break;
 619
 620                 gpio_set_value(pdata->gpio_power, 0);
 621
 622                 /* Mark mixer regs cache dirty to sync them with
 623                  * codec regs on power on.
 624                  */
 625                 for (reg = UDA1380_MVOL; reg < UDA1380_CACHEREGNUM; reg++)
 626                         set_bit(reg - 0x10, &uda1380_cache_dirty);
 627         }
 628         return 0;
 629 }
 630
 631 #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
 632                        SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
 633                        SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
 634
 635 static const struct snd_soc_dai_ops uda1380_dai_ops = {
 636         .hw_params      = uda1380_pcm_hw_params,
 637         .shutdown       = uda1380_pcm_shutdown,
 638         .trigger        = uda1380_trigger,
 639         .set_fmt        = uda1380_set_dai_fmt_both,
 640 };
 641
 642 static const struct snd_soc_dai_ops uda1380_dai_ops_playback = {
 643         .hw_params      = uda1380_pcm_hw_params,
 644         .shutdown       = uda1380_pcm_shutdown,
 645         .trigger        = uda1380_trigger,
 646         .set_fmt        = uda1380_set_dai_fmt_playback,
 647 };
 648
 649 static const struct snd_soc_dai_ops uda1380_dai_ops_capture = {
 650         .hw_params      = uda1380_pcm_hw_params,
 651         .shutdown       = uda1380_pcm_shutdown,
 652         .trigger        = uda1380_trigger,
 653         .set_fmt        = uda1380_set_dai_fmt_capture,
 654 };
 655
 656 static struct snd_soc_dai_driver uda1380_dai[] = {
 657 {
 658         .name = "uda1380-hifi",
 659         .playback = {
 660                 .stream_name = "Playback",
 661                 .channels_min = 1,
 662                 .channels_max = 2,
 663                 .rates = UDA1380_RATES,
 664                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 665         .capture = {
 666                 .stream_name = "Capture",
 667                 .channels_min = 1,
 668                 .channels_max = 2,
 669                 .rates = UDA1380_RATES,
 670                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 671         .ops = &uda1380_dai_ops,
 672 },
 673 { /* playback only - dual interface */
 674         .name = "uda1380-hifi-playback",
 675         .playback = {
 676                 .stream_name = "Playback",
 677                 .channels_min = 1,
 678                 .channels_max = 2,
 679                 .rates = UDA1380_RATES,
 680                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 681         },
 682         .ops = &uda1380_dai_ops_playback,
 683 },
 684 { /* capture only - dual interface*/
 685         .name = "uda1380-hifi-capture",
 686         .capture = {
 687                 .stream_name = "Capture",
 688                 .channels_min = 1,
 689                 .channels_max = 2,
 690                 .rates = UDA1380_RATES,
 691                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 692         },
 693         .ops = &uda1380_dai_ops_capture,
 694 },
 695 };
 696
 697 static int uda1380_probe(struct snd_soc_codec *codec)
 698 {
 699         struct uda1380_platform_data *pdata =codec->dev->platform_data;
 700         struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
 701         int ret;
 702
 703         uda1380->codec = codec;
 704
 705         if (!gpio_is_valid(pdata->gpio_power)) {
 706                 ret = uda1380_reset(codec);
 707                 if (ret)
 708                         return ret;
 709         }
 710
 711         INIT_WORK(&uda1380->work, uda1380_flush_work);
 712
 713         /* set clock input */
 714         switch (pdata->dac_clk) {
 715         case UDA1380_DAC_CLK_SYSCLK:
 716                 uda1380_write_reg_cache(codec, UDA1380_CLK, 0);
 717                 break;
 718         case UDA1380_DAC_CLK_WSPLL:
 719                 uda1380_write_reg_cache(codec, UDA1380_CLK,
 720                         R00_DAC_CLK);
 721                 break;
 722         }
 723
 724         return 0;
 725 }
 726
 727 static const struct snd_soc_codec_driver soc_codec_dev_uda1380 = {
 728         .probe =        uda1380_probe,
 729         .read =         uda1380_read_reg_cache,
 730         .write =        uda1380_write,
 731         .set_bias_level = uda1380_set_bias_level,
 732         .suspend_bias_off = true,
 733
 734         .component_driver = {
 735                 .controls               = uda1380_snd_controls,
 736                 .num_controls           = ARRAY_SIZE(uda1380_snd_controls),
 737                 .dapm_widgets           = uda1380_dapm_widgets,
 738                 .num_dapm_widgets       = ARRAY_SIZE(uda1380_dapm_widgets),
 739                 .dapm_routes            = uda1380_dapm_routes,
 740                 .num_dapm_routes        = ARRAY_SIZE(uda1380_dapm_routes),
 741         },
 742 };
 743
 744 static int uda1380_i2c_probe(struct i2c_client *i2c,
 745                              const struct i2c_device_id *id)
 746 {
 747         struct uda1380_platform_data *pdata = i2c->dev.platform_data;
 748         struct uda1380_priv *uda1380;
 749         int ret;
 750
 751         if (!pdata)
 752                 return -EINVAL;
 753
 754         uda1380 = devm_kzalloc(&i2c->dev, sizeof(struct uda1380_priv),
 755                                GFP_KERNEL);
 756         if (uda1380 == NULL)
 757                 return -ENOMEM;
 758
 759         if (gpio_is_valid(pdata->gpio_reset)) {
 760                 ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_reset,
 761                         GPIOF_OUT_INIT_LOW, "uda1380 reset");
 762                 if (ret)
 763                         return ret;
 764         }
 765
 766         if (gpio_is_valid(pdata->gpio_power)) {
 767                 ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_power,
 768                         GPIOF_OUT_INIT_LOW, "uda1380 power");
 769                 if (ret)
 770                         return ret;
 771         }
 772
 773         uda1380->reg_cache = devm_kmemdup(&i2c->dev,
 774                                         uda1380_reg,
 775                                         ARRAY_SIZE(uda1380_reg) * sizeof(u16),
 776                                         GFP_KERNEL);
 777         if (!uda1380->reg_cache)
 778                 return -ENOMEM;
 779
 780         i2c_set_clientdata(i2c, uda1380);
 781         uda1380->i2c = i2c;
 782
 783         ret =  snd_soc_register_codec(&i2c->dev,
 784                         &soc_codec_dev_uda1380, uda1380_dai, ARRAY_SIZE(uda1380_dai));
 785         return ret;
 786 }
 787
 788 static int uda1380_i2c_remove(struct i2c_client *i2c)
 789 {
 790         snd_soc_unregister_codec(&i2c->dev);
 791         return 0;
 792 }
 793
 794 static const struct i2c_device_id uda1380_i2c_id[] = {
 795         { "uda1380", 0 },
 796         { }
 797 };
 798 MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
 799
 800 static const struct of_device_id uda1380_of_match[] = {
 801         { .compatible = "nxp,uda1380", },
 802         { }
 803 };
 804 MODULE_DEVICE_TABLE(of, uda1380_of_match);
 805
 806 static struct i2c_driver uda1380_i2c_driver = {
 807         .driver = {
 808                 .name =  "uda1380-codec",
 809                 .of_match_table = uda1380_of_match,
 810         },
 811         .probe =    uda1380_i2c_probe,
 812         .remove =   uda1380_i2c_remove,
 813         .id_table = uda1380_i2c_id,
 814 };
 815
 816 module_i2c_driver(uda1380_i2c_driver);
 817
 818 MODULE_AUTHOR("Giorgio Padrin");
 819 MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
 820 MODULE_LICENSE("GPL");