Linux 2.6.33-rc6
[cris-mirror.git] / drivers / video / bfin-t350mcqb-fb.c
blob2549c53b26a06ea3755ad4900aaa1615685e39ca
1 /*
2 * File: drivers/video/bfin-t350mcqb-fb.c
3 * Based on:
4 * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
6 * Created:
7 * Description: Blackfin LCD Framebufer driver
10 * Modified:
11 * Copyright 2004-2007 Analog Devices Inc.
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/fb.h>
36 #include <linux/init.h>
37 #include <linux/types.h>
38 #include <linux/interrupt.h>
39 #include <linux/device.h>
40 #include <linux/backlight.h>
41 #include <linux/lcd.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/platform_device.h>
45 #include <asm/blackfin.h>
46 #include <asm/irq.h>
47 #include <asm/dma-mapping.h>
48 #include <asm/dma.h>
49 #include <asm/portmux.h>
50 #include <asm/gptimers.h>
52 #define NO_BL_SUPPORT
54 #define LCD_X_RES 320 /* Horizontal Resolution */
55 #define LCD_Y_RES 240 /* Vertical Resolution */
56 #define LCD_BPP 24 /* Bit Per Pixel */
58 #define DMA_BUS_SIZE 16
59 #define LCD_CLK (12*1000*1000) /* 12MHz */
61 #define CLOCKS_PER_PIX 3
64 * HS and VS timing parameters (all in number of PPI clk ticks)
67 #define U_LINE 1 /* Blanking Lines */
69 #define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
70 #define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
71 #define H_PULSE 90 /* HS pulse width */
72 #define H_START 204 /* first valid pixel */
74 #define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
75 #define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
76 #define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
78 #define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
80 #define BFIN_LCD_NBR_PALETTE_ENTRIES 256
82 #define DRIVER_NAME "bfin-t350mcqb"
83 static char driver_name[] = DRIVER_NAME;
85 struct bfin_t350mcqbfb_info {
86 struct fb_info *fb;
87 struct device *dev;
88 unsigned char *fb_buffer; /* RGB Buffer */
89 dma_addr_t dma_handle;
90 int lq043_mmap;
91 int lq043_open_cnt;
92 int irq;
93 spinlock_t lock; /* lock */
94 u32 pseudo_pal[16];
97 static int nocursor;
98 module_param(nocursor, int, 0644);
99 MODULE_PARM_DESC(nocursor, "cursor enable/disable");
101 #define PPI_TX_MODE 0x2
102 #define PPI_XFER_TYPE_11 0xC
103 #define PPI_PORT_CFG_01 0x10
104 #define PPI_PACK_EN 0x80
105 #define PPI_POLS_1 0x8000
107 static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
109 bfin_write_PPI_DELAY(H_START);
110 bfin_write_PPI_COUNT(H_ACTPIX-1);
111 bfin_write_PPI_FRAME(V_LINES);
113 bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
114 PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
115 PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
116 PPI_PACK_EN | /* packing enabled PACK_EN */
117 PPI_POLS_1); /* faling edge syncs POLS */
120 static inline void bfin_t350mcqb_disable_ppi(void)
122 bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
125 static inline void bfin_t350mcqb_enable_ppi(void)
127 bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
130 static void bfin_t350mcqb_start_timers(void)
132 unsigned long flags;
134 local_irq_save(flags);
135 enable_gptimers(TIMER1bit);
136 enable_gptimers(TIMER0bit);
137 local_irq_restore(flags);
140 static void bfin_t350mcqb_stop_timers(void)
142 disable_gptimers(TIMER0bit | TIMER1bit);
144 set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
145 TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
146 TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);
150 static void bfin_t350mcqb_init_timers(void)
153 bfin_t350mcqb_stop_timers();
155 set_gptimer_period(TIMER0_id, H_PERIOD);
156 set_gptimer_pwidth(TIMER0_id, H_PULSE);
157 set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
158 TIMER_TIN_SEL | TIMER_CLK_SEL|
159 TIMER_EMU_RUN);
161 set_gptimer_period(TIMER1_id, V_PERIOD);
162 set_gptimer_pwidth(TIMER1_id, V_PULSE);
163 set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
164 TIMER_TIN_SEL | TIMER_CLK_SEL |
165 TIMER_EMU_RUN);
169 static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
172 set_dma_config(CH_PPI,
173 set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
174 INTR_DISABLE, DIMENSION_2D,
175 DATA_SIZE_16,
176 DMA_NOSYNC_KEEP_DMA_BUF));
177 set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
178 set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
179 set_dma_y_count(CH_PPI, V_LINES);
181 set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
182 set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
186 static u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
187 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
188 P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
189 P_PPI0_D6, P_PPI0_D7, 0};
191 static int bfin_t350mcqb_request_ports(int action)
193 if (action) {
194 if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
195 printk(KERN_ERR "Requesting Peripherals faild\n");
196 return -EFAULT;
198 } else
199 peripheral_free_list(ppi0_req_8);
201 return 0;
204 static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
206 struct bfin_t350mcqbfb_info *fbi = info->par;
208 spin_lock(&fbi->lock);
209 fbi->lq043_open_cnt++;
211 if (fbi->lq043_open_cnt <= 1) {
213 bfin_t350mcqb_disable_ppi();
214 SSYNC();
216 bfin_t350mcqb_config_dma(fbi);
217 bfin_t350mcqb_config_ppi(fbi);
218 bfin_t350mcqb_init_timers();
220 /* start dma */
221 enable_dma(CH_PPI);
222 bfin_t350mcqb_enable_ppi();
223 bfin_t350mcqb_start_timers();
226 spin_unlock(&fbi->lock);
228 return 0;
231 static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
233 struct bfin_t350mcqbfb_info *fbi = info->par;
235 spin_lock(&fbi->lock);
237 fbi->lq043_open_cnt--;
238 fbi->lq043_mmap = 0;
240 if (fbi->lq043_open_cnt <= 0) {
241 bfin_t350mcqb_disable_ppi();
242 SSYNC();
243 disable_dma(CH_PPI);
244 bfin_t350mcqb_stop_timers();
247 spin_unlock(&fbi->lock);
249 return 0;
252 static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
253 struct fb_info *info)
256 switch (var->bits_per_pixel) {
257 case 24:/* TRUECOLOUR, 16m */
258 var->red.offset = 0;
259 var->green.offset = 8;
260 var->blue.offset = 16;
261 var->red.length = var->green.length = var->blue.length = 8;
262 var->transp.offset = 0;
263 var->transp.length = 0;
264 var->transp.msb_right = 0;
265 var->red.msb_right = 0;
266 var->green.msb_right = 0;
267 var->blue.msb_right = 0;
268 break;
269 default:
270 pr_debug("%s: depth not supported: %u BPP\n", __func__,
271 var->bits_per_pixel);
272 return -EINVAL;
275 if (info->var.xres != var->xres || info->var.yres != var->yres ||
276 info->var.xres_virtual != var->xres_virtual ||
277 info->var.yres_virtual != var->yres_virtual) {
278 pr_debug("%s: Resolution not supported: X%u x Y%u \n",
279 __func__, var->xres, var->yres);
280 return -EINVAL;
284 * Memory limit
287 if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
288 pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
289 __func__, var->yres_virtual);
290 return -ENOMEM;
293 return 0;
296 static int bfin_t350mcqb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
298 struct bfin_t350mcqbfb_info *fbi = info->par;
300 if (fbi->lq043_mmap)
301 return -1;
303 spin_lock(&fbi->lock);
304 fbi->lq043_mmap = 1;
305 spin_unlock(&fbi->lock);
307 vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);
309 vma->vm_end = vma->vm_start + info->fix.smem_len;
310 /* For those who don't understand how mmap works, go read
311 * Documentation/nommu-mmap.txt.
312 * For those that do, you will know that the VM_MAYSHARE flag
313 * must be set in the vma->vm_flags structure on noMMU
314 * Other flags can be set, and are documented in
315 * include/linux/mm.h
317 vma->vm_flags |= VM_MAYSHARE | VM_SHARED;
319 return 0;
322 int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
324 if (nocursor)
325 return 0;
326 else
327 return -EINVAL; /* just to force soft_cursor() call */
330 static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
331 u_int blue, u_int transp,
332 struct fb_info *info)
334 if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
335 return -EINVAL;
337 if (info->var.grayscale) {
338 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
339 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
342 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
344 u32 value;
345 /* Place color in the pseudopalette */
346 if (regno > 16)
347 return -EINVAL;
349 red >>= (16 - info->var.red.length);
350 green >>= (16 - info->var.green.length);
351 blue >>= (16 - info->var.blue.length);
353 value = (red << info->var.red.offset) |
354 (green << info->var.green.offset) |
355 (blue << info->var.blue.offset);
356 value &= 0xFFFFFF;
358 ((u32 *) (info->pseudo_palette))[regno] = value;
362 return 0;
365 static struct fb_ops bfin_t350mcqb_fb_ops = {
366 .owner = THIS_MODULE,
367 .fb_open = bfin_t350mcqb_fb_open,
368 .fb_release = bfin_t350mcqb_fb_release,
369 .fb_check_var = bfin_t350mcqb_fb_check_var,
370 .fb_fillrect = cfb_fillrect,
371 .fb_copyarea = cfb_copyarea,
372 .fb_imageblit = cfb_imageblit,
373 .fb_mmap = bfin_t350mcqb_fb_mmap,
374 .fb_cursor = bfin_t350mcqb_fb_cursor,
375 .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
378 #ifndef NO_BL_SUPPORT
379 static int bl_get_brightness(struct backlight_device *bd)
381 return 0;
384 static struct backlight_ops bfin_lq043fb_bl_ops = {
385 .get_brightness = bl_get_brightness,
388 static struct backlight_device *bl_dev;
390 static int bfin_lcd_get_power(struct lcd_device *dev)
392 return 0;
395 static int bfin_lcd_set_power(struct lcd_device *dev, int power)
397 return 0;
400 static int bfin_lcd_get_contrast(struct lcd_device *dev)
402 return 0;
405 static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
408 return 0;
411 static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
413 if (!fi || (fi == &bfin_t350mcqb_fb))
414 return 1;
415 return 0;
418 static struct lcd_ops bfin_lcd_ops = {
419 .get_power = bfin_lcd_get_power,
420 .set_power = bfin_lcd_set_power,
421 .get_contrast = bfin_lcd_get_contrast,
422 .set_contrast = bfin_lcd_set_contrast,
423 .check_fb = bfin_lcd_check_fb,
426 static struct lcd_device *lcd_dev;
427 #endif
429 static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
431 /*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/
433 u16 status = bfin_read_PPI_STATUS();
434 bfin_write_PPI_STATUS(0xFFFF);
436 if (status) {
437 bfin_t350mcqb_disable_ppi();
438 disable_dma(CH_PPI);
440 /* start dma */
441 enable_dma(CH_PPI);
442 bfin_t350mcqb_enable_ppi();
443 bfin_write_PPI_STATUS(0xFFFF);
446 return IRQ_HANDLED;
449 static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
451 struct bfin_t350mcqbfb_info *info;
452 struct fb_info *fbinfo;
453 int ret;
455 printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
456 LCD_X_RES, LCD_Y_RES, LCD_BPP);
458 if (request_dma(CH_PPI, "CH_PPI") < 0) {
459 printk(KERN_ERR DRIVER_NAME
460 ": couldn't request CH_PPI DMA\n");
461 ret = -EFAULT;
462 goto out1;
465 fbinfo =
466 framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
467 if (!fbinfo) {
468 ret = -ENOMEM;
469 goto out2;
472 info = fbinfo->par;
473 info->fb = fbinfo;
474 info->dev = &pdev->dev;
476 platform_set_drvdata(pdev, fbinfo);
478 strcpy(fbinfo->fix.id, driver_name);
480 fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
481 fbinfo->fix.type_aux = 0;
482 fbinfo->fix.xpanstep = 0;
483 fbinfo->fix.ypanstep = 0;
484 fbinfo->fix.ywrapstep = 0;
485 fbinfo->fix.accel = FB_ACCEL_NONE;
486 fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
488 fbinfo->var.nonstd = 0;
489 fbinfo->var.activate = FB_ACTIVATE_NOW;
490 fbinfo->var.height = 53;
491 fbinfo->var.width = 70;
492 fbinfo->var.accel_flags = 0;
493 fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
495 fbinfo->var.xres = LCD_X_RES;
496 fbinfo->var.xres_virtual = LCD_X_RES;
497 fbinfo->var.yres = LCD_Y_RES;
498 fbinfo->var.yres_virtual = LCD_Y_RES;
499 fbinfo->var.bits_per_pixel = LCD_BPP;
501 fbinfo->var.red.offset = 0;
502 fbinfo->var.green.offset = 8;
503 fbinfo->var.blue.offset = 16;
504 fbinfo->var.transp.offset = 0;
505 fbinfo->var.red.length = 8;
506 fbinfo->var.green.length = 8;
507 fbinfo->var.blue.length = 8;
508 fbinfo->var.transp.length = 0;
509 fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
511 fbinfo->fix.line_length = fbinfo->var.xres_virtual *
512 fbinfo->var.bits_per_pixel / 8;
515 fbinfo->fbops = &bfin_t350mcqb_fb_ops;
516 fbinfo->flags = FBINFO_FLAG_DEFAULT;
518 info->fb_buffer =
519 dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
520 GFP_KERNEL);
522 if (NULL == info->fb_buffer) {
523 printk(KERN_ERR DRIVER_NAME
524 ": couldn't allocate dma buffer.\n");
525 ret = -ENOMEM;
526 goto out3;
529 fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
530 fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
532 fbinfo->fbops = &bfin_t350mcqb_fb_ops;
534 fbinfo->pseudo_palette = &info->pseudo_pal;
536 if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
537 < 0) {
538 printk(KERN_ERR DRIVER_NAME
539 "Fail to allocate colormap (%d entries)\n",
540 BFIN_LCD_NBR_PALETTE_ENTRIES);
541 ret = -EFAULT;
542 goto out4;
545 if (bfin_t350mcqb_request_ports(1)) {
546 printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
547 ret = -EFAULT;
548 goto out6;
551 info->irq = platform_get_irq(pdev, 0);
552 if (info->irq < 0) {
553 ret = -EINVAL;
554 goto out7;
557 ret = request_irq(info->irq, bfin_t350mcqb_irq_error, IRQF_DISABLED,
558 "PPI ERROR", info);
559 if (ret < 0) {
560 printk(KERN_ERR DRIVER_NAME
561 ": unable to request PPI ERROR IRQ\n");
562 goto out7;
565 if (register_framebuffer(fbinfo) < 0) {
566 printk(KERN_ERR DRIVER_NAME
567 ": unable to register framebuffer.\n");
568 ret = -EINVAL;
569 goto out8;
571 #ifndef NO_BL_SUPPORT
572 bl_dev =
573 backlight_device_register("bf52x-bl", NULL, NULL,
574 &bfin_lq043fb_bl_ops);
575 bl_dev->props.max_brightness = 255;
577 lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
578 lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
579 #endif
581 return 0;
583 out8:
584 free_irq(info->irq, info);
585 out7:
586 bfin_t350mcqb_request_ports(0);
587 out6:
588 fb_dealloc_cmap(&fbinfo->cmap);
589 out4:
590 dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
591 info->dma_handle);
592 out3:
593 framebuffer_release(fbinfo);
594 out2:
595 free_dma(CH_PPI);
596 out1:
597 platform_set_drvdata(pdev, NULL);
599 return ret;
602 static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
605 struct fb_info *fbinfo = platform_get_drvdata(pdev);
606 struct bfin_t350mcqbfb_info *info = fbinfo->par;
608 unregister_framebuffer(fbinfo);
610 free_dma(CH_PPI);
611 free_irq(info->irq, info);
613 if (info->fb_buffer != NULL)
614 dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
615 info->dma_handle);
617 fb_dealloc_cmap(&fbinfo->cmap);
619 #ifndef NO_BL_SUPPORT
620 lcd_device_unregister(lcd_dev);
621 backlight_device_unregister(bl_dev);
622 #endif
624 bfin_t350mcqb_request_ports(0);
626 platform_set_drvdata(pdev, NULL);
627 framebuffer_release(fbinfo);
629 printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
631 return 0;
634 #ifdef CONFIG_PM
635 static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
637 struct fb_info *fbinfo = platform_get_drvdata(pdev);
638 struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
640 if (fbi->lq043_open_cnt) {
641 bfin_t350mcqb_disable_ppi();
642 disable_dma(CH_PPI);
643 bfin_t350mcqb_stop_timers();
644 bfin_write_PPI_STATUS(-1);
648 return 0;
651 static int bfin_t350mcqb_resume(struct platform_device *pdev)
653 struct fb_info *fbinfo = platform_get_drvdata(pdev);
654 struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
656 if (fbi->lq043_open_cnt) {
657 bfin_t350mcqb_config_dma(fbi);
658 bfin_t350mcqb_config_ppi(fbi);
659 bfin_t350mcqb_init_timers();
661 /* start dma */
662 enable_dma(CH_PPI);
663 bfin_t350mcqb_enable_ppi();
664 bfin_t350mcqb_start_timers();
667 return 0;
669 #else
670 #define bfin_t350mcqb_suspend NULL
671 #define bfin_t350mcqb_resume NULL
672 #endif
674 static struct platform_driver bfin_t350mcqb_driver = {
675 .probe = bfin_t350mcqb_probe,
676 .remove = __devexit_p(bfin_t350mcqb_remove),
677 .suspend = bfin_t350mcqb_suspend,
678 .resume = bfin_t350mcqb_resume,
679 .driver = {
680 .name = DRIVER_NAME,
681 .owner = THIS_MODULE,
685 static int __init bfin_t350mcqb_driver_init(void)
687 return platform_driver_register(&bfin_t350mcqb_driver);
690 static void __exit bfin_t350mcqb_driver_cleanup(void)
692 platform_driver_unregister(&bfin_t350mcqb_driver);
695 MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
696 MODULE_LICENSE("GPL");
698 module_init(bfin_t350mcqb_driver_init);
699 module_exit(bfin_t350mcqb_driver_cleanup);