[PATCH] aic7xxx_osm build fix
[cris-mirror.git] / drivers / net / sk_mca.c
blob4c56b8d8221b2b4562bffb1ac68cc78454155707
1 /*
2 net-3-driver for the SKNET MCA-based cards
4 This is an extension to the Linux operating system, and is covered by the
5 same GNU General Public License that covers that work.
7 Copyright 1999 by Alfred Arnold (alfred@ccac.rwth-aachen.de,
8 alfred.arnold@lancom.de)
10 This driver is based both on the 3C523 driver and the SK_G16 driver.
12 paper sources:
13 'PC Hardware: Aufbau, Funktionsweise, Programmierung' by
14 Hans-Peter Messmer for the basic Microchannel stuff
16 'Linux Geraetetreiber' by Allesandro Rubini, Kalle Dalheimer
17 for help on Ethernet driver programming
19 'Ethernet/IEEE 802.3 Family 1992 World Network Data Book/Handbook' by AMD
20 for documentation on the AM7990 LANCE
22 'SKNET Personal Technisches Manual', Version 1.2 by Schneider&Koch
23 for documentation on the Junior board
25 'SK-NET MC2+ Technical Manual", Version 1.1 by Schneider&Koch for
26 documentation on the MC2 bord
28 A big thank you to the S&K support for providing me so quickly with
29 documentation!
31 Also see http://www.syskonnect.com/
33 Missing things:
35 -> set debug level via ioctl instead of compile-time switches
36 -> I didn't follow the development of the 2.1.x kernels, so my
37 assumptions about which things changed with which kernel version
38 are probably nonsense
40 History:
41 May 16th, 1999
42 startup
43 May 22st, 1999
44 added private structure, methods
45 begun building data structures in RAM
46 May 23nd, 1999
47 can receive frames, send frames
48 May 24th, 1999
49 modularized initialization of LANCE
50 loadable as module
51 still Tx problem :-(
52 May 26th, 1999
53 MC2 works
54 support for multiple devices
55 display media type for MC2+
56 May 28th, 1999
57 fixed problem in GetLANCE leaving interrupts turned off
58 increase TX queue to 4 packets to improve send performance
59 May 29th, 1999
60 a few corrections in statistics, caught rcvr overruns
61 reinitialization of LANCE/board in critical situations
62 MCA info implemented
63 implemented LANCE multicast filter
64 Jun 6th, 1999
65 additions for Linux 2.2
66 Dec 25th, 1999
67 unfortunately there seem to be newer MC2+ boards that react
68 on IRQ 3/5/9/10 instead of 3/5/10/11, so we have to autoprobe
69 in questionable cases...
70 Dec 28th, 1999
71 integrated patches from David Weinehall & Bill Wendling for 2.3
72 kernels (isa_...functions). Things are defined in a way that
73 it still works with 2.0.x 8-)
74 Dec 30th, 1999
75 added handling of the remaining interrupt conditions. That
76 should cure the spurious hangs.
77 Jan 30th, 2000
78 newer kernels automatically probe more than one board, so the
79 'startslot' as a variable is also needed here
80 June 1st, 2000
81 added changes for recent 2.3 kernels
83 *************************************************************************/
85 #include <linux/kernel.h>
86 #include <linux/string.h>
87 #include <linux/errno.h>
88 #include <linux/ioport.h>
89 #include <linux/slab.h>
90 #include <linux/interrupt.h>
91 #include <linux/delay.h>
92 #include <linux/time.h>
93 #include <linux/mca-legacy.h>
94 #include <linux/init.h>
95 #include <linux/module.h>
96 #include <linux/version.h>
97 #include <linux/netdevice.h>
98 #include <linux/etherdevice.h>
99 #include <linux/skbuff.h>
100 #include <linux/bitops.h>
102 #include <asm/processor.h>
103 #include <asm/io.h>
105 #define _SK_MCA_DRIVER_
106 #include "sk_mca.h"
108 /* ------------------------------------------------------------------------
109 * global static data - not more since we can handle multiple boards and
110 * have to pack all state info into the device struct!
111 * ------------------------------------------------------------------------ */
113 static char *MediaNames[Media_Count] =
114 { "10Base2", "10BaseT", "10Base5", "Unknown" };
116 static unsigned char poly[] =
117 { 1, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0,
118 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0
121 /* ------------------------------------------------------------------------
122 * private subfunctions
123 * ------------------------------------------------------------------------ */
125 /* dump parts of shared memory - only needed during debugging */
127 #ifdef DEBUG
128 static void dumpmem(struct net_device *dev, u32 start, u32 len)
130 skmca_priv *priv = netdev_priv(dev);
131 int z;
133 for (z = 0; z < len; z++) {
134 if ((z & 15) == 0)
135 printk("%04x:", z);
136 printk(" %02x", readb(priv->base + start + z));
137 if ((z & 15) == 15)
138 printk("\n");
142 /* print exact time - ditto */
144 static void PrTime(void)
146 struct timeval tv;
148 do_gettimeofday(&tv);
149 printk("%9d:%06d: ", tv.tv_sec, tv.tv_usec);
151 #endif
153 /* deduce resources out of POS registers */
155 static void __init getaddrs(int slot, int junior, int *base, int *irq,
156 skmca_medium * medium)
158 u_char pos0, pos1, pos2;
160 if (junior) {
161 pos0 = mca_read_stored_pos(slot, 2);
162 *base = ((pos0 & 0x0e) << 13) + 0xc0000;
163 *irq = ((pos0 & 0x10) >> 4) + 10;
164 *medium = Media_Unknown;
165 } else {
166 /* reset POS 104 Bits 0+1 so the shared memory region goes to the
167 configured area between 640K and 1M. Afterwards, enable the MC2.
168 I really don't know what rode SK to do this... */
170 mca_write_pos(slot, 4,
171 mca_read_stored_pos(slot, 4) & 0xfc);
172 mca_write_pos(slot, 2,
173 mca_read_stored_pos(slot, 2) | 0x01);
175 pos1 = mca_read_stored_pos(slot, 3);
176 pos2 = mca_read_stored_pos(slot, 4);
177 *base = ((pos1 & 0x07) << 14) + 0xc0000;
178 switch (pos2 & 0x0c) {
179 case 0:
180 *irq = 3;
181 break;
182 case 4:
183 *irq = 5;
184 break;
185 case 8:
186 *irq = -10;
187 break;
188 case 12:
189 *irq = -11;
190 break;
192 *medium = (pos2 >> 6) & 3;
196 /* check for both cards:
197 When the MC2 is turned off, it was configured for more than 15MB RAM,
198 is disabled and won't get detected using the standard probe. We
199 therefore have to scan the slots manually :-( */
201 static int __init dofind(int *junior, int firstslot)
203 int slot;
204 unsigned int id;
206 for (slot = firstslot; slot < MCA_MAX_SLOT_NR; slot++) {
207 id = mca_read_stored_pos(slot, 0)
208 + (((unsigned int) mca_read_stored_pos(slot, 1)) << 8);
210 *junior = 0;
211 if (id == SKNET_MCA_ID)
212 return slot;
213 *junior = 1;
214 if (id == SKNET_JUNIOR_MCA_ID)
215 return slot;
217 return MCA_NOTFOUND;
220 /* reset the whole board */
222 static void ResetBoard(struct net_device *dev)
224 skmca_priv *priv = netdev_priv(dev);
226 writeb(CTRL_RESET_ON, priv->ctrladdr);
227 udelay(10);
228 writeb(CTRL_RESET_OFF, priv->ctrladdr);
231 /* wait for LANCE interface to become not busy */
233 static int WaitLANCE(struct net_device *dev)
235 skmca_priv *priv = netdev_priv(dev);
236 int t = 0;
238 while ((readb(priv->ctrladdr) & STAT_IO_BUSY) ==
239 STAT_IO_BUSY) {
240 udelay(1);
241 if (++t > 1000) {
242 printk("%s: LANCE access timeout", dev->name);
243 return 0;
247 return 1;
250 /* set LANCE register - must be atomic */
252 static void SetLANCE(struct net_device *dev, u16 addr, u16 value)
254 skmca_priv *priv = netdev_priv(dev);
255 unsigned long flags;
257 /* disable interrupts */
259 spin_lock_irqsave(&priv->lock, flags);
261 /* wait until no transfer is pending */
263 WaitLANCE(dev);
265 /* transfer register address to RAP */
267 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_RAP, priv->ctrladdr);
268 writew(addr, priv->ioregaddr);
269 writeb(IOCMD_GO, priv->cmdaddr);
270 udelay(1);
271 WaitLANCE(dev);
273 /* transfer data to register */
275 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_DATA, priv->ctrladdr);
276 writew(value, priv->ioregaddr);
277 writeb(IOCMD_GO, priv->cmdaddr);
278 udelay(1);
279 WaitLANCE(dev);
281 /* reenable interrupts */
283 spin_unlock_irqrestore(&priv->lock, flags);
286 /* get LANCE register */
288 static u16 GetLANCE(struct net_device *dev, u16 addr)
290 skmca_priv *priv = netdev_priv(dev);
291 unsigned long flags;
292 unsigned int res;
294 /* disable interrupts */
296 spin_lock_irqsave(&priv->lock, flags);
298 /* wait until no transfer is pending */
300 WaitLANCE(dev);
302 /* transfer register address to RAP */
304 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_RAP, priv->ctrladdr);
305 writew(addr, priv->ioregaddr);
306 writeb(IOCMD_GO, priv->cmdaddr);
307 udelay(1);
308 WaitLANCE(dev);
310 /* transfer data from register */
312 writeb(CTRL_RESET_OFF | CTRL_RW_READ | CTRL_ADR_DATA, priv->ctrladdr);
313 writeb(IOCMD_GO, priv->cmdaddr);
314 udelay(1);
315 WaitLANCE(dev);
316 res = readw(priv->ioregaddr);
318 /* reenable interrupts */
320 spin_unlock_irqrestore(&priv->lock, flags);
322 return res;
325 /* build up descriptors in shared RAM */
327 static void InitDscrs(struct net_device *dev)
329 skmca_priv *priv = netdev_priv(dev);
330 u32 bufaddr;
332 /* Set up Tx descriptors. The board has only 16K RAM so bits 16..23
333 are always 0. */
335 bufaddr = RAM_DATABASE;
337 LANCE_TxDescr descr;
338 int z;
340 for (z = 0; z < TXCOUNT; z++) {
341 descr.LowAddr = bufaddr;
342 descr.Flags = 0;
343 descr.Len = 0xf000;
344 descr.Status = 0;
345 memcpy_toio(priv->base + RAM_TXBASE +
346 (z * sizeof(LANCE_TxDescr)), &descr,
347 sizeof(LANCE_TxDescr));
348 memset_io(priv->base + bufaddr, 0, RAM_BUFSIZE);
349 bufaddr += RAM_BUFSIZE;
353 /* do the same for the Rx descriptors */
356 LANCE_RxDescr descr;
357 int z;
359 for (z = 0; z < RXCOUNT; z++) {
360 descr.LowAddr = bufaddr;
361 descr.Flags = RXDSCR_FLAGS_OWN;
362 descr.MaxLen = -RAM_BUFSIZE;
363 descr.Len = 0;
364 memcpy_toio(priv->base + RAM_RXBASE +
365 (z * sizeof(LANCE_RxDescr)), &descr,
366 sizeof(LANCE_RxDescr));
367 memset_io(priv->base + bufaddr, 0, RAM_BUFSIZE);
368 bufaddr += RAM_BUFSIZE;
373 /* calculate the hash bit position for a given multicast address
374 taken more or less directly from the AMD datasheet... */
376 static void UpdateCRC(unsigned char *CRC, int bit)
378 int j;
380 /* shift CRC one bit */
382 memmove(CRC + 1, CRC, 32 * sizeof(unsigned char));
383 CRC[0] = 0;
385 /* if bit XOR controlbit = 1, set CRC = CRC XOR polynomial */
387 if (bit ^ CRC[32])
388 for (j = 0; j < 32; j++)
389 CRC[j] ^= poly[j];
392 static unsigned int GetHash(char *address)
394 unsigned char CRC[33];
395 int i, byte, hashcode;
397 /* a multicast address has bit 0 in the first byte set */
399 if ((address[0] & 1) == 0)
400 return -1;
402 /* initialize CRC */
404 memset(CRC, 1, sizeof(CRC));
406 /* loop through address bits */
408 for (byte = 0; byte < 6; byte++)
409 for (i = 0; i < 8; i++)
410 UpdateCRC(CRC, (address[byte] >> i) & 1);
412 /* hashcode is the 6 least significant bits of the CRC */
414 hashcode = 0;
415 for (i = 0; i < 6; i++)
416 hashcode = (hashcode << 1) + CRC[i];
417 return hashcode;
420 /* feed ready-built initialization block into LANCE */
422 static void InitLANCE(struct net_device *dev)
424 skmca_priv *priv = netdev_priv(dev);
426 /* build up descriptors. */
428 InitDscrs(dev);
430 /* next RX descriptor to be read is the first one. Since the LANCE
431 will start from the beginning after initialization, we have to
432 reset out pointers too. */
434 priv->nextrx = 0;
436 /* no TX descriptors active */
438 priv->nexttxput = priv->nexttxdone = priv->txbusy = 0;
440 /* set up the LANCE bus control register - constant for SKnet boards */
442 SetLANCE(dev, LANCE_CSR3,
443 CSR3_BSWAP_OFF | CSR3_ALE_LOW | CSR3_BCON_HOLD);
445 /* write address of initialization block into LANCE */
447 SetLANCE(dev, LANCE_CSR1, RAM_INITBASE & 0xffff);
448 SetLANCE(dev, LANCE_CSR2, (RAM_INITBASE >> 16) & 0xff);
450 /* we don't get ready until the LANCE has read the init block */
452 netif_stop_queue(dev);
454 /* let LANCE read the initialization block. LANCE is ready
455 when we receive the corresponding interrupt. */
457 SetLANCE(dev, LANCE_CSR0, CSR0_INEA | CSR0_INIT);
460 /* stop the LANCE so we can reinitialize it */
462 static void StopLANCE(struct net_device *dev)
464 /* can't take frames any more */
466 netif_stop_queue(dev);
468 /* disable interrupts, stop it */
470 SetLANCE(dev, LANCE_CSR0, CSR0_STOP);
473 /* initialize card and LANCE for proper operation */
475 static void InitBoard(struct net_device *dev)
477 skmca_priv *priv = netdev_priv(dev);
478 LANCE_InitBlock block;
480 /* Lay out the shared RAM - first we create the init block for the LANCE.
481 We do not overwrite it later because we need it again when we switch
482 promiscous mode on/off. */
484 block.Mode = 0;
485 if (dev->flags & IFF_PROMISC)
486 block.Mode |= LANCE_INIT_PROM;
487 memcpy(block.PAdr, dev->dev_addr, 6);
488 memset(block.LAdrF, 0, sizeof(block.LAdrF));
489 block.RdrP = (RAM_RXBASE & 0xffffff) | (LRXCOUNT << 29);
490 block.TdrP = (RAM_TXBASE & 0xffffff) | (LTXCOUNT << 29);
492 memcpy_toio(priv->base + RAM_INITBASE, &block, sizeof(block));
494 /* initialize LANCE. Implicitly sets up other structures in RAM. */
496 InitLANCE(dev);
499 /* deinitialize card and LANCE */
501 static void DeinitBoard(struct net_device *dev)
503 /* stop LANCE */
505 StopLANCE(dev);
507 /* reset board */
509 ResetBoard(dev);
512 /* probe for device's irq */
514 static int __init ProbeIRQ(struct net_device *dev)
516 unsigned long imaskval, njiffies, irq;
517 u16 csr0val;
519 /* enable all interrupts */
521 imaskval = probe_irq_on();
523 /* initialize the board. Wait for interrupt 'Initialization done'. */
525 ResetBoard(dev);
526 InitBoard(dev);
528 njiffies = jiffies + HZ;
529 do {
530 csr0val = GetLANCE(dev, LANCE_CSR0);
532 while (((csr0val & CSR0_IDON) == 0) && (jiffies != njiffies));
534 /* turn of interrupts again */
536 irq = probe_irq_off(imaskval);
538 /* if we found something, ack the interrupt */
540 if (irq)
541 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_IDON);
543 /* back to idle state */
545 DeinitBoard(dev);
547 return irq;
550 /* ------------------------------------------------------------------------
551 * interrupt handler(s)
552 * ------------------------------------------------------------------------ */
554 /* LANCE has read initialization block -> start it */
556 static u16 irqstart_handler(struct net_device *dev, u16 oldcsr0)
558 /* now we're ready to transmit */
560 netif_wake_queue(dev);
562 /* reset IDON bit, start LANCE */
564 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_IDON | CSR0_STRT);
565 return GetLANCE(dev, LANCE_CSR0);
568 /* did we lose blocks due to a FIFO overrun ? */
570 static u16 irqmiss_handler(struct net_device *dev, u16 oldcsr0)
572 skmca_priv *priv = netdev_priv(dev);
574 /* update statistics */
576 priv->stat.rx_fifo_errors++;
578 /* reset MISS bit */
580 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_MISS);
581 return GetLANCE(dev, LANCE_CSR0);
584 /* receive interrupt */
586 static u16 irqrx_handler(struct net_device *dev, u16 oldcsr0)
588 skmca_priv *priv = netdev_priv(dev);
589 LANCE_RxDescr descr;
590 unsigned int descraddr;
592 /* run through queue until we reach a descriptor we do not own */
594 descraddr = RAM_RXBASE + (priv->nextrx * sizeof(LANCE_RxDescr));
595 while (1) {
596 /* read descriptor */
597 memcpy_fromio(&descr, priv->base + descraddr,
598 sizeof(LANCE_RxDescr));
600 /* if we reach a descriptor we do not own, we're done */
601 if ((descr.Flags & RXDSCR_FLAGS_OWN) != 0)
602 break;
604 #ifdef DEBUG
605 PrTime();
606 printk("Receive packet on descr %d len %d\n", priv->nextrx,
607 descr.Len);
608 #endif
610 /* erroneous packet ? */
611 if ((descr.Flags & RXDSCR_FLAGS_ERR) != 0) {
612 priv->stat.rx_errors++;
613 if ((descr.Flags & RXDSCR_FLAGS_CRC) != 0)
614 priv->stat.rx_crc_errors++;
615 else if ((descr.Flags & RXDSCR_FLAGS_CRC) != 0)
616 priv->stat.rx_frame_errors++;
617 else if ((descr.Flags & RXDSCR_FLAGS_OFLO) != 0)
618 priv->stat.rx_fifo_errors++;
621 /* good packet ? */
622 else {
623 struct sk_buff *skb;
625 skb = dev_alloc_skb(descr.Len + 2);
626 if (skb == NULL)
627 priv->stat.rx_dropped++;
628 else {
629 memcpy_fromio(skb_put(skb, descr.Len),
630 priv->base +
631 descr.LowAddr, descr.Len);
632 skb->dev = dev;
633 skb->protocol = eth_type_trans(skb, dev);
634 skb->ip_summed = CHECKSUM_NONE;
635 priv->stat.rx_packets++;
636 priv->stat.rx_bytes += descr.Len;
637 netif_rx(skb);
638 dev->last_rx = jiffies;
642 /* give descriptor back to LANCE */
643 descr.Len = 0;
644 descr.Flags |= RXDSCR_FLAGS_OWN;
646 /* update descriptor in shared RAM */
647 memcpy_toio(priv->base + descraddr, &descr,
648 sizeof(LANCE_RxDescr));
650 /* go to next descriptor */
651 priv->nextrx++;
652 descraddr += sizeof(LANCE_RxDescr);
653 if (priv->nextrx >= RXCOUNT) {
654 priv->nextrx = 0;
655 descraddr = RAM_RXBASE;
659 /* reset RINT bit */
661 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_RINT);
662 return GetLANCE(dev, LANCE_CSR0);
665 /* transmit interrupt */
667 static u16 irqtx_handler(struct net_device *dev, u16 oldcsr0)
669 skmca_priv *priv = netdev_priv(dev);
670 LANCE_TxDescr descr;
671 unsigned int descraddr;
673 /* check descriptors at most until no busy one is left */
675 descraddr =
676 RAM_TXBASE + (priv->nexttxdone * sizeof(LANCE_TxDescr));
677 while (priv->txbusy > 0) {
678 /* read descriptor */
679 memcpy_fromio(&descr, priv->base + descraddr,
680 sizeof(LANCE_TxDescr));
682 /* if the LANCE still owns this one, we've worked out all sent packets */
683 if ((descr.Flags & TXDSCR_FLAGS_OWN) != 0)
684 break;
686 #ifdef DEBUG
687 PrTime();
688 printk("Send packet done on descr %d\n", priv->nexttxdone);
689 #endif
691 /* update statistics */
692 if ((descr.Flags & TXDSCR_FLAGS_ERR) == 0) {
693 priv->stat.tx_packets++;
694 priv->stat.tx_bytes++;
695 } else {
696 priv->stat.tx_errors++;
697 if ((descr.Status & TXDSCR_STATUS_UFLO) != 0) {
698 priv->stat.tx_fifo_errors++;
699 InitLANCE(dev);
701 else
702 if ((descr.Status & TXDSCR_STATUS_LCOL) !=
703 0) priv->stat.tx_window_errors++;
704 else if ((descr.Status & TXDSCR_STATUS_LCAR) != 0)
705 priv->stat.tx_carrier_errors++;
706 else if ((descr.Status & TXDSCR_STATUS_RTRY) != 0)
707 priv->stat.tx_aborted_errors++;
710 /* go to next descriptor */
711 priv->nexttxdone++;
712 descraddr += sizeof(LANCE_TxDescr);
713 if (priv->nexttxdone >= TXCOUNT) {
714 priv->nexttxdone = 0;
715 descraddr = RAM_TXBASE;
717 priv->txbusy--;
720 /* reset TX interrupt bit */
722 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_TINT);
723 oldcsr0 = GetLANCE(dev, LANCE_CSR0);
725 /* at least one descriptor is freed. Therefore we can accept
726 a new one */
727 /* inform upper layers we're in business again */
729 netif_wake_queue(dev);
731 return oldcsr0;
734 /* general interrupt entry */
736 static irqreturn_t irq_handler(int irq, void *device, struct pt_regs *regs)
738 struct net_device *dev = (struct net_device *) device;
739 u16 csr0val;
741 /* read CSR0 to get interrupt cause */
743 csr0val = GetLANCE(dev, LANCE_CSR0);
745 /* in case we're not meant... */
747 if ((csr0val & CSR0_INTR) == 0)
748 return IRQ_NONE;
750 #if 0
751 set_bit(LINK_STATE_RXSEM, &dev->state);
752 #endif
754 /* loop through the interrupt bits until everything is clear */
756 do {
757 if ((csr0val & CSR0_IDON) != 0)
758 csr0val = irqstart_handler(dev, csr0val);
759 if ((csr0val & CSR0_RINT) != 0)
760 csr0val = irqrx_handler(dev, csr0val);
761 if ((csr0val & CSR0_MISS) != 0)
762 csr0val = irqmiss_handler(dev, csr0val);
763 if ((csr0val & CSR0_TINT) != 0)
764 csr0val = irqtx_handler(dev, csr0val);
765 if ((csr0val & CSR0_MERR) != 0) {
766 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_MERR);
767 csr0val = GetLANCE(dev, LANCE_CSR0);
769 if ((csr0val & CSR0_BABL) != 0) {
770 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_BABL);
771 csr0val = GetLANCE(dev, LANCE_CSR0);
774 while ((csr0val & CSR0_INTR) != 0);
776 #if 0
777 clear_bit(LINK_STATE_RXSEM, &dev->state);
778 #endif
779 return IRQ_HANDLED;
782 /* ------------------------------------------------------------------------
783 * driver methods
784 * ------------------------------------------------------------------------ */
786 /* MCA info */
788 static int skmca_getinfo(char *buf, int slot, void *d)
790 int len = 0, i;
791 struct net_device *dev = (struct net_device *) d;
792 skmca_priv *priv;
794 /* can't say anything about an uninitialized device... */
796 if (dev == NULL)
797 return len;
798 priv = netdev_priv(dev);
800 /* print info */
802 len += sprintf(buf + len, "IRQ: %d\n", priv->realirq);
803 len += sprintf(buf + len, "Memory: %#lx-%#lx\n", dev->mem_start,
804 dev->mem_end - 1);
805 len +=
806 sprintf(buf + len, "Transceiver: %s\n",
807 MediaNames[priv->medium]);
808 len += sprintf(buf + len, "Device: %s\n", dev->name);
809 len += sprintf(buf + len, "MAC address:");
810 for (i = 0; i < 6; i++)
811 len += sprintf(buf + len, " %02x", dev->dev_addr[i]);
812 buf[len++] = '\n';
813 buf[len] = 0;
815 return len;
818 /* open driver. Means also initialization and start of LANCE */
820 static int skmca_open(struct net_device *dev)
822 int result;
823 skmca_priv *priv = netdev_priv(dev);
825 /* register resources - only necessary for IRQ */
826 result =
827 request_irq(priv->realirq, irq_handler,
828 SA_SHIRQ | SA_SAMPLE_RANDOM, "sk_mca", dev);
829 if (result != 0) {
830 printk("%s: failed to register irq %d\n", dev->name,
831 dev->irq);
832 return result;
834 dev->irq = priv->realirq;
836 /* set up the card and LANCE */
838 InitBoard(dev);
840 /* set up flags */
842 netif_start_queue(dev);
844 return 0;
847 /* close driver. Shut down board and free allocated resources */
849 static int skmca_close(struct net_device *dev)
851 /* turn off board */
852 DeinitBoard(dev);
854 /* release resources */
855 if (dev->irq != 0)
856 free_irq(dev->irq, dev);
857 dev->irq = 0;
859 return 0;
862 /* transmit a block. */
864 static int skmca_tx(struct sk_buff *skb, struct net_device *dev)
866 skmca_priv *priv = netdev_priv(dev);
867 LANCE_TxDescr descr;
868 unsigned int address;
869 int tmplen, retval = 0;
870 unsigned long flags;
872 /* if we get called with a NULL descriptor, the Ethernet layer thinks
873 our card is stuck an we should reset it. We'll do this completely: */
875 if (skb == NULL) {
876 DeinitBoard(dev);
877 InitBoard(dev);
878 return 0; /* don't try to free the block here ;-) */
881 /* is there space in the Tx queue ? If no, the upper layer gave us a
882 packet in spite of us not being ready and is really in trouble.
883 We'll do the dropping for him: */
884 if (priv->txbusy >= TXCOUNT) {
885 priv->stat.tx_dropped++;
886 retval = -EIO;
887 goto tx_done;
890 /* get TX descriptor */
891 address = RAM_TXBASE + (priv->nexttxput * sizeof(LANCE_TxDescr));
892 memcpy_fromio(&descr, priv->base + address, sizeof(LANCE_TxDescr));
894 /* enter packet length as 2s complement - assure minimum length */
895 tmplen = skb->len;
896 if (tmplen < 60)
897 tmplen = 60;
898 descr.Len = 65536 - tmplen;
900 /* copy filler into RAM - in case we're filling up...
901 we're filling a bit more than necessary, but that doesn't harm
902 since the buffer is far larger... */
903 if (tmplen > skb->len) {
904 char *fill = "NetBSD is a nice OS too! ";
905 unsigned int destoffs = 0, l = strlen(fill);
907 while (destoffs < tmplen) {
908 memcpy_toio(priv->base + descr.LowAddr +
909 destoffs, fill, l);
910 destoffs += l;
914 /* do the real data copying */
915 memcpy_toio(priv->base + descr.LowAddr, skb->data, skb->len);
917 /* hand descriptor over to LANCE - this is the first and last chunk */
918 descr.Flags =
919 TXDSCR_FLAGS_OWN | TXDSCR_FLAGS_STP | TXDSCR_FLAGS_ENP;
921 #ifdef DEBUG
922 PrTime();
923 printk("Send packet on descr %d len %d\n", priv->nexttxput,
924 skb->len);
925 #endif
927 /* one more descriptor busy */
929 spin_lock_irqsave(&priv->lock, flags);
931 priv->nexttxput++;
932 if (priv->nexttxput >= TXCOUNT)
933 priv->nexttxput = 0;
934 priv->txbusy++;
936 /* are we saturated ? */
938 if (priv->txbusy >= TXCOUNT)
939 netif_stop_queue(dev);
941 /* write descriptor back to RAM */
942 memcpy_toio(priv->base + address, &descr, sizeof(LANCE_TxDescr));
944 /* if no descriptors were active, give the LANCE a hint to read it
945 immediately */
947 if (priv->txbusy == 0)
948 SetLANCE(dev, LANCE_CSR0, CSR0_INEA | CSR0_TDMD);
950 spin_unlock_irqrestore(&priv->lock, flags);
952 tx_done:
954 dev_kfree_skb(skb);
956 return retval;
959 /* return pointer to Ethernet statistics */
961 static struct net_device_stats *skmca_stats(struct net_device *dev)
963 skmca_priv *priv = netdev_priv(dev);
965 return &(priv->stat);
968 /* switch receiver mode. We use the LANCE's multicast filter to prefilter
969 multicast addresses. */
971 static void skmca_set_multicast_list(struct net_device *dev)
973 skmca_priv *priv = netdev_priv(dev);
974 LANCE_InitBlock block;
976 /* first stop the LANCE... */
977 StopLANCE(dev);
979 /* ...then modify the initialization block... */
980 memcpy_fromio(&block, priv->base + RAM_INITBASE, sizeof(block));
981 if (dev->flags & IFF_PROMISC)
982 block.Mode |= LANCE_INIT_PROM;
983 else
984 block.Mode &= ~LANCE_INIT_PROM;
986 if (dev->flags & IFF_ALLMULTI) { /* get all multicasts */
987 memset(block.LAdrF, 0xff, sizeof(block.LAdrF));
988 } else { /* get selected/no multicasts */
990 struct dev_mc_list *mptr;
991 int code;
993 memset(block.LAdrF, 0, sizeof(block.LAdrF));
994 for (mptr = dev->mc_list; mptr != NULL; mptr = mptr->next) {
995 code = GetHash(mptr->dmi_addr);
996 block.LAdrF[(code >> 3) & 7] |= 1 << (code & 7);
1000 memcpy_toio(priv->base + RAM_INITBASE, &block, sizeof(block));
1002 /* ...then reinit LANCE with the correct flags */
1003 InitLANCE(dev);
1006 /* ------------------------------------------------------------------------
1007 * hardware check
1008 * ------------------------------------------------------------------------ */
1010 static int startslot; /* counts through slots when probing multiple devices */
1012 static void cleanup_card(struct net_device *dev)
1014 skmca_priv *priv = netdev_priv(dev);
1015 DeinitBoard(dev);
1016 if (dev->irq != 0)
1017 free_irq(dev->irq, dev);
1018 iounmap(priv->base);
1019 mca_mark_as_unused(priv->slot);
1020 mca_set_adapter_procfn(priv->slot, NULL, NULL);
1023 struct net_device * __init skmca_probe(int unit)
1025 struct net_device *dev;
1026 int force_detect = 0;
1027 int junior, slot, i;
1028 int base = 0, irq = 0;
1029 skmca_priv *priv;
1030 skmca_medium medium;
1031 int err;
1033 /* can't work without an MCA bus ;-) */
1035 if (MCA_bus == 0)
1036 return ERR_PTR(-ENODEV);
1038 dev = alloc_etherdev(sizeof(skmca_priv));
1039 if (!dev)
1040 return ERR_PTR(-ENOMEM);
1042 if (unit >= 0) {
1043 sprintf(dev->name, "eth%d", unit);
1044 netdev_boot_setup_check(dev);
1047 SET_MODULE_OWNER(dev);
1049 /* start address of 1 --> forced detection */
1051 if (dev->mem_start == 1)
1052 force_detect = 1;
1054 /* search through slots */
1056 base = dev->mem_start;
1057 irq = dev->base_addr;
1058 for (slot = startslot; (slot = dofind(&junior, slot)) != -1; slot++) {
1059 /* deduce card addresses */
1061 getaddrs(slot, junior, &base, &irq, &medium);
1063 /* slot already in use ? */
1065 if (mca_is_adapter_used(slot))
1066 continue;
1068 /* were we looking for something different ? */
1070 if (dev->irq && dev->irq != irq)
1071 continue;
1072 if (dev->mem_start && dev->mem_start != base)
1073 continue;
1075 /* found something that matches */
1077 break;
1080 /* nothing found ? */
1082 if (slot == -1) {
1083 free_netdev(dev);
1084 return (base || irq) ? ERR_PTR(-ENXIO) : ERR_PTR(-ENODEV);
1087 /* make procfs entries */
1089 if (junior)
1090 mca_set_adapter_name(slot,
1091 "SKNET junior MC2 Ethernet Adapter");
1092 else
1093 mca_set_adapter_name(slot, "SKNET MC2+ Ethernet Adapter");
1094 mca_set_adapter_procfn(slot, (MCA_ProcFn) skmca_getinfo, dev);
1096 mca_mark_as_used(slot);
1098 /* announce success */
1099 printk("%s: SKNet %s adapter found in slot %d\n", dev->name,
1100 junior ? "Junior MC2" : "MC2+", slot + 1);
1102 priv = netdev_priv(dev);
1103 priv->base = ioremap(base, 0x4000);
1104 if (!priv->base) {
1105 mca_set_adapter_procfn(slot, NULL, NULL);
1106 mca_mark_as_unused(slot);
1107 free_netdev(dev);
1108 return ERR_PTR(-ENOMEM);
1111 priv->slot = slot;
1112 priv->macbase = priv->base + 0x3fc0;
1113 priv->ioregaddr = priv->base + 0x3ff0;
1114 priv->ctrladdr = priv->base + 0x3ff2;
1115 priv->cmdaddr = priv->base + 0x3ff3;
1116 priv->medium = medium;
1117 memset(&priv->stat, 0, sizeof(struct net_device_stats));
1118 spin_lock_init(&priv->lock);
1120 /* set base + irq for this device (irq not allocated so far) */
1121 dev->irq = 0;
1122 dev->mem_start = base;
1123 dev->mem_end = base + 0x4000;
1125 /* autoprobe ? */
1126 if (irq < 0) {
1127 int nirq;
1129 printk
1130 ("%s: ambigous POS bit combination, must probe for IRQ...\n",
1131 dev->name);
1132 nirq = ProbeIRQ(dev);
1133 if (nirq <= 0)
1134 printk("%s: IRQ probe failed, assuming IRQ %d",
1135 dev->name, priv->realirq = -irq);
1136 else
1137 priv->realirq = nirq;
1138 } else
1139 priv->realirq = irq;
1141 /* set methods */
1142 dev->open = skmca_open;
1143 dev->stop = skmca_close;
1144 dev->hard_start_xmit = skmca_tx;
1145 dev->do_ioctl = NULL;
1146 dev->get_stats = skmca_stats;
1147 dev->set_multicast_list = skmca_set_multicast_list;
1148 dev->flags |= IFF_MULTICAST;
1150 /* copy out MAC address */
1151 for (i = 0; i < 6; i++)
1152 dev->dev_addr[i] = readb(priv->macbase + (i << 1));
1154 /* print config */
1155 printk("%s: IRQ %d, memory %#lx-%#lx, "
1156 "MAC address %02x:%02x:%02x:%02x:%02x:%02x.\n",
1157 dev->name, priv->realirq, dev->mem_start, dev->mem_end - 1,
1158 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1159 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1160 printk("%s: %s medium\n", dev->name, MediaNames[priv->medium]);
1162 /* reset board */
1164 ResetBoard(dev);
1166 startslot = slot + 1;
1168 err = register_netdev(dev);
1169 if (err) {
1170 cleanup_card(dev);
1171 free_netdev(dev);
1172 dev = ERR_PTR(err);
1174 return dev;
1177 /* ------------------------------------------------------------------------
1178 * modularization support
1179 * ------------------------------------------------------------------------ */
1181 #ifdef MODULE
1182 MODULE_LICENSE("GPL");
1184 #define DEVMAX 5
1186 static struct net_device *moddevs[DEVMAX];
1188 int init_module(void)
1190 int z;
1192 startslot = 0;
1193 for (z = 0; z < DEVMAX; z++) {
1194 struct net_device *dev = skmca_probe(-1);
1195 if (IS_ERR(dev))
1196 break;
1197 moddevs[z] = dev;
1199 if (!z)
1200 return -EIO;
1201 return 0;
1204 void cleanup_module(void)
1206 int z;
1208 for (z = 0; z < DEVMAX; z++) {
1209 struct net_device *dev = moddevs[z];
1210 if (dev) {
1211 unregister_netdev(dev);
1212 cleanup_card(dev);
1213 free_netdev(dev);
1217 #endif /* MODULE */