drivers/video/chipsfb.c

   1 /*
   2  *  drivers/video/chipsfb.c -- frame buffer device for
   3  *  Chips & Technologies 65550 chip.
   4  *
   5  *  Copyright (C) 1998-2002 Paul Mackerras
   6  *
   7  *  This file is derived from the Powermac "chips" driver:
   8  *  Copyright (C) 1997 Fabio Riccardi.
   9  *  And from the frame buffer device for Open Firmware-initialized devices:
  10  *  Copyright (C) 1997 Geert Uytterhoeven.
  11  *
  12  *  This file is subject to the terms and conditions of the GNU General Public
  13  *  License. See the file COPYING in the main directory of this archive for
  14  *  more details.
  15  */
  16
  17 #include <linux/config.h>
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/tty.h>
  24 #include <linux/slab.h>
  25 #include <linux/vmalloc.h>
  26 #include <linux/delay.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/fb.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <asm/io.h>
  32
  33 #ifdef CONFIG_PMAC_BACKLIGHT
  34 #include <asm/backlight.h>
  35 #endif
  36 #ifdef CONFIG_PMAC_PBOOK
  37 #include <linux/adb.h>
  38 #include <linux/pmu.h>
  39 #endif
  40
  41 /*
  42  * Since we access the display with inb/outb to fixed port numbers,
  43  * we can only handle one 6555x chip.  -- paulus
  44  */
  45 static struct fb_info chipsfb_info;
  46
  47 #define write_ind(num, val, ap, dp)     do { \
  48         outb((num), (ap)); outb((val), (dp)); \
  49 } while (0)
  50 #define read_ind(num, var, ap, dp)      do { \
  51         outb((num), (ap)); var = inb((dp)); \
  52 } while (0)
  53
  54 /* extension registers */
  55 #define write_xr(num, val)      write_ind(num, val, 0x3d6, 0x3d7)
  56 #define read_xr(num, var)       read_ind(num, var, 0x3d6, 0x3d7)
  57 /* flat panel registers */
  58 #define write_fr(num, val)      write_ind(num, val, 0x3d0, 0x3d1)
  59 #define read_fr(num, var)       read_ind(num, var, 0x3d0, 0x3d1)
  60 /* CRTC registers */
  61 #define write_cr(num, val)      write_ind(num, val, 0x3d4, 0x3d5)
  62 #define read_cr(num, var)       read_ind(num, var, 0x3d4, 0x3d5)
  63 /* graphics registers */
  64 #define write_gr(num, val)      write_ind(num, val, 0x3ce, 0x3cf)
  65 #define read_gr(num, var)       read_ind(num, var, 0x3ce, 0x3cf)
  66 /* sequencer registers */
  67 #define write_sr(num, val)      write_ind(num, val, 0x3c4, 0x3c5)
  68 #define read_sr(num, var)       read_ind(num, var, 0x3c4, 0x3c5)
  69 /* attribute registers - slightly strange */
  70 #define write_ar(num, val)      do { \
  71         inb(0x3da); write_ind(num, val, 0x3c0, 0x3c0); \
  72 } while (0)
  73 #define read_ar(num, var)       do { \
  74         inb(0x3da); read_ind(num, var, 0x3c0, 0x3c1); \
  75 } while (0)
  76
  77 #ifdef CONFIG_PMAC_PBOOK
  78 static unsigned char *save_framebuffer;
  79 int chips_sleep_notify(struct pmu_sleep_notifier *self, int when);
  80 static struct pmu_sleep_notifier chips_sleep_notifier = {
  81         chips_sleep_notify, SLEEP_LEVEL_VIDEO,
  82 };
  83 #endif
  84
  85 /*
  86  * Exported functions
  87  */
  88 int chips_init(void);
  89
  90 static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *);
  91 static int chipsfb_check_var(struct fb_var_screeninfo *var,
  92                              struct fb_info *info);
  93 static int chipsfb_set_par(struct fb_info *info);
  94 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  95                              u_int transp, struct fb_info *info);
  96 static int chipsfb_blank(int blank, struct fb_info *info);
  97
  98 static struct fb_ops chipsfb_ops = {
  99         .owner          = THIS_MODULE,
 100         .fb_check_var   = chipsfb_check_var,
 101         .fb_set_par     = chipsfb_set_par,
 102         .fb_setcolreg   = chipsfb_setcolreg,
 103         .fb_blank       = chipsfb_blank,
 104         .fb_fillrect    = cfb_fillrect,
 105         .fb_copyarea    = cfb_copyarea,
 106         .fb_imageblit   = cfb_imageblit,
 107         .fb_cursor      = soft_cursor,
 108 };
 109
 110 static int chipsfb_check_var(struct fb_var_screeninfo *var,
 111                              struct fb_info *info)
 112 {
 113         if (var->xres > 800 || var->yres > 600
 114             || var->xres_virtual > 800 || var->yres_virtual > 600
 115             || (var->bits_per_pixel != 8 && var->bits_per_pixel != 16)
 116             || var->nonstd
 117             || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
 118                 return -EINVAL;
 119
 120         var->xres = var->xres_virtual = 800;
 121         var->yres = var->yres_virtual = 600;
 122
 123         return 0;
 124 }
 125
 126 static int chipsfb_set_par(struct fb_info *info)
 127 {
 128         if (info->var.bits_per_pixel == 16) {
 129                 write_cr(0x13, 200);            // Set line length (doublewords)
 130                 write_xr(0x81, 0x14);           // 15 bit (555) color mode
 131                 write_xr(0x82, 0x00);           // Disable palettes
 132                 write_xr(0x20, 0x10);           // 16 bit blitter mode
 133
 134                 info->fix.line_length = 800*2;
 135                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 136
 137                 info->var.red.offset = 10;
 138                 info->var.green.offset = 5;
 139                 info->var.blue.offset = 0;
 140                 info->var.red.length = info->var.green.length =
 141                         info->var.blue.length = 5;
 142
 143         } else {
 144                 /* p->var.bits_per_pixel == 8 */
 145                 write_cr(0x13, 100);            // Set line length (doublewords)
 146                 write_xr(0x81, 0x12);           // 8 bit color mode
 147                 write_xr(0x82, 0x08);           // Graphics gamma enable
 148                 write_xr(0x20, 0x00);           // 8 bit blitter mode
 149
 150                 info->fix.line_length = 800;
 151                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 152
 153                 info->var.red.offset = info->var.green.offset =
 154                         info->var.blue.offset = 0;
 155                 info->var.red.length = info->var.green.length =
 156                         info->var.blue.length = 8;
 157
 158         }
 159         return 0;
 160 }
 161
 162 static int chipsfb_blank(int blank, struct fb_info *info)
 163 {
 164 #ifdef CONFIG_PMAC_BACKLIGHT
 165         // used to disable backlight only for blank > 1, but it seems
 166         // useful at blank = 1 too (saves battery, extends backlight life)
 167         set_backlight_enable(!blank);
 168 #endif /* CONFIG_PMAC_BACKLIGHT */
 169
 170         return 1;       /* get fb_blank to set the colormap to all black */
 171 }
 172
 173 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 174                              u_int transp, struct fb_info *info)
 175 {
 176         if (regno > 255)
 177                 return 1;
 178         red >>= 8;
 179         green >>= 8;
 180         blue >>= 8;
 181         outb(regno, 0x3c8);
 182         udelay(1);
 183         outb(red, 0x3c9);
 184         outb(green, 0x3c9);
 185         outb(blue, 0x3c9);
 186
 187         return 0;
 188 }
 189
 190 struct chips_init_reg {
 191         unsigned char addr;
 192         unsigned char data;
 193 };
 194
 195 #define N_ELTS(x)       (sizeof(x) / sizeof(x[0]))
 196
 197 static struct chips_init_reg chips_init_sr[] = {
 198         { 0x00, 0x03 },
 199         { 0x01, 0x01 },
 200         { 0x02, 0x0f },
 201         { 0x04, 0x0e }
 202 };
 203
 204 static struct chips_init_reg chips_init_gr[] = {
 205         { 0x05, 0x00 },
 206         { 0x06, 0x0d },
 207         { 0x08, 0xff }
 208 };
 209
 210 static struct chips_init_reg chips_init_ar[] = {
 211         { 0x10, 0x01 },
 212         { 0x12, 0x0f },
 213         { 0x13, 0x00 }
 214 };
 215
 216 static struct chips_init_reg chips_init_cr[] = {
 217         { 0x00, 0x7f },
 218         { 0x01, 0x63 },
 219         { 0x02, 0x63 },
 220         { 0x03, 0x83 },
 221         { 0x04, 0x66 },
 222         { 0x05, 0x10 },
 223         { 0x06, 0x72 },
 224         { 0x07, 0x3e },
 225         { 0x08, 0x00 },
 226         { 0x09, 0x40 },
 227         { 0x0c, 0x00 },
 228         { 0x0d, 0x00 },
 229         { 0x10, 0x59 },
 230         { 0x11, 0x0d },
 231         { 0x12, 0x57 },
 232         { 0x13, 0x64 },
 233         { 0x14, 0x00 },
 234         { 0x15, 0x57 },
 235         { 0x16, 0x73 },
 236         { 0x17, 0xe3 },
 237         { 0x18, 0xff },
 238         { 0x30, 0x02 },
 239         { 0x31, 0x02 },
 240         { 0x32, 0x02 },
 241         { 0x33, 0x02 },
 242         { 0x40, 0x00 },
 243         { 0x41, 0x00 },
 244         { 0x40, 0x80 }
 245 };
 246
 247 static struct chips_init_reg chips_init_fr[] = {
 248         { 0x01, 0x02 },
 249         { 0x03, 0x08 },
 250         { 0x04, 0x81 },
 251         { 0x05, 0x21 },
 252         { 0x08, 0x0c },
 253         { 0x0a, 0x74 },
 254         { 0x0b, 0x11 },
 255         { 0x10, 0x0c },
 256         { 0x11, 0xe0 },
 257         /* { 0x12, 0x40 }, -- 3400 needs 40, 2400 needs 48, no way to tell */
 258         { 0x20, 0x63 },
 259         { 0x21, 0x68 },
 260         { 0x22, 0x19 },
 261         { 0x23, 0x7f },
 262         { 0x24, 0x68 },
 263         { 0x26, 0x00 },
 264         { 0x27, 0x0f },
 265         { 0x30, 0x57 },
 266         { 0x31, 0x58 },
 267         { 0x32, 0x0d },
 268         { 0x33, 0x72 },
 269         { 0x34, 0x02 },
 270         { 0x35, 0x22 },
 271         { 0x36, 0x02 },
 272         { 0x37, 0x00 }
 273 };
 274
 275 static struct chips_init_reg chips_init_xr[] = {
 276         { 0xce, 0x00 },         /* set default memory clock */
 277         { 0xcc, 0x43 },         /* memory clock ratio */
 278         { 0xcd, 0x18 },
 279         { 0xce, 0xa1 },
 280         { 0xc8, 0x84 },
 281         { 0xc9, 0x0a },
 282         { 0xca, 0x00 },
 283         { 0xcb, 0x20 },
 284         { 0xcf, 0x06 },
 285         { 0xd0, 0x0e },
 286         { 0x09, 0x01 },
 287         { 0x0a, 0x02 },
 288         { 0x0b, 0x01 },
 289         { 0x20, 0x00 },
 290         { 0x40, 0x03 },
 291         { 0x41, 0x01 },
 292         { 0x42, 0x00 },
 293         { 0x80, 0x82 },
 294         { 0x81, 0x12 },
 295         { 0x82, 0x08 },
 296         { 0xa0, 0x00 },
 297         { 0xa8, 0x00 }
 298 };
 299
 300 static void __init chips_hw_init(void)
 301 {
 302         int i;
 303
 304         for (i = 0; i < N_ELTS(chips_init_xr); ++i)
 305                 write_xr(chips_init_xr[i].addr, chips_init_xr[i].data);
 306         outb(0x29, 0x3c2); /* set misc output reg */
 307         for (i = 0; i < N_ELTS(chips_init_sr); ++i)
 308                 write_sr(chips_init_sr[i].addr, chips_init_sr[i].data);
 309         for (i = 0; i < N_ELTS(chips_init_gr); ++i)
 310                 write_gr(chips_init_gr[i].addr, chips_init_gr[i].data);
 311         for (i = 0; i < N_ELTS(chips_init_ar); ++i)
 312                 write_ar(chips_init_ar[i].addr, chips_init_ar[i].data);
 313         for (i = 0; i < N_ELTS(chips_init_cr); ++i)
 314                 write_cr(chips_init_cr[i].addr, chips_init_cr[i].data);
 315         for (i = 0; i < N_ELTS(chips_init_fr); ++i)
 316                 write_fr(chips_init_fr[i].addr, chips_init_fr[i].data);
 317 }
 318
 319 static struct fb_fix_screeninfo chipsfb_fix __initdata = {
 320         .id =           "C&T 65550",
 321         .type =         FB_TYPE_PACKED_PIXELS,
 322         .visual =       FB_VISUAL_PSEUDOCOLOR,
 323         .accel =        FB_ACCEL_NONE,
 324         .line_length =  800,
 325
 326 // FIXME: Assumes 1MB frame buffer, but 65550 supports 1MB or 2MB.
 327 // * "3500" PowerBook G3 (the original PB G3) has 2MB.
 328 // * 2400 has 1MB composed of 2 Mitsubishi M5M4V4265CTP DRAM chips.
 329 //   Motherboard actually supports 2MB -- there are two blank locations
 330 //   for a second pair of DRAMs.  (Thanks, Apple!)
 331 // * 3400 has 1MB (I think).  Don't know if it's expandable.
 332 // -- Tim Seufert
 333         .smem_len =     0x100000,       /* 1MB */
 334 };
 335
 336 static struct fb_var_screeninfo chipsfb_var __initdata = {
 337         .xres = 800,
 338         .yres = 600,
 339         .xres_virtual = 800,
 340         .yres_virtual = 600,
 341         .bits_per_pixel = 8,
 342         .red = { .length = 8 },
 343         .green = { .length = 8 },
 344         .blue = { .length = 8 },
 345         .height = -1,
 346         .width = -1,
 347         .vmode = FB_VMODE_NONINTERLACED,
 348         .pixclock = 10000,
 349         .left_margin = 16,
 350         .right_margin = 16,
 351         .upper_margin = 16,
 352         .lower_margin = 16,
 353         .hsync_len = 8,
 354         .vsync_len = 8,
 355 };
 356
 357 static void __init init_chips(struct fb_info *p, unsigned long addr)
 358 {
 359         p->fix = chipsfb_fix;
 360         p->fix.smem_start = addr;
 361
 362         p->var = chipsfb_var;
 363
 364         p->fbops = &chipsfb_ops;
 365         p->flags = FBINFO_DEFAULT;
 366
 367         fb_alloc_cmap(&p->cmap, 256, 0);
 368
 369         if (register_framebuffer(p) < 0) {
 370                 printk(KERN_ERR "C&T 65550 framebuffer failed to register\n");
 371                 return;
 372         }
 373
 374         printk(KERN_INFO "fb%d: Chips 65550 frame buffer (%dK RAM detected)\n",
 375                 p->node, p->fix.smem_len / 1024);
 376
 377         chips_hw_init();
 378 }
 379
 380 static int __devinit
 381 chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
 382 {
 383         struct fb_info *p = &chipsfb_info;
 384         unsigned long addr, size;
 385         unsigned short cmd;
 386
 387         if ((dp->resource[0].flags & IORESOURCE_MEM) == 0)
 388                 return -ENODEV;
 389         addr = pci_resource_start(dp, 0);
 390         size = pci_resource_len(dp, 0);
 391         if (addr == 0)
 392                 return -ENODEV;
 393         if (p->screen_base != 0)
 394                 return -EBUSY;
 395         if (!request_mem_region(addr, size, "chipsfb"))
 396                 return -EBUSY;
 397
 398 #ifdef __BIG_ENDIAN
 399         addr += 0x800000;       // Use big-endian aperture
 400 #endif
 401
 402         /* we should use pci_enable_device here, but,
 403            the device doesn't declare its I/O ports in its BARs
 404            so pci_enable_device won't turn on I/O responses */
 405         pci_read_config_word(dp, PCI_COMMAND, &cmd);
 406         cmd |= 3;       /* enable memory and IO space */
 407         pci_write_config_word(dp, PCI_COMMAND, cmd);
 408
 409 #ifdef CONFIG_PMAC_BACKLIGHT
 410         /* turn on the backlight */
 411         set_backlight_enable(1);
 412 #endif /* CONFIG_PMAC_BACKLIGHT */
 413
 414         p->screen_base = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
 415         if (p->screen_base == NULL) {
 416                 release_mem_region(addr, size);
 417                 return -ENOMEM;
 418         }
 419         p->device = &dp->dev;
 420         init_chips(p, addr);
 421
 422 #ifdef CONFIG_PMAC_PBOOK
 423         pmu_register_sleep_notifier(&chips_sleep_notifier);
 424 #endif /* CONFIG_PMAC_PBOOK */
 425
 426         /* Clear the entire framebuffer */
 427         memset(p->screen_base, 0, 0x100000);
 428
 429         pci_set_drvdata(dp, p);
 430         return 0;
 431 }
 432
 433 static void __devexit chipsfb_remove(struct pci_dev *dp)
 434 {
 435         struct fb_info *p = pci_get_drvdata(dp);
 436
 437         if (p != &chipsfb_info || p->screen_base == NULL)
 438                 return;
 439         unregister_framebuffer(p);
 440         iounmap(p->screen_base);
 441         p->screen_base = NULL;
 442         release_mem_region(pci_resource_start(dp, 0), pci_resource_len(dp, 0));
 443
 444 #ifdef CONFIG_PMAC_PBOOK
 445         pmu_unregister_sleep_notifier(&chips_sleep_notifier);
 446 #endif /* CONFIG_PMAC_PBOOK */
 447 }
 448
 449 static struct pci_device_id chipsfb_pci_tbl[] = {
 450         { PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65550, PCI_ANY_ID, PCI_ANY_ID },
 451         { 0 }
 452 };
 453
 454 MODULE_DEVICE_TABLE(pci, chipsfb_pci_tbl);
 455
 456 static struct pci_driver chipsfb_driver = {
 457         .name =         "chipsfb",
 458         .id_table =     chipsfb_pci_tbl,
 459         .probe =        chipsfb_pci_init,
 460         .remove =       __devexit_p(chipsfb_remove),
 461 };
 462
 463 int __init chips_init(void)
 464 {
 465         if (fb_get_options("chipsfb", NULL))
 466                 return -ENODEV;
 467
 468         return pci_register_driver(&chipsfb_driver);
 469 }
 470
 471 module_init(chips_init);
 472
 473 static void __exit chipsfb_exit(void)
 474 {
 475         pci_unregister_driver(&chipsfb_driver);
 476 }
 477
 478 #ifdef CONFIG_PMAC_PBOOK
 479 /*
 480  * Save the contents of the frame buffer when we go to sleep,
 481  * and restore it when we wake up again.
 482  */
 483 int
 484 chips_sleep_notify(struct pmu_sleep_notifier *self, int when)
 485 {
 486         struct fb_info *p = &chipsfb_info;
 487         int nb = p->var.yres * p->fix.line_length;
 488
 489         if (p->screen_base == NULL)
 490                 return PBOOK_SLEEP_OK;
 491
 492         switch (when) {
 493         case PBOOK_SLEEP_REQUEST:
 494                 save_framebuffer = vmalloc(nb);
 495                 if (save_framebuffer == NULL)
 496                         return PBOOK_SLEEP_REFUSE;
 497                 break;
 498         case PBOOK_SLEEP_REJECT:
 499                 if (save_framebuffer) {
 500                         vfree(save_framebuffer);
 501                         save_framebuffer = NULL;
 502                 }
 503                 break;
 504         case PBOOK_SLEEP_NOW:
 505                 chipsfb_blank(1, p);
 506                 if (save_framebuffer)
 507                         memcpy(save_framebuffer, p->screen_base, nb);
 508                 break;
 509         case PBOOK_WAKE:
 510                 if (save_framebuffer) {
 511                         memcpy(p->screen_base, save_framebuffer, nb);
 512                         vfree(save_framebuffer);
 513                         save_framebuffer = NULL;
 514                 }
 515                 chipsfb_blank(0, p);
 516                 break;
 517         }
 518         return PBOOK_SLEEP_OK;
 519 }
 520 #endif /* CONFIG_PMAC_PBOOK */
 521
 522 MODULE_LICENSE("GPL");